CN107025933B - 减少延迟的具有多条参考匹配线的内容可寻址存储器 - Google Patents
减少延迟的具有多条参考匹配线的内容可寻址存储器 Download PDFInfo
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- CN107025933B CN107025933B CN201610978420.6A CN201610978420A CN107025933B CN 107025933 B CN107025933 B CN 107025933B CN 201610978420 A CN201610978420 A CN 201610978420A CN 107025933 B CN107025933 B CN 107025933B
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
- G11C15/04—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
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- Static Random-Access Memory (AREA)
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Abstract
Description
Claims (15)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/990,125 US9704575B1 (en) | 2016-01-07 | 2016-01-07 | Content-addressable memory having multiple reference matchlines to reduce latency |
US14/990,125 | 2016-01-07 |
Publications (2)
Publication Number | Publication Date |
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CN107025933A CN107025933A (zh) | 2017-08-08 |
CN107025933B true CN107025933B (zh) | 2020-10-09 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN201610978420.6A Expired - Fee Related CN107025933B (zh) | 2016-01-07 | 2016-11-07 | 减少延迟的具有多条参考匹配线的内容可寻址存储器 |
Country Status (2)
Country | Link |
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US (1) | US9704575B1 (zh) |
CN (1) | CN107025933B (zh) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107967925B (zh) * | 2017-12-13 | 2020-07-24 | 大连理工大学 | 一种工艺变化自适应的低功耗cam匹配线敏感装置 |
US11735257B2 (en) * | 2021-07-20 | 2023-08-22 | Globalfoundries U.S. Inc. | Memory with high-accuracy reference-free multi-inverter sense circuit and associated sensing method |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030161194A1 (en) * | 2000-05-01 | 2003-08-28 | Ma Stanley Jeh-Chun | Matchline sense circuit and method |
US20060256601A1 (en) * | 2000-05-31 | 2006-11-16 | Mosaid Technologies Incorporated | Multiple match detection circuit and method |
US20080025074A1 (en) * | 2006-07-14 | 2008-01-31 | Igor Arsovski | Self-referenced match-line sense amplifier for content addressable memories |
US20080239778A1 (en) * | 2007-04-02 | 2008-10-02 | Shashank Shastry | Hybrid dual match line architecture for content addressable memories and other data structures |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6069815A (en) | 1997-12-18 | 2000-05-30 | Siemens Aktiengesellschaft | Semiconductor memory having hierarchical bit line and/or word line architecture |
US6744653B1 (en) | 2001-10-04 | 2004-06-01 | Xiaohua Huang | CAM cells and differential sense circuits for content addressable memory (CAM) |
US20030112684A1 (en) | 2001-12-17 | 2003-06-19 | International Business Machines Corporation | DRAM reference cell direct write |
US7346731B2 (en) | 2006-03-20 | 2008-03-18 | Texas Instruments Incorporated | High performance and scalable width expansion architecture for fully parallel CAMs |
US7372713B2 (en) | 2006-04-17 | 2008-05-13 | Texas Instruments Incorporated | Match sensing circuit for a content addressable memory device |
US20070247885A1 (en) * | 2006-04-25 | 2007-10-25 | Renesas Technology Corp. | Content addressable memory |
JP2011181147A (ja) * | 2010-03-02 | 2011-09-15 | Renesas Electronics Corp | 連想記憶装置 |
US8913412B1 (en) | 2011-11-29 | 2014-12-16 | Netlogic Microsystems, Inc. | Incremental adaptive match line charging with calibration |
US9542981B2 (en) | 2013-08-21 | 2017-01-10 | Globalfoundries Inc. | Self-timed, single-ended sense amplifier |
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2016
- 2016-01-07 US US14/990,125 patent/US9704575B1/en active Active
- 2016-11-07 CN CN201610978420.6A patent/CN107025933B/zh not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030161194A1 (en) * | 2000-05-01 | 2003-08-28 | Ma Stanley Jeh-Chun | Matchline sense circuit and method |
US20060256601A1 (en) * | 2000-05-31 | 2006-11-16 | Mosaid Technologies Incorporated | Multiple match detection circuit and method |
US20080025074A1 (en) * | 2006-07-14 | 2008-01-31 | Igor Arsovski | Self-referenced match-line sense amplifier for content addressable memories |
US20080239778A1 (en) * | 2007-04-02 | 2008-10-02 | Shashank Shastry | Hybrid dual match line architecture for content addressable memories and other data structures |
Also Published As
Publication number | Publication date |
---|---|
CN107025933A (zh) | 2017-08-08 |
US20170200500A1 (en) | 2017-07-13 |
US9704575B1 (en) | 2017-07-11 |
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Effective date of registration: 20201009 Address after: Greater Cayman Islands, British Cayman Islands Patentee after: Kawam International Inc. Address before: Hamilton, Bermuda Patentee before: Marvell International Ltd. Effective date of registration: 20201009 Address after: Singapore City Patentee after: Marvell Asia Pte. Ltd. Address before: Greater Cayman Islands, British Cayman Islands Patentee before: Kawam International Inc. Effective date of registration: 20201009 Address after: Hamilton, Bermuda Patentee after: Marvell International Ltd. Address before: Greater Cayman Islands, British Cayman Islands Patentee before: GLOBALFOUNDRIES Inc. |
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CF01 | Termination of patent right due to non-payment of annual fee | ||
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Granted publication date: 20201009 Termination date: 20211107 |