CN107017837A - Circuit arrangement, oscillator, electronic equipment and moving body - Google Patents
Circuit arrangement, oscillator, electronic equipment and moving body Download PDFInfo
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- CN107017837A CN107017837A CN201610910979.5A CN201610910979A CN107017837A CN 107017837 A CN107017837 A CN 107017837A CN 201610910979 A CN201610910979 A CN 201610910979A CN 107017837 A CN107017837 A CN 107017837A
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- 238000012545 processing Methods 0.000 claims abstract description 184
- 230000010355 oscillation Effects 0.000 claims abstract description 130
- 238000001514 detection method Methods 0.000 claims abstract description 102
- 238000006243 chemical reaction Methods 0.000 claims abstract description 53
- 230000008859 change Effects 0.000 claims description 125
- 230000005611 electricity Effects 0.000 claims description 17
- 239000010453 quartz Substances 0.000 claims description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 16
- 230000007547 defect Effects 0.000 abstract description 13
- 238000000034 method Methods 0.000 description 54
- 238000004891 communication Methods 0.000 description 32
- 230000003071 parasitic effect Effects 0.000 description 32
- 239000003990 capacitor Substances 0.000 description 25
- 102100029011 D-aminoacyl-tRNA deacylase 2 Human genes 0.000 description 15
- 101000838681 Homo sapiens D-aminoacyl-tRNA deacylase 2 Proteins 0.000 description 15
- 101001003569 Homo sapiens LIM domain only protein 3 Proteins 0.000 description 15
- 101000639972 Homo sapiens Sodium-dependent dopamine transporter Proteins 0.000 description 15
- 102100026460 LIM domain only protein 3 Human genes 0.000 description 15
- 230000024241 parasitism Effects 0.000 description 15
- 230000008569 process Effects 0.000 description 15
- 230000009467 reduction Effects 0.000 description 15
- 230000009471 action Effects 0.000 description 12
- 102100029010 D-aminoacyl-tRNA deacylase 1 Human genes 0.000 description 11
- 101000838688 Homo sapiens D-aminoacyl-tRNA deacylase 1 Proteins 0.000 description 11
- 230000006866 deterioration Effects 0.000 description 11
- 230000006870 function Effects 0.000 description 11
- 230000011218 segmentation Effects 0.000 description 10
- 238000010897 surface acoustic wave method Methods 0.000 description 10
- 238000010276 construction Methods 0.000 description 9
- XBGNERSKEKDZDS-UHFFFAOYSA-N n-[2-(dimethylamino)ethyl]acridine-4-carboxamide Chemical compound C1=CC=C2N=C3C(C(=O)NCCN(C)C)=CC=CC3=CC2=C1 XBGNERSKEKDZDS-UHFFFAOYSA-N 0.000 description 8
- 238000003860 storage Methods 0.000 description 8
- 230000015654 memory Effects 0.000 description 7
- 238000004364 calculation method Methods 0.000 description 6
- NAWXUBYGYWOOIX-SFHVURJKSA-N (2s)-2-[[4-[2-(2,4-diaminoquinazolin-6-yl)ethyl]benzoyl]amino]-4-methylidenepentanedioic acid Chemical compound C1=CC2=NC(N)=NC(N)=C2C=C1CCC1=CC=C(C(=O)N[C@@H](CC(=C)C(O)=O)C(O)=O)C=C1 NAWXUBYGYWOOIX-SFHVURJKSA-N 0.000 description 5
- 241000594011 Leuciscus leuciscus Species 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 238000012986 modification Methods 0.000 description 5
- 230000004048 modification Effects 0.000 description 5
- 230000009466 transformation Effects 0.000 description 5
- 101710129178 Outer plastidial membrane protein porin Proteins 0.000 description 4
- 102100037820 Voltage-dependent anion-selective channel protein 1 Human genes 0.000 description 4
- 238000005538 encapsulation Methods 0.000 description 4
- 238000001914 filtration Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 101150113941 trt1 gene Proteins 0.000 description 4
- 230000000052 comparative effect Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000007667 floating Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 101100538446 Aspergillus terreus (strain NIH 2624 / FGSC A1156) trt2 gene Proteins 0.000 description 2
- 241000196324 Embryophyta Species 0.000 description 2
- 238000003491 array Methods 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000033228 biological regulation Effects 0.000 description 2
- 238000012937 correction Methods 0.000 description 2
- 238000013500 data storage Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 230000010349 pulsation Effects 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- 230000001629 suppression Effects 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- WSMQKESQZFQMFW-UHFFFAOYSA-N 5-methyl-pyrazole-3-carboxylic acid Chemical compound CC1=CC(C(O)=O)=NN1 WSMQKESQZFQMFW-UHFFFAOYSA-N 0.000 description 1
- 241000208340 Araliaceae Species 0.000 description 1
- 241001269238 Data Species 0.000 description 1
- LYPFDBRUNKHDGX-SOGSVHMOSA-N N1C2=CC=C1\C(=C1\C=CC(=N1)\C(=C1\C=C/C(/N1)=C(/C1=N/C(/CC1)=C2/C1=CC(O)=CC=C1)C1=CC(O)=CC=C1)\C1=CC(O)=CC=C1)C1=CC(O)=CC=C1 Chemical compound N1C2=CC=C1\C(=C1\C=CC(=N1)\C(=C1\C=C/C(/N1)=C(/C1=N/C(/CC1)=C2/C1=CC(O)=CC=C1)C1=CC(O)=CC=C1)\C1=CC(O)=CC=C1)C1=CC(O)=CC=C1 LYPFDBRUNKHDGX-SOGSVHMOSA-N 0.000 description 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
- 235000003140 Panax quinquefolius Nutrition 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 101100064225 Synechocystis sp. (strain PCC 6803 / Kazusa) dtd3 gene Proteins 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000013256 coordination polymer Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000002305 electric material Substances 0.000 description 1
- 235000008434 ginseng Nutrition 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- HFGPZNIAWCZYJU-UHFFFAOYSA-N lead zirconate titanate Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ti+4].[Zr+4].[Pb+2] HFGPZNIAWCZYJU-UHFFFAOYSA-N 0.000 description 1
- 229910052451 lead zirconate titanate Inorganic materials 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- GQYHUHYESMUTHG-UHFFFAOYSA-N lithium niobate Chemical compound [Li+].[O-][Nb](=O)=O GQYHUHYESMUTHG-UHFFFAOYSA-N 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000000116 mitigating effect Effects 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 238000011946 reduction process Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 239000000725 suspension Substances 0.000 description 1
- 229960002197 temoporfin Drugs 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/02—Details
- H03B5/04—Modifications of generator to compensate for variations in physical values, e.g. power supply, load, temperature
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/30—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator
- H03B5/32—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator being a piezoelectric resonator
Abstract
The present invention provides circuit arrangement, oscillator, electronic equipment and moving body, can suppress due to the generation of defect caused by frequency drift of frequency of oscillation etc..Circuit arrangement has：A/D converter sections, it carries out A/D conversions, output temperature detection data to the temperature detection voltage from temperature sensor portion；Processing unit, its temperature-compensating for entering line of hitch oscillator frequency according to temperature detection data is handled, and exports the frequency control data of frequency of oscillation；And oscillator signal generative circuit, its frequency of use control data and oscillator generation oscillator signal, the frequency control data that processing unit output is changed with k × LSB (k >=1) for unit.
Description
Technical field
The present invention relates to circuit arrangement, oscillator, electronic equipment and moving body etc..
Background technology
Conventionally, there is known the temperature referred to as TCXO (temperature compensated crystal oscillator) is mended
Repay type oscillator.The TCXO is such as being used as portable mobile terminal, GPS relevant devices, wearable device or mobile unit
In reference signal source etc..
The TCXO has the ATCXO as the temperature compensation oscillator of analog form and the temperature compensating type as digital form to shake
Swing the DTCXO of device.It is used as ATCXO prior art, it is known to the technology disclosed in patent document 1.It is used as DTCXO existing skill
Art, it is known to the technology disclosed in patent document 2.
【Patent document 1】Japanese Unexamined Patent Publication 2012-199631 publications
【Patent document 2】Japanese Unexamined Patent Application 64-82809 publications
The oscillator of the digital forms such as DTCXO there are compared with the oscillator of the analog forms such as ATCXO in low power consumption etc.
The one side of profit.For example in ATCXO, cause the consumption electric current that many is flowed through in the analog circuit of the circuit arrangement.Especially exist
In ATCXO, in order to improve frequency accuracy, and want increase and be used as the temperature-compensation circuit of analog circuit (approximate function is produced
Circuit) in approximate function number of times, or in the transistor of increase analog circuit the electric current that flows through and when reducing noise, cause
Power consumption is significantly increased.Accordingly, there exist be difficult while realizing problem as the raising and low power consumption of frequency accuracy.
On the other hand, in the oscillator of DTCXO etc. digital form, the frequency in the frequency of oscillation with temperature change has been distinguished
When rate drift is for example more than the scope for allowing frequency drift, cause to produce respectively in the equipment for having used the oscillator signal of oscillator
Plant defect.
In addition, also having distinguished that, because frequency of oscillation changes, (spurious is posted by the noise of generation intensity corresponding with the variation
It is raw), the C/N characteristics (carrier-to-noise ratio, CN ratios) of circuit arrangement deteriorate.Because C/N characteristics deteriorate, cause according to from DTCXO
The precision reduction of the data obtained Deng the signal of oscillator.
The content of the invention
According to some modes of the present invention, using the teaching of the invention it is possible to provide generation can be suppressed due to the defect of the frequency drift of frequency of oscillation etc.
Circuit arrangement, oscillator, electronic equipment and moving body etc..
The mode of the present invention is related to circuit arrangement, it is characterised in that the circuit arrangement has：A/D converter sections, its to from
The temperature detection voltage in temperature sensor portion carries out A/D conversions, output temperature detection data；Processing unit, it is according to the temperature
Detection data enter the temperature-compensating processing of line of hitch oscillator frequency, export the frequency control data of the frequency of oscillation；And vibration letter
Number generative circuit, it uses described frequency control data and oscillator from the processing unit, generates according to the FREQUENCY CONTROL
The oscillator signal of the frequency of oscillation of data setting, in the case where temperature is from the 1st temperature change into the 2nd temperature, the place
Reason portion output with k × LSB (k >=1) be unit from the 1st data variation corresponding with the 1st temperature to the 2nd temperature pair
The frequency control data for the 2nd data answered, is setting the frequency control changed by unit of k × LSB of the processing unit
The output frequency of data processed is fs, if the frequency control data using k × LSB oscillation frequencies caused by the change of unit
In the case that the change of rate turns to Δ f, Δ f/fs<1/106。
In the mode of the present invention, handled according to the temperature-compensating that temperature detection data enter line of hitch oscillator frequency, using obtaining
Frequency control data and oscillator generation oscillator signal.In addition, in the mode of the present invention, becoming in temperature from the 1st temperature
In the case of being melted into the 2nd temperature, the frequency control data from the 1st data variation to the 2nd data by unit of k × LSB is exported.By
This, in the case of from the 1st temperature change into the 2nd temperature, can suppress frequency control data and significantly change, and frequency of oscillation is produced
The states of affairs such as larger frequency drift.Therefore, it is possible to provide circuit arrangement etc., it can suppress due to frequency drift of frequency of oscillation etc.
The generation of caused defect.In addition, in the mode of the present invention, the output frequency fs and FREQUENCY CONTROL of frequency control data
The changes delta f using k × LSB frequencies of oscillation caused by the change of unit of data meets Δ f/fs<1/106.Thus, additionally it is possible to
Suppress the C/N characteristics deterioration caused by the parasitism caused by frequency control data changes.
In addition, the present invention a mode in or, in the case of fs >=1kHz, f/fs<1/106, in fs<
In the case of 1kHz, Δ f<1mHz.
Thus, in order to suppress the deteriorations of C/N characteristics, felicity condition corresponding with fs etc. can be used.
In addition, another mode of the present invention is related to circuit arrangement, it is characterised in that the circuit arrangement has：A/D converter sections,
It carries out A/D conversions, output temperature detection data to the temperature detection voltage from temperature sensor portion；Processing unit, its basis
The temperature detection data enter the temperature-compensating processing of line of hitch oscillator frequency, export the frequency control data of the frequency of oscillation；With
And oscillator signal generative circuit, it uses the frequency control data and oscillator from the processing unit, and generation is according to described
The oscillator signal of the frequency of oscillation of frequency control data setting, in situation of the temperature from the 1st temperature change into the 2nd temperature
Under, processing unit output with k × LSB (k >=1) be unit from the 1st data variation corresponding with the 1st temperature to it is described
The frequency control data of corresponding 2nd data of 2nd temperature, is setting the institute changed by unit of k × LSB of the processing unit
The output frequency for stating frequency control data is fs, if the frequency control data using k × LSB institutes caused by the change of unit
State frequency of oscillation change turn to Δ f in the case of, in fs<In the case of 1kHz, Δ f<1mHz.
In another mode of the present invention, it can suppress due to the generation of defect caused by frequency drift of frequency of oscillation etc..And
And, due in fs<Δ f is met in the case of 1kHz<Condition as 1mHz, thus can also suppress due to frequency control data
C/N characteristics caused by changing caused by parasitism deteriorate.
In addition, another mode of the present invention is related to circuit arrangement, it is characterised in that the circuit arrangement has：A/D converter sections,
It carries out A/D conversions, output temperature detection data to the temperature detection voltage from temperature sensor portion；Processing unit, its basis
The temperature detection data enter the temperature-compensating processing of line of hitch oscillator frequency, export the frequency control data of the frequency of oscillation；With
And oscillator signal generative circuit, it uses the frequency control data and oscillator from the processing unit, and generation is according to described
The oscillator signal of the frequency of oscillation of frequency control data setting, is setting described in the oscillator signal generative circuit realized
The changeable frequency scope of frequency of oscillation is FR, if the permission frequency drift of the frequency of oscillation in specified time limit is FD, if institute
State frequency control data full scale value be DFS, if at the output gap of the frequency control data of the processing unit, institute
State frequency control data changing value be DV in the case of, DV<(FD/FR)×DFS.
According to another mode of the present invention, handled, used according to the temperature-compensating that temperature detection data enter line of hitch oscillator frequency
Frequency control data and oscillator the generation oscillator signal arrived.Here, the changeable frequency scope of frequency of oscillation is set as FR, if oscillation frequency
The permission frequency drift of rate is FD, if the full scale value of frequency control data is DFS, if at the output gap of frequency control data
Changing value be DV.Then, according to the mode of the present invention, frequency control data is according to DV<(FD/FR) as × DFS
Changing value DV and change.Frequency control data according to such changing value DV due to changing, thereby, it is possible to by specified time limit
Frequency of oscillation frequency drift shrink in for example allow frequency drift in.Therefore, it is possible to provide circuit arrangement etc., it can suppress
The generation of the defect of frequency drift due to frequency of oscillation etc..
In addition, the present invention another mode in or, in the output for the frequency control data for setting the processing unit
Frequency is fs, if the change of the frequency of oscillation caused by the changing value DV of frequency control data change turns to Δ f feelings
Under condition, Δ f/fs<1/106。
In another mode of the present invention, the output frequency fs of frequency control data and the changing value DV's of frequency control data
The changes delta f of frequency of oscillation meets Δ f/fs caused by change<1/106.Thus, additionally it is possible to suppress because frequency control data becomes
The deterioration of C/N characteristics caused by dynamic caused by parasitism.
In addition, the present invention another mode in or, in the case of fs >=1kHz, f/fs<1/106, fs<1kHz
In the case of, Δ f<1mHz.
Thus, in order to suppress the deteriorations of C/N characteristics, felicity condition corresponding with fs etc. can be used.
In addition, the present invention another mode in or, setting the defeated of the frequency control data of the processing unit
Go out frequency for fs, if the change of the frequency of oscillation caused by the changing value DV of frequency control data change turns to Δ f's
In the case of, in fs<In the case of 1kHz, Δ f<1mHz.
In another mode of the present invention, the output frequency fs of frequency control data and the changing value DV's of frequency control data
The changes delta f of frequency of oscillation is in fs caused by change<Δ f is met in the case of 1kHz<1mHz.Thus, additionally it is possible to suppress due to
The C/N characteristics that frequency control data changes caused by caused parasitism deteriorate.
In addition, the present invention a mode in or, the oscillator is quartz vibrator.
Thereby, it is possible to use quartz vibrator as oscillator.
In addition, in the mode of the present invention or, the quartz vibrator is that AT cuts oscillator, SC and cuts oscillator or SAW
(Surface Acoustic Wave：Surface acoustic wave) resonator.
Thus, as quartz vibrator, can be in the different multiple oscillators (resonator) of utilization level at least one.
In addition, the present invention a mode in or, the oscillator signal generative circuit has：D/A converter sections, its
D/A conversions are carried out to the frequency control data from the processing unit；And oscillating circuit, it is changed using the D/A
The output voltage in portion and the oscillator, generate the oscillator signal, the output frequency fs of the frequency control data is institute
The sample frequency of D/A converter sections is stated, the changes delta f of the frequency of oscillation is the frequency of oscillation caused by 1 D/A conversion
Variable quantity.
Thus, in the case where oscillator signal generative circuit has D/A converter sections and oscillating circuit, D/A converter sections can be set
Sample frequency is fs, if 1 D/A changes the variable quantity of caused frequency of oscillation into Δ f.
In addition, the present invention a mode in or, the D/A converter sections have：D/A converter, it carries out described
The D/A conversions of frequency control data；And filter circuit, its output voltage to the D/A converter carries out smooth.
Thus, the output of D/A converter is carried out by using filter circuit smoothly, the substantive change of frequency of oscillation being suppressed
Move.
In addition, the present invention a mode in or, setting the output of the D/A converter sections corresponding with the 1st temperature
Voltage is that frequency control voltage is the 1st control voltage, if the frequency control voltage corresponding with the 2nd temperature is the 2nd control electricity
In the case of pressure, temperature is located at from the 1st temperature change into the case of the 2nd temperature, from the D/A converter sections to institute
Oscillating circuit output is stated according to the electricity smaller than the absolute value of the 1st control voltage and the differential voltage of the 2nd control voltage
Press the output voltage of changes in amplitude.
Thus, in the case of from the 1st temperature change into the 2nd temperature, the i.e. frequency control of output voltage of D/A converter sections can be suppressed
Voltage processed significantly changes, so as to cause the state of affairs of the larger frequency drift of frequency of oscillation generation etc..
In addition, in the mode of the present invention or, the minimum resolutions of the data in D/A conversion is set as
In the case of LSB, the D/A converter sections export the output of the step change according to voltage corresponding with k × LSB (k >=1)
Voltage.
Thus, the change of the output voltage of D/A converter sections is limited in the stride of voltage corresponding with k × LSB, it is thus possible to
Suppress due to the generation of defect etc. caused by the larger voltage change of output voltage generation.
In addition, the present invention a mode in or, k=1.
Thereby, it is possible to make the output voltage of D/A converter sections according to the step change of voltage corresponding with 1LSB.
In addition, the present invention a mode in or, the A/D converter sections when setting temperature as 1 temperature
The temperature detection data be the 1st temperature detection data, temperature be 2 temperature when the A/D converter sections it is described
In the case that temperature detection data are the 2nd temperature detection data, the 1st control voltage is the temperature handled in the temperature-compensating
The frequency control voltage corresponding with the 1st temperature detection data in compensation characteristic is spent, the 2nd control voltage is in institute
State the frequency control voltage corresponding with the 2nd temperature detection data in the temperature compensation characteristic of temperature-compensating processing.
Thus, in the case where temperature is the 1st temperature, A/D converter sections export the 1st temperature detection data, are the 2nd temperature in temperature
In the case of, A/D converter sections export the 2nd temperature detection data.In this case, generally, D/A converter sections are defeated at a temperature of the 1st
Go out i.e. the 1st control voltage of frequency control voltage corresponding with the 1st temperature detection data, at a temperature of the 2nd, output and the 2nd temperature
Detect that the corresponding frequency control voltage of data is the 2nd control voltage.Therefore, the output voltage of D/A converter sections is caused to be controlled from the 1st
Voltage significantly changes to the 2nd control voltage.At this point, according to the mode of the present invention, the output voltage of D/A converter sections
According to the voltage amplitude variation smaller than the absolute value of the 1st control voltage and the differential voltage of the 2nd control voltage.Therefore, it is possible to have
Effect ground suppresses due to the generation of defect caused by frequency drift of frequency of oscillation etc..
In addition, the present invention a mode in or, the processing unit to as last time the temperature-compensating processing
Operation result data the 1st data with as this temperature-compensating processing the operation result data institute
State the 2nd data to be compared, in the case where the 2nd data are more than the 1st data, progress adds the 1st data
The processing of setting exports the addition result data conduct untill addition result data reach the 2nd data
The frequency control data, in the case where the 2nd data are less than the 1st data, progress is subtracted from the 1st data
Untill the processing of setting reaches the 2nd data until subtracting each other result data, and subtract each other result data conduct described in exporting
The frequency control data.
Thus, by carry out to the 1st data add setting processing, or carry out from the 1st data subtract setting processing, energy
Frequency control data is enough set to change by unit of k × LSB.
In addition, the present invention a mode in or, the processing unit has：Operational part, it is examined according to the temperature
The computing that data carry out the temperature-compensating processing of the frequency of oscillation is surveyed, the computing of the temperature-compensating processing is exported
Result data；And output section, it receives the operation result data from the operational part, exports the FREQUENCY CONTROL number
According in the operation result data from the 1st data variation corresponding with the 1st temperature into corresponding with the 2nd temperature
The 2nd data in the case of, output section output is by unit of k × LSB from the 1st data variation to the described 2nd
The frequency control data of data.
Thus, by the calculation process in operational part, the temperature-compensating processing of frequency of oscillation can be achieved.Also, from the fortune
The operation result data in calculation portion are from the 1st data variation into the case of the 2nd data, and output section output is by unit of k × LSB from the
Frequency control data of 1 data variation to the 2nd data.Thus, in the case where temperature is from the 1st temperature change into the 2nd temperature, energy
It is enough from processing unit output by unit of k × LSB from the 1st data variation corresponding with the 1st temperature to the 2nd temperature the corresponding 2nd
The frequency control data of data.
In addition, another mode of the present invention is related to oscillator, the oscillator has above-mentioned arbitrary circuit arrangement and described shaken
Son.
In addition, another mode of the present invention is related to electronic equipment, the electronic equipment has above-mentioned arbitrary circuit arrangement.
In addition, another mode of the present invention is related to moving body, the moving body has above-mentioned arbitrary circuit arrangement.
Brief description of the drawings
Fig. 1 is the graph of a relation of frequency accuracy and chip size.
Fig. 2 is the figure for the frequency drift for showing ATCXO.
Fig. 3 is the figure for the frequency drift for showing existing DTCXO.
Fig. 4 is the basic structure example of the circuit arrangement of present embodiment.
Fig. 5 is the detailed construction example of the circuit arrangement of present embodiment.
Fig. 6 is the figure of the example of the temperature characterisitic and its deviation that show oscillator.
Fig. 7 is the explanation figure of the temperature-compensating processing of present embodiment.
Fig. 8 is due to frequency drift and the explanation figure of communication mistake that produces.
Fig. 9 is the explanation figure from the 1st temperature change into the change of frequency control voltage during 2 temperature.
Figure 10 is the explanation figure from the 1st temperature change into the change of frequency control voltage during 2 temperature.
Figure 11 is the explanation figure of the method for present embodiment.
Figure 12 is the explanation figure of the method for present embodiment.
Figure 13 is the explanation figure of the method for present embodiment.
Figure 14 is the explanation figure on frequency hopping.
The improved explanation figure of frequency drift when Figure 15 is the method using present embodiment.
Figure 16 is the C/N characteristics of oscillator and makes the explanation figure of the parasitic relation of C/N characteristics deterioration.
Figure 17 is the figure for showing parasitic characteristic example corresponding with Δ f and fs.
Figure 18 is to show not make the figure of the Δ f and fs of the deterioration of C/N characteristics setting example.
Figure 19 is the setting for making Δ f and fs according to the explanation figure of the method for time series variation.
Figure 20 is the detailed construction example of processing unit.
Figure 21 is the explanation figure for the method for making frequency control data change by unit of k × LSB.
Figure 22 is the explanation figure for the method for making frequency control data change by unit of k × LSB.
Figure 23 is the detailed construction example of D/A converter sections.
Figure 24 is the more detailed structure example of D/A converter sections.
Figure 25 is the explanation figure of PWM.
Figure 26 is the explanation figure of PWM.
Figure 27 is the explanation figure of PWM.
Figure 28 is the detailed construction example in temperature sensor portion.
Figure 29 is the detailed construction example in temperature sensor portion.
Figure 30 is the explanation figure in temperature sensor portion.
Figure 31 is the detailed construction example of oscillating circuit.
Figure 32 is the explanation figure of modified embodiment of the present embodiment.
Figure 33 is the explanation figure of modified embodiment of the present embodiment.
Figure 34 is the explanation figure of modified embodiment of the present embodiment.
Figure 35 is the figure for showing the frequency drift in variation.
Figure 36 is the figure for showing the frequency drift in variation.
Figure 37 is the figure for showing the frequency drift in variation.
Figure 38 is the detailed construction example of A/D converter sections.
Figure 39 is the configuration example of the circuit arrangement of modified embodiment of the present embodiment.
Figure 40 is the configuration example of oscillator.
Figure 41 is the configuration example of electronic equipment.
Figure 42 is the configuration example of moving body.
Preferred embodiment
Hereinafter, the preferred embodiment of the present invention is described in detail.In addition, the present embodiment illustrated below is not undeservedly limited
Present disclosure described in claims, the entire infrastructure illustrated in the present embodiment is not necessarily the solution of the present invention
Certainly means.
1. frequency drift
In the TCXO as temperature compensation oscillator, it is desirable to the raising and low power consumption of frequency accuracy.In for example built-in GPS
Clock and watch or the wearable device such as the sensing equipment of biological information such as pulse in, it is necessary to when extending the action based on battery and continuing
Between.It is therefore desirable to which power consumption is lower while frequency accuracy is ensured as the TCXO of reference signal source.
In addition, proposing various modes as the communication mode of communication terminal and base station.For example in TDD (Time Division
Duplex) in mode, each equipment sends data in the time slot being split to form.Also, it is (uplink timeslots, descending in time slot
Line time slot) between set isolation time, this prevents Time Slot Overlap.In follow-on communication system, it is proposed that for example
Row data communication is entered in TDD modes using 1 frequency band (such as 50GHz).
But, it is necessary to carry out timing synchronization in each equipment in the case of using such TDD modes, it is desirable to have correct
The clock and watch at absolute moment.In order to realize such requirement, it is also contemplated that for example setting atomic clock in each equipment, (atom vibrates
Device) as the method for reference signal source, still, the problems such as causing high cost or the equipment enlarging of equipment will be produced.
In addition, there is TCXO the ATCXO as the temperature compensation oscillator of analog form and the temperature as digital form to mend
Repay the DTCXO of type oscillator.
Also, in the case where using ATCXO as reference signal source, when wanting to make frequency accuracy high precision int, such as Fig. 1 institutes
Show, causing the chip size of circuit arrangement increases, be difficult to realize cost degradation and low power consumption.
On the other hand, in DTCXO, as shown in figure 1, the chip size with circuit arrangement will not excessively become big, it can realize
Advantage as the high precision int of frequency accuracy.
But, in the oscillator of the digital forms such as DTCXO, due to the frequency drift of the frequency of oscillation, shaken with entering to have in group
Swing the problem of communication mistake etc. is produced in the communicator of device so.For example in the oscillator of digital form, to from temperature
The temperature detection voltage of sensor portion carries out A/D conversions, and the temperature of frequency control data is carried out according to obtained temperature detection data
Compensation deals are spent, oscillator signal is generated according to the frequency control data.In this case, distinguished is made due to temperature change
When the value of frequency control data significantly changes, the problem of producing frequency hopping therefrom.When producing such frequency hopping, with GPS phases
Exemplified by the communicator of pass, cause the problems such as lock for producing GPS comes off.
Therefore, in the oscillator of the digital forms such as DTCXO, although propose various circuit modes, still, as such logical
The reference signal source of actual product of the letter mistake as problem, present situation is the oscillator for hardly using digital form, but is adopted
With the oscillator of the analog forms such as ATCXO.
Such as Fig. 2 is the figure for the frequency drift for showing ATCXO.In ATCXO, as shown in Fig. 2 in temperature with time process
In the case of change, its frequency drift is also contracted in the range of permission frequency drift (permission frequency errors) (± FD).In Fig. 2
In, frequency drift (frequency errors) is represented with the ratio (frequency probability, ppb) of nominal frequency of oscillation (such as 16MHz or so).
In order to not produce such as communication mistake, it is necessary to make frequency drift be contracted in permission frequency in specified time limit TP (such as 20msec)
In the range of rate drift (± FD).Here, ppb or so in full exemplified by FD.
On the other hand, Fig. 3 is the figure of frequency drift when being shown with existing DTCXO.As shown in figure 3, in existing DTCXO
In, the frequency drift is not contracted in the range of frequency drift is allowed, and produces the frequency hopping beyond the scope.Therefore, production is caused
The raw communication mistake (GPS lock comes off) due to the frequency hopping, as using reference signal sources of the DTCXO as actual product
Obstacle.
Furthermore it is known that oscillator can produce phase noise corresponding with vibrator characteristic.Figure 16 described later D1 is quartz vibrator
The example of general C/N characteristics, the intensity (longitudinal axis, unit dBc/Hz) of phase noise is in the detuning frequency relative to frequency of oscillation
(transverse axis, unit Hz) relatively low position and detuning frequency f cube are inversely proportional, with f's in the range of 1k~10kHz or so
Secondary power is inversely proportional.In below 10kHz frequency range, influence is larger caused by so-called 1/f noise.On the other hand, in height
In under 10kHz frequency, influence is larger caused by thermal noise, as the flat characteristic for not depending on f.That is, expectation is produced to shake
The signal for swinging frequency beyond frequency is inevitable in the characteristic of oscillator, and (and oscillator is included in oscillators such as DTCXO
Circuit arrangement) in, carry out turning into the phase noise also unchallenged design of C/N characteristics even if generation D1 is such.
But, in DTCXO, produce the output frequency fs of the data (frequency control data DDS) of control frequency of oscillation and with shaking
Swing the parasitism of the corresponding intensity of changes delta f of frequency.Details is repeated later using following formula (10) etc., the parasitic phase of generation
Detuning frequency for fundamental wave (frequency of oscillation) is fs, and intensity is and (Δ f/fs)2Corresponding value.Also, according to fs's and Δ f
Value, it is possible to produce intensity larger parasitism of intensity compared with the original phase noise of the oscillator shown in D1.Figure 16 D2 is
Parasitic example during Δ f=0.1Hz, fs=100kHz, parasitic example when D3 is Δ f=0.1Hz, fs=600kHz.
D2, D3 any parasitic intensity all phase noises (D1) more original than oscillator are high.
Due to producing the parasitism shown in D2, D3, the signal intensity under frequency different from expecting frequency of oscillation relatively increases, and shakes
The C/N characteristics for swinging device 400 deteriorate.The deterioration of C/N characteristics is relevant with the reduction using data precision obtained from oscillator signal.Example
As if above-mentioned GPS example, then the precision reduction of GPS receiver signal, specifically, is obtained according to GPS receiver signal
The precision reduction of positional information.Thus, parasitic generation corresponding with frequency variation, is also used as actual production as use DTCXO
The obstacle of the reference signal source of product.In addition, colonizing in shown in Figure 16 D2, D3 in the case that its intensity do not reduce, can make C/N
Characteristic deteriorates.Thus, if carrying out smooth wait based on filter circuit reduces the noise reduction process of parasitic intensity, in this embodiment party
In the method for formula, obstacle will not be turned into using Δ f, fs corresponding with D2, D3 value.Details is repeated after holding.
2. structure
Fig. 4 shows the basic structure example of the circuit arrangement of present embodiment.The circuit arrangement is to realize the numerals such as DTCXO, OCXO
The circuit arrangement (semiconductor chip) of the oscillator of mode.For example by the way that the circuit arrangement and oscillator XTAL are accommodated in into encapsulation,
The oscillator of digital form can be achieved.
Fig. 4 circuit arrangement includes A/D converter sections 20, processing unit 50, oscillator signal generative circuit 140.In addition, circuit arrangement is also
Temperature sensor portion 10, buffer circuit 160 can be included.In addition, the structure of circuit arrangement is not limited to Fig. 4 structure, it is possible to implement
Omit one part structural element (such as temperature sensor portion, buffer circuit, A/D converter sections) or additional other structures key element
Deng various modifications.
Oscillator XTAL is the piezoelectric vibrator such as quartz vibrator.Oscillator XTAL can be provided at constant temperature (oven) type in thermostat
Oscillator (OCXO).Oscillator XTAL can also be resonator (resonator of electricapparatus formula or the resonance circuit of electric).Make
For oscillator XTAL, piezoelectric vibrator, SAW (Surface Acoustic Wave) resonator, MEMS (Micro Electro can be used
Mechanical Systems) oscillator etc.., can be isobaric using quartz, lithium tantalate, lithium niobate as oscillator XTAL baseplate material
The piezoelectric ceramics such as electric monocrystal and lead zirconate titanate equipressure electric material or silicon semiconductor material etc..It is used as oscillator XTAL vibration
Means, can use the means based on piezo-electric effect, can also use the electrostatic drive based on Coulomb force.
The output temperature detection voltage VTD of temperature sensor portion 10.Specifically, output is according to the temperature of environment (circuit arrangement)
The interdependent voltage of temperature of change is used as temperature detection voltage VTD.The concrete structure example in temperature sensor portion 10 is repeated later.
A/D converter sections 20 carry out the A/D conversions of the temperature detection voltage VTD from temperature sensor portion 10, output temperature detection
Data DTD.For example export digital temperature detection data DTD (A/D corresponding with temperature detection voltage VTD A/D transformation results
Result data).As the A/D conversion regimes of A/D converter sections 20, for example, it can use gradually manner of comparison and gradually manner of comparison
Similar mode etc..In addition, A/D conversion regimes are not limited to such mode, (attribute, ratio in parallel in various manners can be also adopted
Compared with type or Serial-Parallel Type etc.).
(the DSP portions of processing unit 50：Digital signal processing section) carry out various signal transactings.Such as processing unit 50 (temperature compensation division) root
Enter the temperature-compensating processing of line of hitch oscillator frequency (frequency of oscillator signal) according to temperature detection data DTD.Also, export frequency of oscillation
Frequency control data DDS.Specifically, processing unit 50 according to change according to temperature temperature detection data DTD (temperature according to
Deposit data) and temperature-compensating processing coefficient data (data of the coefficient of approximate function) etc., be used for even in temperature
Also frequency of oscillation stationary temperature compensation deals are made in the case of change.The processing unit 50 can be real by ASIC circuits such as gate arrays
Existing, the program that can also be acted by processor and on a processor is realized.
The generation oscillator signal of oscillator signal generative circuit 140 SSC.Such as oscillator signal generative circuit 140 is used from processing unit
50 frequency control data DDS and oscillator XTAL, generates the oscillator signal according to the frequency control data DDS frequencies of oscillation set
SSC.As one, the frequency of oscillation that oscillator signal generative circuit 140 makes oscillator XTAL to be set according to frequency control data DDS
Vibration, generation oscillator signal SSC.
In addition, oscillator signal generative circuit 140 can also be the electricity that oscillator signal SSC is generated in direct digital synthesiser mode
Road.For example oscillator XTAL (oscillation source of built-in oscillation frequency) oscillator signal can also be set to reference signal, with numeral side
Formula generates the oscillator signal SSC according to the frequency control data DDS frequencies of oscillation set.
Oscillator signal generative circuit 140 can include D/A converter sections 80 and oscillating circuit 150.But, oscillator signal generative circuit
140 are not limited to such structure, can also implement to omit each of one part structural element or additional other structures key element etc.
Plant deformation.
D/A converter sections 80 carry out the D/A conversions of the frequency control data DDS (output data of processing unit) from processing unit 50.
It is input into the frequency control data after the temperature-compensating processing that the frequency control data DDS of D/A converter sections 80 is processing unit 50
(FREQUENCY CONTROL code).For example can be using D/A conversion regime of the resistance serial type (resistance Splittable) as D/A converter sections 80.But,
D/A conversion regime not limited to this, also can be using resistance ladder type (R-2R ladder types etc.), capacitor array type or PWM-type etc.
Various modes.In addition, D/A converter sections 80 are in addition to D/A converter, circuit, modulation circuit, filtering can also be controlled comprising it
Circuit etc..
Oscillating circuit 150 uses the output voltage VQ and oscillator XTAL of D/A converter sections 80, generation oscillator signal SSC.Oscillating circuit
150 are connected via the 1st, the 2nd oscillator with terminal (oscillator pad) with oscillator XTAL.For example oscillating circuit 150 is shaken by making
Sub- XTAL (piezoelectric vibrator, resonator etc.) is vibrated and generates oscillator signal SSC.Specifically, oscillating circuit 150 makes oscillator XTAL
Using by the output voltage VQ of D/A converter sections 80 as frequency control voltage (vibrational control voltage) oscillation frequency.For example
In the case where oscillating circuit 150 is the circuit (VCO) for the vibration that oscillator XTAL is controlled by voltage control, oscillating circuit
150 variable capacitance capacitors (di-cap etc.) that can change comprising capacitance according to frequency control voltage.
In addition, as it was previously stated, oscillating circuit 150 can be realized by direct digital synthesiser mode, in this case, oscillator
XTAL frequency of oscillation turns into reference frequency, the frequency as the frequency of oscillation different from oscillator signal SSC.
Buffer circuit 160 carries out the oscillator signal SSC generated by oscillator signal generative circuit 140 (oscillating circuit 150) caching,
Signal SQ after output caching.That is, the caching for making it possible to fully driving external loading is carried out.Signal SQ is, for example, amplitude limit
Sine wave signal.But, signal SQ can also be square-wave signal.Or, buffer circuit 160 can also be being capable of output violent change
Both sine wave signal and square-wave signal as signal SQ circuit.
Fig. 5 shows the detailed configuration example of the circuit arrangement of present embodiment.In Figure 5, D/A converter sections 80 include modulation circuit
90th, D/A converter 100, filter circuit 120.
The modulation circuit 90 of D/A converter sections 80 receives frequency control data DDS (i, n, m of i=(n+m) bit from processing unit 50
Integer for more than 1).It is used as one, i=20, n=16, m=4.Also, modulation circuit 90 is according to frequency control data DDS's
The data of m bits (such as 4 bits), the data of modulating frequency control data DDS n-bit (such as 16 bits).Specifically,
Modulation circuit 90 carries out frequency control data DDS PWM.In addition, the modulation system of modulation circuit 90 is not limited to PWM
(pulsewidth modulation), beyond the impulse modulation or impulse modulation such as can also be PDM modulation (pulse density modulated)
Modulation system.For example can also the data of frequency control data DDS n-bit be carried out with the dithering process of m bits
(dithering processing), is achieved in bit expanded (from n-bit to the bit expanded of i bits).
D/A converter 100 carry out by modulation circuit 90 modulate after n-bit data D/A conversion.For example carry out n=16 ratios
The D/A conversions of special data.As the D/A conversion regimes of D/A converter 100, for example, it can use resistance serial type, resistance ladder type
Deng.
Filter circuit 120 carries out smooth to the output voltage VDA of D/A converter 100.For example carry out low-pass filtering treatment and to defeated
Go out voltage VDA to carry out smoothly.By setting such filter circuit 120, for example, it can carry out the PWM of the signal after PWM
Demodulation.The cut-off frequency of the filter circuit 120 can be set according to the frequency of the PWM of modulation circuit 90.That is, from D/A
The pulsation of fundamental frequency and higher harmonic component of the output voltage VDA of converter 100 signal comprising PWM
(ripple), therefore, the pulsation is made to decay by filter circuit 120.In addition, as filter circuit 120, such as can use using electricity
The passive filter of the passive device such as resistance or capacitor.But, can also be using active filters such as SCF as filter circuit 120
Ripple device.
As described later, in order to suppress the generation of the communication mistake caused by frequency hopping illustrated in fig. 3, carrying for frequency accuracy is realized
It is high, it is necessary to make the resolution ratio of D/A converter sections 80 try one's best height.
But, only it is difficult to high-resolution for example as i=20 bits with the D/A converter 100 such as resistance string type
D/A conversion.In addition, when the output noise of D/A converter sections 80 is larger, due to the noise, being difficult to realize carrying for frequency accuracy
It is high.
Therefore, in Figure 5, modulation circuit 90 is set in D/A converter sections 80.In addition, the output bit number of processing unit 50 is used for
The frequency control data DDS of the i=m+n bits of the n-bit (such as 16 bits) of the resolution ratio of D/A converter 100 more.Processing unit
50, in order to realize the Digital Signal Processing such as being handled temperature-compensating, carry out floating-point operation etc., therefore, and easily output is such compares
The frequency control data DDS of i=m+n bit of the special number than n-bit (such as n=16 bits) more.
Also, the data of m bit of the modulation circuit 90 in i=m+n carry out the modulation of the data of the n-bit in i=m+n
(PWM etc.), D/A converter 100 is output to by the data DM of the n-bit after modulation.Also, D/A converter 100 enters line number
Changed according to DM D/A, filter circuit 120 carries out resulting output voltage VDA smoothing processing, thereby, it is possible to realize i=m+
High-resolution D/A conversions as n-bit (such as 20 bits).
According to the structure, as D/A converter 100 such as resistance serial type that can be few using output noise, therefore, it is possible to reduce
The output noise of D/A converter sections 80, easily suppresses the deterioration of frequency accuracy.For example produce and make an uproar due to the modulation of modulation circuit 90
Sound, still, for the noise, also can make it fully decay, can suppress by setting the cut-off frequency of filter circuit 120
Due to the deterioration of the frequency accuracy of the noise.
In addition, the resolution ratio of D/A converter sections 80 is not limited to i=20 bits, can be above 20 bits resolution ratio or
Less than the resolution ratio of 20 bits.In addition, the modulation bit number of modulation circuit 90 is also not necessarily limited to m=4 bits, 4 bits can be more than
(such as m=8 bits), might be less that 4 bits.
In addition, in Figure 5, the prime effectively utilized in D/A converter sections 80 is provided with the numeral letter such as progress temperature-compensating processing
Number processing processing unit 50 situation.That is, processing unit 50 accurately performs temperature-compensating processing for example, by floating-point operation etc.
Etc. Digital Signal Processing.Thus, for example the low-order bit of the mantissa of floating-point operation result also serves as valid data processing, if turned
Change binary data into, then can also easily export the FREQUENCY CONTROL number of such as higher bit number as i=m+n=20 bits
According to DDS.It is conceived to this point in Figure 5, the frequency control data DDS of such higher bit number i=m+n bits is supplied to D/
A converter sections 80, using the modulation circuit 90 and the D/A converter 100 of n-bit of m bits, are successfully realized as i=m+n bits
High-resolution D/A conversions.
By the way that the resolution ratio of D/A converter sections 80 is set into high-resolution in this wise, the generation of above-mentioned frequency hopping can be suppressed.Thus,
It can suppress due to the generation of communication mistake etc. caused by frequency hopping.
In addition, in addition to the problem of such frequency hopping, in the oscillator of DTCXO or OCXO etc. digital form, also requiring
Frequency of oscillation has very high frequency accuracy.For example in foregoing TDD modes, uplink and downlink using identical frequency according to
Time division way transmitting and receiving data, isolation time is set between the time slot of each equipment is distributed to.Therefore, it is appropriate in order to realize
Communication, need to carry out timing synchronization in each equipment, it is desirable to have the clock and watch at correct definitely moment.For example generating benchmark
Signal (gps signal or the signal via internet) disappear or exception holding phenomenon (holdover) in the case of, it is necessary to
Timing is correctly carried out to the absolute moment by alternator side in the state of no reference signal.Therefore, for such equipment
The oscillator requirement of (GPS relevant devices, base station etc.) very high frequency precision of oscillation.
In order to realize such requirement, such as when in the method setting atomic clock using each equipment, the height of equipment will be caused
Cost and large-scale.In addition, it is undesirable to although realizing the oscillator of high freuqency accuracy, cause for oscillator
Circuit arrangement large-scale, or power consumption are very big.
At this point, according to the structure of Fig. 5 circuit arrangement, only setting modulation circuit 90, filter circuit in D/A converter sections 80
120, you can the D/A converter sections 80 of resolution ratio very high as the bit of such as i >=20 are realized, by improving resolution in this wise
Rate, can realize the high precision int of frequency of oscillation.Also, due to set in this wise modulation circuit 90, filter circuit 120 and cause
Circuit arrangement chip size increase or the increase of power consumption will not be so big.Also, transported in processing unit 50 by floating-point
Calculating etc. realizes temperature-compensating processing, additionally it is possible to be easily output to frequency control data DDS as the bit of such as i >=20
D/A converter sections 80.Therefore, the structure of Fig. 5 circuit arrangement has the following advantages that：The high accuracy of frequency of oscillation can be realized simultaneously
The increase of the scale and power consumption of change and suppression circuit device.
In addition, Fig. 4, Fig. 5 circuit arrangement can also be used as having to reference signal (gps signal or the signal via internet)
In the PLL circuit for the phase-comparison circuit being compared with the input signal based on oscillator signal, vibration IC.In the situation
Under, frequency control data of 50 pairs of the processing unit for example from the phase-comparison circuit is carried out at temperature-compensating processing or age correction
Reason etc., oscillator signal is generated by oscillator signal generative circuit 140.
In addition, in the case where temperature is from the 1st temperature change into the 2nd temperature, processing unit 50 export from the 1st temperature (the 1st temperature
Detect data) corresponding 1st data arrive with the 2nd temperature (the 2nd temperature detection data) corresponding 2nd data, using k × LSB as singly
The frequency control data DDS of position change (changing k × LSB every time).Here, k >=1, k is more than 1 integer.For example setting frequency
In the case that control data DDS bit number (resolution ratio of D/A converter sections) is i, k<2i, k be and 2iCompared to sufficiently small integer
(such as k=1~8).More specifically, k<2m.For example in case of k=1, processing unit 50 exports in units of 1LSB (1 ratio
Special unit) from the 1st data variation into the frequency control data DDS of the 2nd data.That is, export from the 1st data to the 2nd data with every
The frequency control data DDS changed to secondary mobile 1LSB (1 bit).In addition, frequency control data DDS change stride is not limited to
1LSB, for example can also be as 2 × LSB, 3 × LSB, 4 × LSB ..., the change stride for being 2 × more than LSB.
For example, processing unit 50 includes operational part 60 and output section 70.Operational part 60 carries out oscillation frequency according to temperature detection data DTD
The computing of the temperature-compensating processing of rate.By realizing that temperature-compensating is handled based on the Digital Signal Processing such as floating-point operation.
Output section 70 receives the operation result data CQ from operational part 60, output frequency control data DDS.Also, in operation result
Data CQ is in the case of corresponding 2nd data of the temperature of the 1st data variation Cheng Yu 2 corresponding with the 1st temperature, the output section 70
Handled by unit of k × LSB from the 1st data variation into the frequency control data DDS of the 2nd data output.
Thus, if the frequency control data DDS exported from processing unit 50 changes k × LSB every time, such as in temperature from the 1st
Temperature change is into the case of the 2nd temperature, and the output voltage VQ of D/A converter sections 80 produces larger voltage change, can suppress
The state of affairs of Fig. 3 frequency hopping is produced due to the voltage change.Thereby, it is possible to prevent from producing communication mistake etc. due to the frequency hopping.
More specifically, processing unit 50 is the to the operation result data (CQ) of the temperature-compensating of last time (timing of last time) processing
The operation result data that the temperature-compensating of 1 data and this (this timing) is handled are that the 2nd data are compared.
Also, in the case where the 2nd data are more than the 1st data, processing unit 50 (output section 70) is carried out to the 1st data plus regulation
The processing of value, for example, carry out adding k × LSB processing as setting.For example in case of k=1, carry out being used as setting
Plus 1LSB processing.In addition, the setting added is not limited to 1LSB or 2 × more than LSB.Also, processing unit 50
The addition processing is such as carried out untill addition result data reach the 2nd data, and regard the addition result data as frequency
Control data DDS is exported.
On the other hand, in the case where the 2nd data corresponding with the 2nd temperature are less than the 1st data corresponding with the 1st temperature, processing
Portion 50 (output section 70) subtracted from the 1st data the processing of setting.For example carry out subtracting k × LSB place as setting
Reason.For example in case of k=1, carry out subtracting 1LSB processing as setting.In addition, the setting subtracted is not limited to
1LSB or 2 × more than LSB.Also, processing unit 50 for example carries out this and subtracts each other processing reaching the until subtracting each other result data
Untill 2 data, and this is subtracted each other into result data exported as frequency control data DDS.
Thus, if subtracted to the 1st data plus setting or from the 1st data the processing and output frequency control of setting
Data DDS processed, then it is warm from 1st data variation Cheng Yu 2 corresponding with the 1st temperature in the operation result data that temperature-compensating is handled
In the case of spending corresponding 2nd data, for example, it can export by unit of k × LSB corresponding with setting from the 1st data variation
Into the frequency control data DDS of the 2nd data.
In addition, processing unit 50 (output section 70) carries out the frequency changed by unit of k × LSB under the 1st pattern (normal mode)
Control data DDS output processing.Thereby, it is possible to suppress the generation of communication mistake etc. caused by frequency hopping.
On the other hand, FREQUENCY CONTROL of the processing unit 50 under the 2nd pattern (fast mode) without changing by unit of k × LSB
Data DDS output processing, but the operation result data that temperature-compensating is handled are defeated as frequency control data DDS progress
Go out.Specifically, the operation result data CQ from operational part 60 is exported as frequency control data DDS.Thus, energy
It is enough that the frequency control data DDS changed at a high speed compared with the 1st pattern is supplied to D/A converter sections 80, fast mode can be realized.
In addition, the setting (generally during action) when circuit arrangement is generally acted of the 1st pattern.On the other hand, the 2nd pattern is for example
Circuit arrangement is set when starting (during startup) or when checking (during test).That is, during action beyond in usual action
Circuit arrangement is configured to the 2nd pattern.
For example, by being set to the 1st pattern in the usual action of circuit arrangement, processing unit 50, which is exported by unit of k × LSB, to be become
The frequency control data DDS of change.Thus, the problems such as preventing frequency hopping, realizes high precision int of frequency of oscillation etc..
On the other hand, by being set to the 2nd pattern when circuit arrangement starts or when checking, without making frequency control data
The processing that DDS changes by unit of k × LSB, the operation result data CQ from operational part 60 is directly as frequency control data
DDS is exported., being capable of high-speed starting circuit arrangement thereby, it is possible to shorten the startup time of circuit arrangement.Furthermore it is possible to shorten system
During inspection in when making circuit arrangement or oscillator etc. (during test), shortening during manufacture etc. is realized.
In addition, in the present embodiment, processing unit 50 is with the output speed than the temperature detection data DTD from A/D converter sections 20
The fast output speed output frequency control data DDS of rate.Thereby, it is possible to export by unit of k × LSB from the 1st data variation into
The frequency control data DDS of 2nd data.For example in a period of corresponding with the A/D transition periods, frequency control data can be made
Periodically change each k × LSB of DDS.
Fig. 6 is the figure of one for showing the frequency departure of frequency of oscillation caused by the temperature of oscillator XTAL (AT oscillators etc.).Processing
Portion 50 carries out keeping constant for making the frequency of oscillation of the oscillator XTAL with the temperature characterisitic shown in Fig. 6 independent of temperature
Temperature-compensating processing.
Specifically, processing unit 50 performs the output data (temperature detection data) and D/A converter sections 80 for causing A/D converter sections 20
Input data (frequency control data) turn into Fig. 7 shown in corresponding relation temperature-compensating processing.Fig. 7 corresponding relation (frequency
Rate checking list) can be by the way that such as oscillator equipped with circuit arrangement be put into thermostat, the D/A converter sections of monitoring at each temperature
The method of 80 input data (DDS) and the output data (DTD) of/D converter sections 20 etc. is obtained.
Also, the coefficient data of the approximate function of the temperature-compensating of the corresponding relation for realizing Fig. 7 is stored in circuit dress
In the memory portion (nonvolatile memory) put.Also, processing unit 50 is according to the coefficient data read from memory portion and comes
Calculation process is carried out from the temperature detection data DTD of A/D converter sections 20, hereby it is achieved that the frequency of oscillation for making oscillator XTAL
Stationary temperature compensation deals are kept independent of temperature.
In addition, the temperature detection voltage VTD in temperature sensor portion 10 has for example negative temperature characterisitic as described later.Accordingly, it is capable to
Enough using the temperature compensation characteristic shown in Fig. 7, the temperature that Fig. 6 oscillator XTAL frequency of oscillation is compensated by offsetting is interdependent
Property.
3. the method for present embodiment
Then, the method for describing present embodiment in detail.First, using Fig. 8, the GPS (Global produced due to frequency hopping are illustrated
Positioning System) communication mistake.Also, illustrate the C/N characteristics of oscillator 400 using Figure 16~Figure 19 and post
It is raw.
3.1 frequency hopping
The information relevant with satellite orbit, moment etc. is included in Fig. 8 navigation message by gps satellite, is used as gps satellite signal
Sent with 50BPs data rate.Therefore, the length of 1 bit is 20msec (20 cycles of PN codes).1 navigation message is by 1
Individual prime frame is constituted, and 25 frames that 1 prime frame is made up of 1500 bits are constituted.
Gps satellite signal is modulated according to the bit value of navigation message with BPSK modulation systems as shown in Figure 8.Specifically, it is right
Navigation message is multiplied by PN codes (pseudo noise code) to carry out frequency spectrum diffusion, and carrier wave is multiplied by the signal after frequency spectrum diffusion
(1575.42MHz), thus carries out BPSK modulation.In fig. 8 it is shown that the PN codes of the B1 parts of navigation message, and PN codes are shown
The carrier wave of B2 parts.The timing of the logic level change of PN codes, phasing back occurs for carrier wave as shown in B3.1 wavelength of carrier wave
Period is 0.635ns or so.GPS receives the carrier wave of the navigation message after being modulated with BPSK modulation systems, by carrying out
The demodulation process of the reception signal of carrier wave, obtains navigation message.
In the demodulation process of such reception signal, do not make the residual error frequency between the frequency (1575.42MHz) of carrier wave
Shrink when in 4Hz/20msec, misinterpretation is produced in demodulation process.That is, during 1 bit long of GPS navigation message
In (cycle of GPS navigation message) TP=20msec, the residual error frequency between the frequency of carrier wave is not set to shrink when in 4Hz,
Produce communication mistake caused by frequency hopping.
Also, ratios of the above-mentioned 4Hz relative to the frequency 1575.42MHz of carrier wave is number ppb or so, therefore, shown in Fig. 2, Fig. 3
Permission frequency drift FD be also number ppb or so.
In such as GPS receiver, the oscillator signal generated according to the circuit arrangement (oscillator) by present embodiment, setting
The frequency of carrier wave in demodulation process.Accordingly, it would be desirable to make the frequency drift of the frequency of oscillation of oscillator signal in TP=20msec
Shrink in ± FD.Thereby, it is possible to prevent the generation of misinterpretation, energy in the demodulation process of the reception signal of gps satellite signal
Enough avoid producing communication mistake (receiving mistake).
But, in the oscillator of existing DTCXO etc. digital form, not by frequency drift in period TP (20msec)
Suppress in ± FD (number ppb or so).Therefore, because the frequency hopping shown in Fig. 3, exist is caused due to the misinterpretation of demodulation process
Produce problem points as communication mistake.
Therefore, in the present embodiment, by using the method illustrated in Fig. 9~Figure 13 etc., the problem of solving the frequency hopping.
In fig .9, if frequency control voltage corresponding with the 1st temperature T1 is the 1st control voltage VC1.In addition, setting and the 2nd temperature
The corresponding frequency control voltages of T2 are the 2nd control voltage VC2.The frequency control voltage (vibrational control voltage) is Fig. 4, Fig. 5
The frequency control voltage of oscillating circuit 150, the output voltage VQ with such as D/A converter sections 80 is corresponding.1st temperature T1, the 2nd temperature
T2 is the temperature detected by temperature sensor portion 10, corresponding with the temperature detection data DTD from A/D converter sections 20.
The temperature detection data DTD of such as A/D converter sections 20 when setting temperature as the 1st temperature T1 is the 1st temperature detection data
DTD1.If the temperature detection data DTD of the A/D converter sections 20 when temperature is the 2nd temperature T2 is the 2nd temperature detection data DTD2.
In this case, under the temperature compensation characteristic that Fig. 9 the 1st control voltage VC1 is illustrated in Figure 7, as with the 1st temperature examine
Survey the corresponding frequency control voltages of data DTD1.In addition, the 2nd control voltage VC2 is under said temperature compensation characteristic, as with
The corresponding frequency control voltages of 2 temperature detection data DTD2.
In addition, in fig .9, for convenience, it is assumed that frequency control voltage elevated situation when temperature is raised.That is, can by Fig. 6, Fig. 7
Know at an elevated temperature, there is the elevated temperature range of frequency control voltage, also there is the temperature that frequency control voltage is reduced
Scope, herein it is assumed that the former situation is illustrated.
As shown in Figure 10, in the case where being changing into the 2nd temperature T2 from the 1st temperature T1, the control electricity of the 1st control voltage VC1 and the 2nd
The differential voltage for pressing VC2 is VDF.Therefore, if not doing any research, the 2nd temperature T2 situation is being changing into from the 1st temperature T1
Under, the output voltage VQ of D/A converter sections 80 is changing into VC2 from VC1.That is, the output voltage VQ of D/A converter sections 80 is with differential voltage
VDF step change.
That is, as it was previously stated, the 1st control voltage VC1 is under Fig. 7 temperature compensation characteristic, as with the 1st temperature detection data DTD1
Corresponding frequency control voltage, the 2nd control voltage VC2 turns into frequency control voltage corresponding with the 2nd temperature detection data DTD2.
Therefore, it is generally the case that D/A converter sections 80 export frequency corresponding with the 1st temperature detection data DTD1 under the 1st temperature T1
Control voltage is the 1st control voltage VC1, under the 2nd temperature T2, exports frequency control corresponding with the 2nd temperature detection data DTD2
Voltage processed is the 2nd control voltage VC2.Therefore, the output voltage VQ of D/A converter sections 80 is changed into the 2nd control from the 1st control voltage VC1
Voltage VC2 processed, is significantly changed with differential voltage VDF stride.
Also, when the output voltage VQ of D/A converter sections 80 in this wise is significantly changed with differential voltage VDF stride, produce Fig. 3
Shown frequency hopping.That is, Fig. 4, Fig. 5 oscillating circuit 150 make the output voltage VQ of D/A converter sections 80 as frequency control voltage
Oscillator XTAL vibrates.Therefore, when the output voltage VQ of D/A converter sections 80 is with differential voltage VDF step change, oscillator XTAL
Frequency of oscillation also with step change corresponding with differential voltage VDF.As a result, producing the frequency hopping shown in Fig. 3, produce
Communication mistake illustrated in fig. 8.
Therefore, in the present embodiment, as shown in figure 11, in temperature from the case that the 1st temperature T1 is changing into the 2nd temperature T2,
With the output of the voltage amplitude variation smaller than the 1st control voltage VC1 and the 2nd control voltage VC2 differential voltage VDF absolute value
Voltage VQ is output to oscillating circuit 150 from D/A converter sections 80.
Differential voltage VDF absolute value is, for example, | VC1-VC2 |.In such a case it is possible to be VC1 ＞ VC2 or VC1
<VC2.Further, since without temperature change etc., in the case of VC1=VC2 (DTD1=DTD2), output voltage VQ change
Voltage amplitude is naturally also 0V, and differential voltage VDF absolute value is consistent with output voltage VQ change voltage amplitude.That is, the feelings
Condition turns into the exception of the method for present embodiment.
For example in the case of the method without use present embodiment, in the case that temperature is changing into T2 from T1, D/A converter sections
80 output voltage VQ is as shown in Figure 11 C1 with differential voltage VDF step change.
In this regard, in the method for present embodiment, as shown in Figure 11 C2, with the electricity smaller than differential voltage VDF absolute value
Pressure amplitude degree VA, changes the output voltage VQ of D/A converter sections 80.Voltage amplitude VA is, for example, the output voltage VQ in period TDAC
Voltage change.
As shown in Figure 11 C2, if for VA<VDF and change the output voltage VQ of D/A converter sections 80, then with C1 situation
Compare, the change of the frequency of oscillation of oscillating circuit 150 is also very small.Therefore, it is possible to suppress the generation of the frequency hopping shown in Fig. 3, also
The generation of communication mistake illustrated in fig. 8 can be prevented.
More specifically, in the present embodiment, D/A converter sections 80 in the minimum resolution for setting the data during D/A is changed into LSB
In the case of, export with the output voltage VQ of the step change of voltage corresponding with k × LSB (k >=1).For example such as Figure 11 C2
It is shown, the output voltage VQ of D/A converter sections 80 with the stride of voltage corresponding with k × LSB it is stepped (periodically) become
Change.That is, above-mentioned voltage amplitude VA is, for example, the stride of the voltage corresponding with k × LSB of D/A converter sections 80.As long as in addition, electricity
Pressure amplitude degree VA below the stride of voltage corresponding with k × LSB, can also the variation of use example as be described hereinafter method
Deng so that the stride of VA ratios voltage corresponding with k × LSB is small.
Here, LSB is the minimum for the data (the frequency control data DDS that processing unit 50 is exported) for being input into D/A converter sections 80
Resolution ratio.Also, voltage corresponding with LSB is the voltage i.e. minimum resolution voltage of the minimum resolution of D/A conversions.Therefore,
K times of voltage of the voltage corresponding with k × LSB equivalent to the minimum resolution voltage.
In addition, in the case where for example setting the resolution ratio of D/A converter sections 80 as i bits, k<2i, k is than 2iSufficiently small integer
(such as k=1~8).More specifically, by setting modulation circuit 90 etc., expand in the resolution ratio of D/A converter sections 80 from n-bit
In the case of exhibition to i=n+m bits, k can be set to<2m。
For example in case of k=1, the output voltage VQ of D/A converter sections 80 is with the stride with 1LSB (1 bit) corresponding voltage
Change.The output voltage VQ of such as D/A converter sections 80 is with (periodically) change stepwise of the stride of voltage corresponding with 1LSB
Change (increase reduces).
That is, independent of input to D/A converter sections 80 input data DDS, D/A converter section 80 output voltage VQ with 1LSB
The step change of (k × LSB in the broadest sense) corresponding voltage.This can be realized in the following way：Such as Fig. 5 processing unit 50
(output section 70) in the case where temperature is from the 1st temperature change into the 2nd temperature, output in units of 1LSB (k × LSB units) from
Frequency control data DDS of the 1st data variation corresponding with the 1st temperature to the 2nd data corresponding with the 2nd temperature.
In addition, the change of the stride stage with voltage corresponding with k × LSB shown in Figure 11 C2 can be in the following way
Realize：Processing unit 50 is with fast defeated of the output speed than the temperature detection data DTD (DTD1, DTD2) from A/D converter sections 20
Go out speed, output frequency control data DDS (D/A converter sections 80 carry out D/A conversions).
For example, A/D converter sections 20 are as shown in figure 11 every period TAD output temperature detection data DTD.For example, A/D converter sections 20
Output 1st temperature detection data DTD1 corresponding with the 1st temperature T1, then, after period TAD, is exported and the 2nd temperature T2
Corresponding 2nd temperature detection data DTD2.A/D conversion interval (temperature detection voltages of the period TAD equivalent to A/D converter sections 20
Sampling interval), output speeds of the 1/TAD equivalent to A/D converter sections 20.
Also, A/D converter sections 20 receive the 2nd temperature detection data DTD2's when exporting the 2nd temperature detection data DTD2
Processing unit 50 carries out the Digital Signal Processing such as temperature-compensating processing, exports frequency control corresponding with the 2nd temperature detection data DTD2
Data DDS processed.Now, shown in Figure 21, the Figure 22 of processing unit 50 as be described hereinafter, frequency control data DDS is made using k × LSB as unit
Change steppedly.Therefore, receive the frequency control data DDS changed by unit of k × LSB and carry out D/A conversions
D/A converter sections 80 output voltage VQ also as shown in Figure 11 C2, every period TDAC with voltage corresponding with k × LSB
Step change.
Here, period TDAC is equivalent to the D/A conversion intervals of D/A converter sections 80, (the frequency control data DDS's of processing unit 50 is defeated
Go out interval), output speeds of the 1/TDAC equivalent to processing unit 50, D/A converter sections 80.
Also, as shown in figure 11, TAD ＞ TDAC, compared with the output speed 1/TAD of A/D converter sections 20, processing unit 50, D/A turn
Change the output speed 1/TDAC in portion 80 faster.Therefore, even if every period TDAC (each output speed 1/TDAC) output electricity
Pressure VQ amplitude of variation is VA=k × LSB voltage so small voltage amplitude, and in period TAD, output voltage VQ also can
Control voltage VC2 is changing into from control voltage VC1.That is, T2 is changing into from T1 in temperature, temperature detection data are changing into from DTD1
In the case of DTD2, during as A/D conversion intervals in TAD, can make output voltage VQ from temperature detection data
The corresponding control voltage VC1 of DTD1 are changing into control voltage VC2 corresponding with temperature detection data DTD2.Also, electricity now
The voltage amplitude VA of buckling is smaller, it is thus possible to which enough suppress to produce frequency hopping.
Figure 12 is the figure for the method for illustrating present embodiment in frequency field.For example, setting the (D/A of oscillator signal generative circuit 140
Converter section 80 and oscillating circuit 150) frequency of oscillation changeable frequency scope be FR.For example, 140 pairs of oscillator signal generative circuit
The Pin Shuai Tone that temperature change is carried out shown in Figure 13 are whole, and the changeable frequency scope during the Pin Shuai Tone are whole is FR.That is, if corresponding
Frequency adjustment range is shunk in the temperature change in changeable frequency scope FR, then can be entered by oscillator signal generative circuit 140
Line frequency Shuai Tone are whole.
In addition, setting the permission frequency drift of the frequency of oscillation in specified time limit TP as FD.In order to prevent for example to say in fig. 8
Bright communication mistake is, it is necessary to make the frequency drift of the frequency of oscillation in specified time limit TP shrink in permission frequency drift FD.
Due to the frequency hopping shown in Fig. 3, the frequency drift of frequency of oscillation is not contracted when allowing in frequency drift FD, in such as gps satellite
Misinterpretation is produced in the demodulation process of the reception signal of signal etc., communication mistake is produced.
In addition, setting the full range voltage of D/A converter sections 80 as VFS.D/A converter sections 80 can make output voltage VQ in the full scale
Change in the range of voltage VFS.Full range voltage VFS is equivalent to the FREQUENCY CONTROL number for being input into such as D/A converter sections 80
According to DDS such as 0~2iVoltage range when changing like that in gamut.
Also, the voltage for the output voltage VQ being located under the D/A conversion intervals (TDAC) of D/A converter sections 80 illustrated in fig. 11 becomes
The voltage amplitude of change is VA.In this case, in the method for present embodiment, as shown in figure 12, following formula (1) is set up.
VA<(FD/FR)×VFS (1)
Specifically, in the case where setting the resolution ratio of D/A converter sections 80 as i bits, following formula (2) is set up.
1/2i<(FD/FR) (2)
By using the method for the present embodiment shown in above formula (1), (2), as shown in figure 12, specified time limit TP (example can be made
Such as 20msec) in, frequency of oscillation shunk in permitting relative to nominal frequency of oscillation fos (such as 16MHz or so) frequency drift
Perhaps (ppb or so is for example counted) in frequency drift FD.Thereby, it is possible to suppress the communication mistake as caused by the frequency hopping illustrated in Fig. 3 etc.
Deng generation.
For example, the right (FD/FR) × VFS of above formula (1) is to be multiplied by permission frequency to the full range voltage VFS of D/A converter sections 80
Obtained from the ratio between drift FD and changeable frequency scope FR (FD/FR).
Also, if make the voltage amplitude VA of the change of the output voltage VQ under the D/A conversion intervals (TDAC) of D/A converter sections 80
It is smaller than (the FD/FR) × VFS, then in frequency field, as shown in figure 12, the frequency relative to nominal frequency of oscillation fos can be made
Rate drift is shunk in permission frequency drift FD.That is, the voltage amplitude of the output voltage VQ of D/A converter sections 80 change can be made
VA can suppress the generation of frequency hopping as low as shown in Figure 11 C2.
For example when above formula (1) is invalid, as shown in figure 14, produce the frequency drift relative to nominal frequency of oscillation fos and do not receive
Shrinking in allows the frequency hopping in frequency drift FD, the communication mistake that generation is illustrated in Figure 8 etc..In the present embodiment, by making
The output voltage VQ of D/A converter sections 80 changes so that above formula (1) establishment, can suppress the generation of such frequency hopping, can prevent
Communication mistake etc..
That is, D/A converter sections 80 make output voltage VQ change in the range of full range voltage VFS, in the frequency shown in Figure 13
The frequency of oscillation of adjustment oscillating circuit 150 in variable range FR, thus, may be implemented in Fig. 6, frequency of oscillation illustrated in fig. 7
Temperature-compensating is handled.
But, become big in the voltage amplitude VA of the output voltage VQ of D/A converter sections 80 change, such as VA >=(FD/FR) × VFS
When, the frequency drift of frequency of oscillation produces the frequency hopping shown in Figure 14 beyond frequency drift FD is allowed.
In this regard, in the present embodiment, making the output voltage VQ of D/A converter sections 80 in VA<(FD/FR) × VFS relation is set up
Less voltage amplitude VA in change, can suppress produce Figure 14 shown in frequency hopping.
Also, in the case where setting the resolution ratio of D/A converter sections 80 as i bits, in the present embodiment, such as shown in above formula (2),
1/2i<(FD/FR) set up.
When being for example multiplied by the full range voltage VFS of D/A converter sections 80 to the both sides of above formula (2), as following formula (3).
VFS×1/2i<(FD/FR)×VFS (3)
Left side VFS × 1/2 of above formula (3)iVoltage (minimum resolution voltage) equivalent to the 1LSB of D/A converter sections 80.Above formula
(2), (3) mean to make VFS × 1/2 of the voltage equivalent to the 1LSBiLess than (FD/FR) × VFS.If being so set to VFS
×1/2i<(FD/FR) × VFS, then shown in the C2 such as Figure 11, make the output voltage VQ of D/A converter sections 80 with 1LSB voltage
Step change in the case of, the frequency drift of frequency of oscillation can suppress the generation of frequency hopping without departing from frequency drift FD is allowed.
In other words, the i bits of the resolution ratio as D/A converter sections 80 are set, so that above formula (2), (3) are set up.
In this case, ensure sufficient scope to consider the various deviations such as manufacture deviation, expect setting D/A converter sections 80
Resolution ratio so that 1/2 compared with (FD/FR)iIt is sufficiently small.Specifically, by the resolution setting of D/A converter sections 80 into for example
It is more than i=20 bits.
Thus, for example the permission frequency drift in specified time limit TP is several ppb or so situation as being illustrated in Figure 8
Under, above formula (2), (3) are enough to set up.Therefore, it is possible to effectively suppress generation of communication mistake etc. caused by frequency hopping.
For example, Figure 15 is to illustrate the improvement using the frequency drift in the method for Figure 11~present embodiment illustrated in fig. 13
Figure.Compare Fig. 2, Fig. 3 and Figure 15 to understand, according to the method for present embodiment, even in the circuit structure using DTCXO etc.
In the case of, it the frequency drift is retracted to the ATCXO identical degree with Fig. 2.
That is, in existing DTCXO etc. circuit arrangement, the frequency drift shown in Fig. 3, the original as communication mistake etc. are produced
Cause.
If in this regard, using the method for present embodiment, as shown in figure 15, frequency drift can be made to be retracted to Fig. 2's
ATCXO identical degree.Therefore, by the circuit structure being set to such as DTCXO, following distinctive effect is played：Can be
The reduction of the chip size of circuit arrangement and the raising of frequency accuracy are realized, while frequency hopping can be suppressed, communication mistake etc. is prevented
Generation.
3.2 parasitic and oscillator C/N characteristics
Produced due to frequency control data DDS variation (bit change for narrow sense in D/A converter sections 80) parasitic.First
Illustrate the parasitic characteristic.If the main signal amplitude voltage of oscillator 400 is Vo, the main signal frequency (oscillation frequency of oscillator 400
Rate) it is f0.Relative to Vo and f0, minimum bit changed in D/A converter sections 80 down scale and as phase when phase
Position noise (parasitism) meets following formula (4)~(10).
It is specifically described to various.In the case where setting the frequency of phase as fs, fs is equivalent to frequency control data DDS
Output frequency.Here, as shown in figure 4, in oscillator signal generative circuit 140 comprising D/A converter sections 80 and oscillating circuit 150
In the case of, frequency control data DDS output frequency fs is the sample frequency (1/TDAC) of D/A converter sections 80, frequency of oscillation
Changes delta f is the variable quantity of frequency of oscillation caused by 1 D/A conversion.
Minimum frequency resolution ratio be Δ f, therefore, set the phase swinging amplitude of phase asIn the case of,Every adopting
Sample frequency fs is swung in frequency change 0 or+Δ f or-Δ f.This considers the progress frequency variation in amplitude ± Δ f,
Therefore,Represented with following formula (4).
Using these variables, applying signal obtained by phase to main signal can be represented with following formula (5).
According to trigonometric function and long-pending formula, above formula (5) may be deformed to following formula (6).
In addition, in above formula (6), withCompared with 1 it is sufficiently small premised on simplified, above formula (6) may be deformed to following formula (7).
Also, according to trigonometric function and long-pending formula, above formula (7) may be deformed to following formula (8).
From above formula (8), signal component can the Section 1 as main signal, the side wave with in phase composition be located at main letter
The Section 2 and Section 3 sum of the position symmetrical above and below of number frequency is observed.The power ratio P_ of the main signal and side wave with
Ratio (fs) is obtained using mutual amplitude level by following formula (9).In addition, representing parasitic phase in units of dBc/Hz
For main signal intensity L (fs) when, as following formula (10).
Figure 16 D1 is the curve map for the general C/N characteristics (characteristic of phase noise) for representing oscillator 400.Figure 16 transverse axis
The detuning frequency relative to basic wave (frequency of oscillation) is represented with logarithm, the longitudinal axis represents signal intensity.From D1, oscillator
It is inevitable that phase noise is produced in 400, is designed premised on producing the phase noise.That is, even if generating
The parasitism of intensity shown in above formula (10), if the original phase noise of strength ratio oscillator is mutually small, in circuit arrangement 500
The parasitogenic influence is fully small, can suppress the precision reduction for the data to be obtained.On the contrary, as shown in Figure 16 D2, D3,
In the case where parasitic intensity is excessive compared with the original phase noise of oscillator, the C/N characteristics of oscillator 400 are posted due to this
Give birth to and deteriorate, the precision reduction for the data to be obtained.For example, causing the precision of positional information obtained according to GPS receiver signal
Reduction etc..
In the circuit arrangement 500 of present embodiment, as described above, making frequency control to suppress defect caused by frequency drift
Data DDS processed variation is k × below LSB.Therefore, it can expect that Δ f value is small to a certain degree, still, not have under this condition
There is the guarantee for the deterioration that can suppress parasitogenic C/N characteristics.That is, it needs to Δ f and fs relation be provided, so that FREQUENCY CONTROL
Data DDS variation is k × below LSB, also, parasitic turn into is oscillated the strong of the degree that the original phase noise of device is covered
Degree.
Illustrate specific relation example using Figure 17.Figure 17 E1 and Figure 16 D1 are identical, represent that the general C/N of quartz vibrator is special
Property.E1 is, for example, the C/N characteristics for the quartz vibrator that AT is cut, with the characteristics of Q values in claimed range worst (C/N characteristics are poor) feelings
Condition correspondence.That is, in actual circuit arrangement 500, it is designed to also not ask even if the phase noise for producing the intensity shown in E1
Topic, if it is possible to which it is that by the intensity of the E1 degree covered, then can suppress the reduction of data precision to make parasitic.
Figure 17 E2 represents Δ f/fs=1/106When parasitic intensity, E3 represents Δ f/fs=1/107When it is parasitic strong
Degree, E4 represents Δ f/fs=1/108When parasitic intensity.As shown in above formula (10), parasitic intensity is determined by Δ f/fs, because
This, in the case where Δ f/fs is setting, parasitic intensity is unrelated with detuning frequency and is fixed value, as E2~E4 is shown as
For the straight line parallel with transverse axis.In addition, parasitic detuning frequency is fs, therefore, for E2~E4, it is also contemplated that transverse axis is frequency
Rate control data DDS output frequency fs.This point is also same in E5, E6 described later.
Herein, if it is possible to be set to Δ f/fs<1/108, then the straight line shown in parasitic strength ratio E4 is low, therefore, it is possible to than E1
The original phase noise of shown oscillator is small.That is, in the circuit arrangement 500 of present embodiment, as long as meeting Δ f/fs<1/
108.But, in order to reduce Δ f/fs, it is necessary to increase fs or reduce Δ f.If fs is increased in D/A converter sections 80
Power consumption increases, and needs to improve the resolution ratio in D/A converter sections 8 if Δ f is reduced and (reduces frequency corresponding with 1LSB change
Amplitude of variation).That is, under the conditions of being set smaller than as setting by Δ f/fs, there is following trade-off relation：If increased
Big Δ f suppresses the requirement to resolution ratio, then must increase fs to increase the conversion speed in D/A converter sections 80, if reduced
Fs suppresses the requirement to D/A converter sections 80, then must reduce Δ f to ensure higher resolution ratio.Therefore, although meet Δ f/
fs<1/108Such condition is preferable, but to be difficult in view of realization.
Thus, in the present embodiment, it can also use than Δ f/fs<1/108The condition of mitigation.For example, present embodiment
D/A converter sections 80 have filter circuit 120 (or filter circuit 130 described later) in the rear class of D/A converter 100.Being capable of profit
The output voltage of D/A converter 100 is carried out with filter circuit 120 smoothly, thus reduce the variation of frequency of oscillation.That is, can
Substantially reduce Δ f using filter circuit 120.
If for example, the sample frequency fs of D/A converter 100 is set to higher, cutoff rate is set to using filter circuit 120
1/100 or so, then can be by parasitic improved strength 1/100 (below -40dB) left and right.Even if in this case, Δ f/fs=1/
106(E2) the parasitic intensity after, improving caused by filter circuit 120 is also in below E1, therefore, it is possible to be oscillated as parasitism
The state that the original phase noise of device is covered.That is, even if using Δ f/fs<1/106Such condition, can also suppress C/N special
Property Malignantization caused by precision reduction.
As described above, the circuit arrangement 500 of present embodiment has：A/D converter sections 20, it carries out coming from temperature sensor portion 10
Temperature detection voltage A/D conversions, output temperature detection data DTD；Processing unit 50, it enters according to temperature detection data DTD
The temperature-compensating processing of line of hitch oscillator frequency, exports the frequency control data DDS of frequency of oscillation；And oscillator signal generative circuit
140, it uses frequency control data DDS and oscillator XTAL from processing unit 50, what generation was set by frequency control data DDS
The oscillator signal of frequency of oscillation.Also, in order to suppress defect caused by frequency hopping etc., processing unit 50 is in temperature from the 1st temperature change
In the case of the 2nd temperature, output is unit from the 1st data variation corresponding with the 1st temperature to the 2nd with k × LSB (k >=1)
The frequency control data DDS of corresponding 2nd data of temperature.
Also, in the present embodiment, setting processing unit 50 to improve the precision of the data obtained using oscillator signal
The frequency control data DDS changed by unit of k × LSB output frequency is fs, if frequency control data DDS with k × LSB
In the case that the change for changing caused frequency of oscillation for unit turns to Δ f, Δ f/fs is met<1/106。
If frequency control data DDS change is using k × LSB as unit, thus Δ f size is also restrained.For example,
In the case that circuit arrangement 500 includes D/A converter 100, the amplitude of variation Δ VDAC of the output voltage of D/A converter 100 into
For value corresponding with frequency control data DDS amplitude of variation.The capacitance for the variable capacitance that oscillating circuit is included is according to voltage
And change, its variation coefficient (C/V) has determined that.In addition, the frequency of oscillation of oscillating circuit 150 is according to the capacitance of variable capacitance
Change, its variation coefficient (f/C) also has determined that.I.e., in this example embodiment, as Δ f=Δs VDAC × (C/V) × (f/C) so
Relation, therefore, the changes delta f of frequency of oscillation turns into value corresponding with frequency control data DDS amplitude of variation k × LSB.
That is, such 1st condition is changed by unit of k × LSB by meeting frequency control data DDS, Δ f is limited in regulation
Value is following, still, in the present embodiment, also meets Δ f/fs<1/106Set up such 2nd condition.Thereby, it is possible to suppress
Defect caused by frequency hopping etc., further, it is possible to suppress parasitogenic precision reduction.
In addition, values of the frequency control data DDS k × LSB specifically with what kind of Δ f is corresponding, according to k value, D/A converter
100 full scale, the characteristic of variable capacitance, characteristic of oscillating circuit 150 etc. are determined.In addition, for meeting Δ f/fs<1/106
Specific Δ f value it is fixed according to frequency control data DDS output frequency fs Decision.Therefore, in the 1st condition and the 2nd condition
Which condition is that strict condition is different according to situation, still, anyway, in the present embodiment, as long as being met
The setting of stricter condition.
In addition, as described above, the circuit arrangement 500 of present embodiment is in order to suppress defect caused by frequency hopping etc., setting vibration letter
The changeable frequency scope of number frequency of oscillation caused by generative circuit 140 is FR, the permission frequency of the frequency of oscillation in specified time limit
Drift about as FD, frequency control data DDS full scale value is at DFS, the frequency control data DDS of processing unit 50 output gap
, in the case that frequency control data DDS changing value is DV, DV<(FD/FR)×DFS.
By making frequency control data DDS changing value DV be DV<(FD/FR) × DFS, Δ f size is limited to.For example,
In the case where circuit arrangement 500 includes D/A converter 100, the change width Δ VDAC of the output voltage of D/A converter 100 into
For value corresponding with frequency control data DDS changing value DV.The capacitance for the variable capacitance that oscillating circuit is included is according to voltage
And change, its variation coefficient (C/V) has determined that.In addition, the frequency of oscillation of oscillating circuit 150 is according to the capacitance of variable capacitance
Change, its variation coefficient (f/C) also has determined that.I.e., in this example embodiment, as Δ f=Δs VDAC × (C/V) × (f/C) so
Relation, therefore, the changes delta f of frequency of oscillation turns into value corresponding with frequency control data DDS changing value DV.
That is, by making frequency control data DDS changing value DV meet DV<(FD/FR) the 1st condition as × DFS, Δ f quilts
It is limited in below setting, still, in the present embodiment, also meets Δ f/fs<1/1062nd condition as setting up.By
This, can suppress defect caused by frequency hopping etc., further, it is possible to suppress parasitogenic precision reduction.
In addition, values of the frequency control data DDS changing value DV specifically with what kind of Δ f is corresponding, according to D/A converter 100
Full scale, the characteristic of variable capacitance, the characteristic of oscillating circuit 150 etc. determine.In addition, for meeting Δ f/fs<1/106Tool
The Δ f of body value is fixed according to frequency control data DDS output frequency fs Decision.Therefore, which of the 1st condition and the 2nd condition
Condition is that strict condition is different according to situation, still, anyway, in the present embodiment, as long as being met more
The setting of strict condition.
In addition, Δ f/fs<1/106Such condition is obtained according to following viewpoint：No matter detuning frequency (frequency control data
DDS output frequency fs) it is what kind of value, parasitism can all be oscillated the original phase noise of device and cover.But, by Figure 17 E1
Understand, in larger frequency band is influenceed caused by 1/f noise, the original phase noise of the smaller then oscillator of frequency is bigger.That is, exist
In the relatively low frequency band of detuning frequency, even if producing the higher parasitism of intensity, the phase that the parasitism can also be oscillated device 400 is made an uproar
Sound is covered, and the influence to precision is smaller.
That is, it is unrelated with parasitic detuning frequency (fs), meet Δ f/fs<1/106Such condition, oscillator signal is based on from suppression
Data precision reduction so from the viewpoint of be sufficient condition, it is, however, possible to as excessively strict condition.
Thus, in the present embodiment, it can also use and Δ f/fs<1/106Different conditions.Figure 17 E5, E6 is to show
If the figure of parasitic characteristic when Δ f is given fixed value.As shown in figure 17, the unit of the longitudinal axis is being set as dBc/Hz, transverse axis
In the case of logarithm for detuning frequency, if parasitic intensity when Δ f is fixed value is expressed as the straight line of monotone decreasing.Also,
By changing Δ f, the section of straight line changes, and the parasitic intensity under the more big then identical detuning frequencies of Δ f is higher.Figure 17 E5
Parasitic characteristic during Δ f=0.1mHz is represented, E6 represents parasitic characteristic during Δ f=1mHz.
As shown in Figure 17, it is unrelated with the position on transverse axis as Δ f=0.1mHz E5, it is special positioned at the C/N for representing oscillator 400
The E1 of property lower section.That is, by meeting Δ f<0.1mHz, can make the original phase noise of the strength ratio oscillator of parasitism small.
But, Δ f<0.1mHz is also and Δ f/fs=1/108Same ideal conditions, even the condition actually more relaxed, right
The influence of precision is also smaller.Specifically, in the present embodiment, as long as the straight line shown in E6 is set as the upper limit, with Δ f<1mHz
For condition.
But, Δ f<Condition as 1mHz is also condition excessively strict under the larger situation of detuning frequency (fs).By upper
Formula (10) understands that the intensity of the more big then parasitisms of fs is smaller.That is, in the case where fs is larger, even if Δ f is larger, it can also suppress
The increase of parasitic intensity, the influence to precision is smaller.In Δ f<Under the conditions of 1mHz is such, it is possible to as larger in fs
In the case of can also make the too small such stringent conditions of Δ f.
Thus, in the present embodiment, Δ f/fs can also be switched according to situation<1/106With Δ f<1mHz.Specifically, only
To be that fs=1kHz carrys out switching condition as boundary using Figure 17 E2, E6 intersection point.It is fs >=1kHz feelings on the right side of intersection point
Under condition, E2 is located at E6 top, and therefore, E2 condition more relaxes.On the other hand, it is fs in the left side of intersection point<1kHz feelings
Under condition, E6 is located at E2 top, and therefore, E6 condition more relaxes.I.e., in the present embodiment, as long as with fs >=1kHz
In the case of, Δ f/fs<1/106, in fs<In the case of 1kHz, Δ f<1mHz is condition.Should thereby, it is possible to relax
The condition of satisfaction, thus it is for example possible to reduce the requirement of the resolution ratio to D/A converter 100, easily realizes circuit arrangement 500.
In addition, the method for present embodiment is not limited to that Δ f/fs is applied in combination<1/106With Δ f<1mHz.For example, it is also possible to be,
Processing unit 50 is in the case where temperature is from the 1st temperature change into the 2nd temperature, and output is unit from the 1st with k × LSB (k >=1)
Corresponding 1st data variation of temperature is setting processing unit 50 to the frequency control data DDS of the 2nd data corresponding with the 2nd temperature
The frequency control data DDS changed by unit of k × LSB output frequency is fs, frequency control data DDS using k × LSB as
In the case that the change of frequency of oscillation caused by unit change turns to Δ f, in fs<In the case of 1kHz, Δ f<1mHz.In addition,
Can set frequency control data DDS output frequency as fs, if being drawn with frequency control data DDS changing value DV changes
In the case that the change of the frequency of oscillation risen turns to Δ f, in fs<In the case of 1kHz, Δ f<1mHz.Now, fs >=1kHz's
In the case of, it can use and Δ f/fs<1/106Fs >=1kHz, can not also be set to the side of present embodiment by different conditions
The application of method.
In addition, meeting the various design methods of the circuit arrangement of conditions above it is also possible to consider Δ f and fs.For example, being filled according to circuit
Put, it is desirable to which the conversion speed (sample frequency) of D/A converter sections 80 is different.In given circuit arrangement, fs=can be set
Higher sample frequency as 100kHz；In different circuit arrangements, from the viewpoint of power consumption etc., it is contemplated that only allow fs
Relatively low sample frequency as=100Hz.In the circuit arrangement for allowing fs=100kHz, as long as described above by Δ f/fs<
1/106As condition, Δ f<100mHz.In this case, with Δ f<1mHz is compared to that can increase Δ f, even if resolution ratio
It is relatively low also to have no problem.On the other hand, in fs=100Hz circuit arrangement, as long as described above using Δ f<1mHz.
In this case, the requirement to resolution ratio is higher, but it is possible to realize the circuit arrangement of low-power consumption etc..
Here, the oscillator XTAL of present embodiment is, for example, quartz vibrator.Additionally, it is known that the characteristic such as frequency of oscillation of quartz vibrator
It is different according to the cut-out orientation relative to crystallographic axis.The quartz vibrator of present embodiment can be widely used AT cut oscillator or
Person SC cuts (Stress Compensation-cut) oscillator or SAW resonator.
AT cut oscillator be relative to crystallographic axis angle be 35.15 °, as 10MHz~500MHz oscillation source be used for SPXO,
TCXO, VCXO oscillator.In addition, SC cut oscillator be due at high temperature the minimum such feature of temperature characterisitic and as 10MHz
~100MHz oscillation source is used for OCXO oscillator.In addition, AT cuts oscillator and SC cuts the frequency of oscillation of oscillator and shaken by thickness shear
It is dynamic to determine.In addition, SAW resonator is the oscillator for applying surface acoustic wave (Surface Acoustic Wave), dependent on quartz
The electrode pattern on surface and vibrate.SAW resonator is that frequency of oscillation is up to 100MHz~3.5GHz, C/N characteristics preferably (Q values are high)
Oscillator.
In addition, Δ f/fs<1/106It is the condition relevant with the ratio between Δ f, fs.Accordingly it is contemplated that largely meeting Δ f/fs<1/106
Δ f, fs combination.Figure 18 is the value of Δ f, fs when deteriorating C/N characteristics and can obtain the preferable data of precision
The example of combination.Figure 18 F1 is (Δ f, fs)=(0.1Hz, 4MHz), and F2 is (Δ f, fs)=(4mHz, 100kHz), and F3 is
(Δ f, fs)=(1mHz, 10kHz).
In the present embodiment, the combination of Δ f, fs value is defined as one and without prejudice.For example, only by appointing in F1~F3
Meaning one is set to the combination of Δ f, fs value, is acted in circuit arrangement 500 so that meet the value that must be set.No
Cross, the method not limited to this of present embodiment, can also make Δ f, fs value be combined as it is variable.For example, it is also possible to keep
The candidate of the combination of this 3 kinds of values as Δ f, fs of F1~F3, any one in 3 kinds is used according to situation.
For example, whether within specified time limit, determining the value for Δ f, the fs to be used according to since being acted circuit arrangement 500
Combination.When starting action, the processing of the temperature-compensating to temperature detection data DTD is not carried out before this, therefore, what is exported shakes
The difference (following, to be expressed as frequency error) for the frequency of oscillation swung signal SSC frequency of oscillation and hoped is sometimes larger.Pass through processing
The temperature-compensating processing in portion 50, can obtain the frequency control data DDS for reducing frequency error (being 0 for narrow sense), but
It is in the present embodiment, to be limited with the variation of frequency of oscillation each time to be suppressed to make as Δ f.That is, in frequency control
In a period of data DDS processed 1 output, frequency error only reduces Δ f, frequency error is likely to require the long period for 0.
Therefore, in the present embodiment, Δ f can be set to larger value when starting action, and in order to meet Δ f/
fs<1/106And make fs also be larger value.If above-mentioned F1~F3 example, then using (the Δ f, fs) shown in F1=
(0.1Hz, 4MHz).Thus, Δ f is larger, therefore, it is possible to make the frequency of oscillation of oscillator signal is close to be hoped in the short period of time
Frequency (making frequency error close to 0).
But, it must also increase to increase Δ f, fs, bring increase of power consumption etc..Thus, when have passed through a certain degree of
Between in the case of (or, frequency error it is small to a certain extent in the case of), expect reduce Δ f, reduce fs.If Figure 18
Example, the then combination of Δ f, the fs that will use value is altered to (Δ f, fs)=(4mHz, the 100kHz) shown in F2 from F1.This
Outside, in the case of further across the time (in the case that frequency error diminishes), Δ f, the fs's that will can also be used
The combination of value is altered to (Δ f, fs)=(1mHz, the 10kHz) shown in F3 from F2.
Figure 19 is the figure for illustrating the control of the above.Figure 19 longitudinal axis represents frequency error (Hz), transverse axis represented with logarithm from
Start the elapsed time risen during action (during startup).As shown in Figure 19 t1~t2, utilized from starting within specified time limit
Parameter actions shown in F1.Sample frequency fs is higher, and frequency variation Δ f each time is also larger, therefore, it is possible to short
Make the frequency error of more than 0.2Hz on startup in time close to 0.In addition, utilizing the ginseng shown in F2 in a period of t2~t3
Number action, after the t3 in a period of utilize the parameter actions shown in F3.
Thereby, it is possible to realize Δ f/fs using parameter corresponding with situation<1/106Shown condition.Specifically, missed in frequency
Difference is possible under larger situation, is following the trail of desired value at high speed, and in the case of completing a certain degree of tracking, is reduced
Fs suppresses the increase of power consumption.
In addition, here, illustrating the combination of Δ f, fs value has 3 kinds of example, but naturally it is also possible to be 2 kinds, can also be
More than 4 kinds.As long as in addition, Δ f, fs meet Δ f/fs<1/106, specific numerical value is also not necessarily limited to Figure 18 F1~F3.This
Outside, show and meeting Δ f/fs<1/106It is variable example to make Δ f and fs under the conditions of such, but it is also possible to make
Frequency control data DDS using k × LSB (k >=1) be unit change it is such under the conditions of make k to be variable.
In addition, more than, structure of the oscillator signal generative circuit 140 comprising D/A converter sections 80 is illustrated, still, this reality
Apply the method not limited to this of mode.For example, in shaking using the structure not comprising D/A converter sections 80 using Figure 39 as described later
, can also be by meeting Δ f/fs in the case of swinging signal generating circuit 140<1/106、Δf<Condition as 1mHz, suppresses
The deterioration of parasitogenic C/N characteristics, realizes that the preferable data of precision are obtained.In addition, in oscillator signal generative circuit 140 not
In the case of D/A converter sections 80, filter circuit 120 (filter circuit 130) does not include yet, it is also possible to filtered without reduction
It is parasitic caused by circuit 120.In this case, the condition that Δ f, fs should be met can also be made than Δ f/fs<1/106、Δf<
Condition is strict as 1mHz.
4. detailed configuration example
4.1 processing unit
Then, the detailed construction example in each portion of the circuit arrangement of present embodiment is shown.Figure 20 is show processing unit 50 detailed
The figure of configuration example.
As shown in figure 20, processing unit 50 (DSP portions) includes control unit 52, operational part 60, output section 70.Control unit 52 carries out computing
Portion 60, the control of output section 70 and various judgements processing.Operational part 60 is according to the temperature detection data from A/D converter sections 20
DTD enters the computing of the temperature-compensating processing of line of hitch oscillator frequency.Output section 70 receives the operation result data from operational part 60, defeated
Go out frequency control data DDS.
Control unit 52 includes determination unit 53.Determination unit 53 has comparing section 54,55, is entered according to the comparative result of comparing section 54,55
The various determination processings of row.
The containing type converter section 61 of operational part 60,62,68, multiplexer 63,65, arithmetic unit 64, work register 66,67,
69.Arithmetic unit 64 includes multiplier 58 and adder 59.
Type converter section 61 is enter to the coefficient data from memory portion 180, carries out from binary type (integer) to floating-point
The type conversion of type (single precision), the coefficient data after type is changed is output to multiplexer 63.Type converter section 62
The temperature detection data DTD from A/D converter sections 20 is enter to, the type conversion from binary type to floating point type is carried out,
Temperature detection data DTD after type is changed is output to multiplexer 63.Binary temperature of such as 15 bits is examined
Survey data DTD carry out type conversion and change into 32 bits floating data (bit of index portion=8, the bit of mantissa=23, symbol=
1 bit).In addition, multiplexer 63 is enter to the fixed number data from the fixed value of storage temperature compensation deals
The ROM190 fixed number data.
The output data of the Selecting operation device 64 of multiplexer 63, the output data of work register 66,67, type converter section
61st, any one in 62 output data, ROM190 output data is output to arithmetic unit 64.Arithmetic unit 64 utilizes multiplier
58 and adder 59, the calculation process such as the product of the floating-point of 32 bits and computing is carried out, temperature-compensating processing is thus performed.It is many
Any one in the multiplier 58 of the Selecting operation device 64 of path multiplexer 65 and the output data of adder 59, is output to work
Any one party in register 66,67 and type converter section 68.Type converter section 68 is by the computing of operational part 60 (arithmetic unit 64)
Result data is converted into binary type from floating point type type.The operation result data of the floating-point of 32 bits are for example subjected to class
Binary operation result data of 20 bits are changed and become to type.Operation result data after type conversion are maintained at work and posted
In storage 69.
Operational part 60 (arithmetic unit 64) is carried out with such as 5 times approximate function (multinomial) approximate diagram 6 such as shown in following formula (11)
The temperature-compensating processing of the curve of temperature characterisitic.
VCP=b (T-T0)5+ c (T-T0)4+ d (T-T0)3+ e (T-T0) (11)
In above formula (11), T-phase is when in the temperature represented by temperature detection data DTD, T0 is equivalent to fiducial temperature (such as 25
℃).B, c, d, e are the coefficients of approximate function, and the data storage of the coefficient is in memory portion 180.Arithmetic unit 64 performs above formula
(11) calculation process such as product and computing.
Device 74 is calculated comprising multiplexer 71, output register 72, LSB adders 73, LSB Minus in output section 70.Multiplexer
The 71 operation result data, the output data of LSB adders 73, LSB Minus for being selected as the output data of operational part 60 calculate device 74
Output data in any one be output to output register 72.The monitoring work register 69 of determination unit 53 of control unit 52
The output data of output data and output register 72.Also, progress is compared to determine using the various of comparing section 54,55, according to
Result of determination controls multiplexer 71.
In the present embodiment, output section 70 is as shown in Figure 21, Figure 22, in situation of the temperature from the 1st temperature change into the 2nd temperature
Under, output is from 1st data DAT1 to 2nd temperature corresponding 2nd data DAT2 corresponding with the 1st temperature, using k × LSB to be single
The frequency control data DDS of position change.Export such as k=1, the frequency control data DDS changed in units of 1LSB.
For example, the operation result data as the operational part 60 of last time ((n-1)th timing) that are stored with output register 72
The 1st data DAT1.The operation result number being stored with work register 69 as the operational part 60 of this (n-th timing)
According to the 2nd data DAT2.
Also, output section 70 is as shown in figure 21, and last time is used in the 2nd data DAT2 of the operation result data as this
In the case that 1st data DAT1 of operation result is big, carry out to the 1st data DAT1 add as setting 1LSB (broad sense and
Say k × LSB) processing, untill addition result data reach the 2nd data DAT2, and will add up result data as frequency
Rate control data DDS and export.
On the other hand, output section 70 as shown in figure 22, is less than conduct in the 2nd data DAT2 of the operation result data as this
In the case of 1st data DAT1 of the operation result of last time, carry out from the 1st data DAT1 subtract as setting 1LSB (k ×
LSB processing), until subtracting each other untill result data reaches the 2nd data DAT2, and will subtract each other result data as FREQUENCY CONTROL
Data DDS and export.
Specifically, 53 pairs of the determination unit of control unit 52 is stored in output register 72 the 1st data DAT1 and is stored in work
The 2nd data DAT2 in register 69 is compared.Its judgement compared is carried out by comparing section 54.
Also, as shown in figure 21, in the case where DAT2 is bigger than DAT1, carried out by LSB adders 73 to output register 72
DAT1 adds 1LSB processing, and the output data of LSB adders 73 is selected by multiplexer 71.Thus, in output register
In 72, as shown in figure 21, keep adding addition result data obtained from 1LSB successively to DAT1.Also, it will add successively
1LSB and the addition result data that update are exported as frequency control data DDS.Also, be repeated the addition processing until
Untill addition result data reach DAT2.The consistent comparison judged to addition result data and DAT2 is handled by comparing section
55 are carried out.
On the other hand, as shown in figure 22, in the case where DAT2 is smaller than DAT1, carried out by LSB adders 74 to output register
72 DAT1 subtracts 1LSB processing, and the output data of LSB adders 73 is selected by multiplexer 71.Thus, posted in output
In storage 72, as shown in figure 22, holding subtracts each other result data obtained from subtracting 1LSB successively from DAT1.Also, it will subtract successively
The result data that subtracts each other for removing 1LSB and updating is exported as frequency control data DDS.Also, this is repeated and subtracts each other processing directly
Untill subtracting each other result data and reaching DAT2.
In addition, the maximum times that the addition that LSB adders 73, LSB Minus calculate device 74 handled, subtracted each other processing are configured to stipulated number
(such as 8 times).And it is possible to which the maximum temperature change to such as environment temperature is provided (such as 2.8 DEG C/10 seconds).Therefore,
Carry out setting and cause temperature change (temperature corresponding with the voltage of such as 1LSB × 8 time corresponding with such as 1LSB × stipulated number
Degree change) change well beyond above-mentioned maximum temperature.
In addition, as being illustrated in Figure 11, the frequency control data DDS of processing unit 50 output speed (1/TDAC) compares A/
The temperature detection data DTD of D converter sections 20 output speed (1/TAD) is fast.Thus, for example in fig. 11 from A/D converter sections 20
To after the input temp of processing unit 50 detection data DTD2, the TAD during before being next transfused to temperature detection data DTD3
It is interior, it can perform the processing that 1LSB is added or subtracted given number of times shown in Figure 21, Figure 22.For example it can perform above-mentioned maximum time
Number is the addition processing of stipulated number (such as 8 times) or subtracts each other processing.
As described above, according to the processing unit 50 of Figure 20 structure, as shown in Figure 21, Figure 22, can for example export from the 1st temperature
(the 1st temperature detection data DTD1) corresponding 1st data DAT1 is to corresponding with the 2nd temperature (the 2nd temperature detection data DTD2)
2nd data DAT2, the frequency control data DDS changed by unit of k × LSB.Thereby, it is possible to pass through the frequency control of processing unit 50
Data DDS processed output control, realizes the method in Figure 11~present embodiment illustrated in fig. 13.
In addition, in the present embodiment, can be for example, by the 32 high-precision calculation process realization such as operational parts than top grade
60 processing.Thus, for example when carrying out type conversion to the operation result data of the floating-points of 32 bits in type converter section 68,
The mantissa of 23 bits ensured according to precision, can obtain binary frequency control data DDS (fortune of such as 20 bits
Calculate result data).Thus, as described in Figure 5, can be by the frequency control data DDS of such as i=20 bits from
Reason portion 50 is input to D/A converter sections 80.Also, the data of m=4 bit of the modulation circuit 90 in i=20 bits, to frequency
The data of control data DDS n=16 bits are modulated, and the data of the n=16 bits after 100 pairs of modulation of D/A converter are entered
Row D/A is changed, thereby, it is possible to the D/A conversions for the resolution ratio for realizing i=20 bits.
4.2D/A converter section
Figure 23, Figure 24 are the figures for the detailed construction example for showing D/A converter sections 80.D/A converter sections 80 include modulation circuit 90, D/A
Converter 100, filter circuit 120.
As shown in figure 23, D/A converter 100 comprising the high position D/A converter DACA of side, the D/A converter DACB of low level side with
And operational amplifier (computing amplifier) OPA, OPB, OPC of voltage follow connection.
High-order side DACA is enter to the data of the high-order q bits in the data DM of the n-bit of automodulation circuit 90 (n=q+p),
Low level side DACB is transfused to low level p bits (such as p=q=8) data.These high-order side DACA, low level side DACB be from by
The multiple resistance being for example connected in series carry out selecting electricity corresponding with input data in multiple segmentation voltages of voltage division
The D/A converter of the resistance serial type of pressure.
As shown in figure 24, high-order side DACA includes the node and low potential side electricity for being connected in series in hot side supply voltage VDDA
Multiple resistance RA1~RAN between source voltage VSS node.In addition, high position side DACA is comprising one end and based on these resistance
Multiple switch element SA1~SAN+1, the number according to data DM high-order q bits of RA1~RAN voltage division node connection
The decoder 104 (ON-OFF control circuit) of switch element SA1~SAN+1 switch controlling signal is connected or disconnected according to generation.
Also, high position side DACA is by the two ends of the resistance determined by the data of the high-order q bits in multiple resistance RA1~RAN
Split a segmentation voltage output in voltage to operational amplifier OPA non-inverting input terminal, by another segmentation voltage
It is output to operational amplifier OPB non-inverting input terminal.Thus, the operational amplifier that a voltage is connected by voltage follow
OPA carries out impedance transformation, and low level side DACB is supplied to as voltage VX.In addition, what another voltage was connected by voltage follow
Operational amplifier OPB carries out impedance transformation, and low level side DACB is supplied to as voltage VY.
In the case where resistance RA1 is determined by the data of such as high position q bits, by the segmentation voltage at resistance RA1 two ends
The segmentation voltage of hot side switch element SA1 through the turned on and operational amplifier OPA are provided as voltage VX.This
Outside, the segmentation voltage of low potential side switch element SA2 through the turned on and operational amplifier OPB are carried as voltage VY
For.In addition, in the case where determining resistance RA2 by the data of high-order q bits, will be low in the segmentation voltage at resistance RA2 two ends
The segmentation voltage of current potential side switch element SA3 through the turned on and operational amplifier OPA are provided as voltage VX.In addition,
The segmentation voltage of hot side switch element SA2 through the turned on and operational amplifier OPB are provided as voltage VY.
Low level side DACB includes the multiple resistance RB1~RBM being connected in series between voltage VX node and voltage VY node.
In addition, low level side DACB includes the multiple switch element that one end is connected with the voltage division node based on these resistance RB1~RBM
SB1~SBM+1 and connect or disconnect switch element SB1~SBM+1's according to the data generation of data DM low level p bits
Decoder 106 (ON-OFF control circuit) including switch controlling signal.
Also, low level side DACB selects the data by low level p bits in multiple segmentation voltages based on resistance RB1~RBM
1 selected out splits voltage alternatively voltage, and switch element through the turned on is output to the operation amplifier that voltage follow is connected
Device OPC non-inverting input terminal.Thus, the selection voltage is exported as the output voltage VDA of D/A converter 100.
Figure 25, Figure 26, Figure 27 are the explanation figures of modulation circuit 90.As shown in figure 25, modulation circuit 90, which is received, comes from processing unit 50
I=(n+m) bit frequency control data DDS.Also, according to the data of frequency control data DDS low level m bits
(bit b1~b4), carries out the PWM of the data of frequency control data DDS high-order n-bit (bit b5~b20).Also,
As illustrated in Figure 23, Figure 24, the data (bit b13~b20) of the high-order q bits in the data of the n-bit are defeated
Enter to high-order side DACA, the data (bit b5~b12) of low level p bits are input into low level side DACB.
Figure 26 is the explanation figure of the 1st mode of PWM.DY, DZ are the data of data DM high-order n-bit, are in n-bit table
The data that DY=DZ+1 is set up in existing.
In the case where the dutycycle represented by the data of the low level m=4 bits for PWM is, for example, 8 to 8, such as Figure 26
It is shown, the data DZ of the data DY of 8 16 bits and 8 16 bits is output to D/A from modulation circuit 90 in a time division manner and turned
Parallel operation 100.
In addition, in the case where the dutycycle represented by the data of low level m=4 bits is 10 to 6, in a time division manner by 10 numbers
According to DY and 6 data DZ D/A converter 100 is output to from modulation circuit 90.Similarly, in the tables of data by low level m=4 bits
In the case that the dutycycle shown is 14 to 2,14 data DY and 2 data DZ are exported in a time division manner.
Figure 27 is the explanation figure of the 2nd mode of PWM.In each bit b4, b3, b2, b1 of the m=4 bits for PWM
In the case of logic level " 1 ", selection in figure 27 output mode corresponding with each bit (what is shown on the right side of each bit is defeated
Exit pattern).
In the case of such as bit b4=1, b3=b2=b1=0, only export corresponding with bit b4 in period P1~P16
Output mode.That is, by the data of n=16 bits according to DZ, DY, DZ, DY order in a time division manner, from modulation electricity
Road 90 is output to D/A converter 100.Thus, data DY, DZ output times totally 8 times, it is achievable to be with dutycycle in fig. 26
8 to 8 situation identical PWM.
In addition, in the case of bit b4=b2=1, b3=b1=0, exporting corresponding with bit b4, b2 in period P1~P16
Output mode.Thus, the output times of data DY, DZ are respectively 10 times, 6 times, and achievable and dutycycle is 10 to 6 situation
Identical PWM.Similarly, in the case of bit b4=b3=b2=1, b1=0, data DY, DZ output times point
Wei not be 14 times, 2 times, achievable and dutycycle is 14 to 2 situation identical PWM.
As described above, according to Fig. 5, Figure 23 modulation circuit 90, PWM can be achieved in only output times of control data DY, DZ etc.
Modulation, although be the D/A converter 100 using such as resolution ratio of 16 bits, can also realize D/A more than such as 20 bits
The resolution ratio of conversion.
In the D/A conversions of the less resistance serial type of such as noise or resistance ladder type, the resolution ratio of such as 16 bits or so is real
Boundary in matter.At this point, according to Fig. 5, Figure 23 structure, only setting the less modulation circuit 90 of circuit scale and filtering
Circuit 120, you can bring up to the resolution ratio that D/A is changed more than such as 20 bits.Therefore, it is possible to by the increase of circuit scale
Min. is suppressed to, while improving the resolution ratio of D/A converter sections 80.Also, by improving the resolution ratio of D/A converter sections 80,
The high precision int of frequency precision of oscillation can be realized, can suppressing frequency hopping, there is provided the oscillator for being suitable for timing synchronization.
4.3 temperature sensor portions, oscillating circuit
Figure 28 shows the 1st configuration example in temperature sensor portion 10.Figure 28 temperature sensor portion 10 has current source IST and current collection
Pole is provided to the bipolar transistor TRT from current source IST electric current.Bipolar transistor TRT turns into its colelctor electrode and base
Extremely connected diode connection, is examined to temperature of the node output with temperature characterisitic of bipolar transistor TRT colelctor electrode
Survey voltage VTD.Temperature detection voltage VTD temperature characterisitic is due to bipolar transistor TRT emitter-to-base voltage
Temperature dependency and produce.As shown in figure 30, there is temperature detection voltage VTD negative temperature characterisitic (to have 1 rank of negative gradient
Temperature characterisitic).
Figure 29 shows the 2nd configuration example in temperature sensor portion 10.In Figure 29, Figure 28 current source IST is realized by resistance RT.And
And, resistance RT one end and the node of supply voltage are connected, and the other end is connected with bipolar transistor TRT1 colelctor electrode.This
Outside, bipolar transistor TRT1 emitter stage is connected with bipolar transistor TRT2 colelctor electrode.Also, bipolar transistor
TRT1, TRT2 are connected with diode, are output to the voltage VTSQ of node of bipolar transistor TRT1 colelctor electrode as schemed
There is negative temperature characterisitic (the 1 rank temperature characterisitic with negative gradient) shown in 30.
In addition, in Figure 29 temperature sensor portion 10, being additionally provided with operational amplifier OPD and resistance RD1, RD2.Operational amplifier
OPD non-inverting input terminal is transfused to voltage VTSQ, the one of inversing input terminal and resistance RD1 one end and resistance RD2
End connection.Also, resistance RD1 his end is provided fiducial temperature voltage VTA0, resistance RD2 his end and operational amplifier OPD
Lead-out terminal connection.
Using such operational amplifier OPD and resistance RD1, RD2, constitute voltage on the basis of fiducial temperature voltage VAT0
VTSQ rotates forward the amplifier of amplification.Thus, from the output temperature of temperature sensor portion 10 detection voltage VTD=VAT0+ (1+RD2/
RD1) × (VTSQ-VAT0).Also, by adjusting fiducial temperature voltage VAT0, fiducial temperature T0 can be adjusted.
Figure 31 shows the configuration example of oscillating circuit 150.The oscillating circuit 150 has current source IBX, bipolar transistor TRX, electricity
Hinder RX, variable capacitance capacitor CX1, capacitor CX2, CX3.
Current source IBX provides bias current to bipolar transistor TRX colelctor electrode.Resistance RX is arranged on bipolar transistor
Between TRX colelctor electrode and base stage.
The variable capacitance capacitor CX1 of variable capacitance one end is connected with oscillator XTAL one end.Specifically, variable capacitance electricity
Container CX1 one end is connected via the 1st oscillator of circuit arrangement with terminal (oscillator pad) with oscillator XTAL one end.Electricity
Container CX2 one end is connected with the oscillator XTAL other end.Specifically, capacitor CX2 one end is via the 2nd of circuit arrangement
Oscillator is connected with terminal (oscillator pad) with the oscillator XTAL other end.Capacitor CX3 one end and the one of oscillator XTAL
End connection, the other end is connected with bipolar transistor TRX colelctor electrode.
The base emitter interpolar electric current produced due to oscillator XTAL vibration is flowed through in bipolar transistor TRX.Also, work as
During base emitter interpolar electric current increase, bipolar transistor TRX colelctor electrode-transmitting electrode current increase, from current source IBX
Reduced to the bias current of resistance RX branches, therefore, collector voltage VCX reductions.On the other hand, as bipolar transistor TRX
Base emitter interpolar electric current when reducing, colelctor electrode-transmitting electrode current is reduced, from current source IBX to the inclined of resistance RX branches
Electric current increase is put, therefore, collector voltage VCX rises.Collector voltage VCX feeds back to oscillator via capacitor CX3
XTAL。
Oscillator XTAL frequency of oscillation has temperature characterisitic (such as Fig. 6 temperature characterisitic), and the temperature characterisitic is by D/A converter sections 80
Output voltage VQ (frequency control voltage) compensation.That is, output voltage VQ is input into variable capacitance capacitor CX1, using defeated
Go out voltage VQ control variable capacitance capacitors CX1 capacitance.When variable capacitance capacitor CX1 capacitance variation, vibration
The resonant frequency change in loop, therefore, the variation of frequency of oscillation caused by oscillator XTAL temperature characterisitic is compensated.Can power transformation
Hold capacitor CX1 can be by realizing such as varicap (varactor).
In addition, the oscillating circuit 150 of present embodiment is not limited to Figure 31 structure, various modifications implementation can be carried out.For example exist
It is illustrated in Figure 31 in case of CX1 is variable capacitance capacitor, but it is also possible to which CX2 or CX3 are set into profit
The variable capacitance capacitor controlled with output voltage VQ.In addition it is also possible to which multiple in CX1~CX3 are set to utilize VQ controls
Variable capacitance capacitor.
5. variation
Then, the various modifications example of present embodiment is illustrated.For example, the above such as Figure 21, shown in Figure 22, illustrates that processing unit 50 is defeated
Go out the frequency control data DDS changed by unit of k × LSB, be achieved in the method for Figure 11~Figure 13 present embodiment
Situation, still, present embodiment not limited to this.
In Figure 32 variation, it is provided with and is made up of SCF (SCF) in D/A converter DACC, DACD rear class
Filter circuit 130.The D/A converter DACC of such as 8 bits is according to timing n data D (n) output voltages DA1.In addition, 8 ratios
Special D/A converter DACD is according to ensuing timing n+1 data D (n+1) output voltages DA2.
In the case where setting the SCF clock frequency of filter circuit 130 as fCk, by by capacitor CS1, switch element SS1,
The circuit that SS2 is constituted, can be achieved RG=1/ (CS1 × fck) resistance.By by capacitor CS2, switch element SS3, SS4 structure
Into circuit, can be achieved RF=1/ (CS2 × fck) resistance.
In addition, the timeconstantτ of the filter circuit 130 can be represented by following formula (12).
τ=RF × CS3=(CS3/CS2) × (1/fck) (12)
By being set to such as CS3=5pF, CS2=0.1pF, fck=5KHz, τ=10msec can be achieved.By in this wise by when
Between constant, τ be set to long enough, as shown in figure 34, can be achieved from voltage DA1 to voltage DA2 with slowly varying defeated of timeconstantτ
Go out voltage VQ.
For example as shown in figure 33, period TP illustrated in fig. 8 (such as 20msec) is located to be transverse axis, set permission frequency drift FD
(for example counting ppb or so) is that the slope in the case of the longitudinal axis is SL1=FD/TP.In this case, by with slope S L1 phases
Than reducing the slope S L2 realized with Figure 34 timeconstantτ, the method that Figure 11~Figure 13 present embodiment can be realized.
That is, strong low-frequency filter characteristicses as can not being produced with the slope S L1 as defined in period TP and permission frequency drift FD
Filter circuit 130 is located at D/A converter DACC, DACD rear class.Thus, as shown in Figure 11 C2, the output of D/A converter sections 80
Voltage VQ can be realized with the voltage waveform identical voltage waveform of the step change of 1LSB voltage, can solve the problem that asking for frequency hopping
Topic.
But, when TP is long during the timeconstantτ ratio of filter circuit 130, filtering is employed in the change of oscillator XTAL temperature characterisitic
The output voltage VQ corrections of circuit 130 are endless, the problem of producing frequency shift (FS).
For example, Figure 35 be show in the case of timeconstantτ=TP=20mesc relative to temperature change frequency drift figure.
By being set to τ=TP as shown in figure 35, the problem of can solve the problem that frequency hopping.On the other hand, Figure 36, Figure 37 be respectively τ=
In the case of 22msec, 40msec relative to temperature change frequency drift figure.So, in Figure 32 variation, produce
Timeconstantτ it is elongated and when frequency drift characteristic deteriorate the problem of, exist be difficult obtain shortcoming as optimal solution.
Figure 38 is the configuration example of A/D converter sections 20.As shown in figure 38, A/D converter sections 20 comprising processing unit 23, register portion 24,
D/A converter DACE, DACF, comparing section 27.Further, it is also possible to include temperature sensor portion amplifier 28.Processing unit 23, post
Storage portion 24 is set as logic section 22, and D/A converter DACE, DACF, comparing section 27, temperature sensor portion amplifier 28 are made
Set for simulation part 26.
The result data of midway result, the final result of the storage of register portion 24 A/D conversions etc..The register portion 24 is equivalent to example
Gradually comparative result register such as gradually in manner of comparison.The result data of D/A converter DACE, DACF to register portion 24
Carry out D/A conversions.These DACE, DACF can be used and the isostructural D/A converter of Figure 23, Figure 24 phase.Comparing section 27 carries out D/A
Converter DACE, DACF output voltage and temperature detection voltage VTD are (after temperature sensor portion amplifier 28 is amplified
Voltage) comparison.Comparing section 27 can be by realizing such as chopper comparator.Processing unit 23 is according to the comparative result of comparing section 27
Determination processing is carried out, the renewal processing of the result data in register portion 24 is carried out.Also, obtained being handled by the renewal
Final temperature detection data DTD is exported as temperature detection voltage VTD A/D transformation results from A/D converter sections 20.Pass through
Such structure, can be achieved the A/D conversions of such as gradually manner of comparison, the A/D conversions with gradually manner of comparison similar mode
Deng.Also, can also be by the temperature of the A/D converter sections 20 for studying Figure 38 in the method for Figure 11~present embodiment illustrated in fig. 13
Degree detects data DTD way of output etc. to realize.
Figure 39 shows the configuration example of the circuit arrangement of modified embodiment of the present embodiment.
Figure 39 circuit arrangement includes：A/D converter sections 20, it carries out the temperature detection voltage VTD from temperature sensor portion 10
A/D conversions, output temperature detection data DTD；Processing unit 50, it enters the temperature of line of hitch oscillator frequency according to temperature detection data DTD
Compensation deals are spent, the frequency control data DDS of frequency of oscillation is exported；And oscillator signal generative circuit 140.
Also, processing unit 50 is in the case where temperature is from the 1st temperature change into the 2nd temperature, output by unit of k × LSB from
Frequency control data DDS of corresponding 1st data variation of 1st temperature to the 2nd data corresponding with the 2nd temperature.Also, vibration letter
Number generative circuit 140 uses frequency control data DDS and oscillator XTAL from processing unit 50, generates according to frequency control data
The oscillator signal SSC of the frequency of oscillation of DDS settings.
That is, it is different from Fig. 4, Fig. 5 in Figure 39, D/A converter sections 80 are not provided with oscillator signal generative circuit 140.And
And, the oscillator signal SSC generated by oscillator signal generative circuit 140 frequency of oscillation is according to the FREQUENCY CONTROL from processing unit 50
Data DDS is directly controlled.That is, oscillator signal SSC frequency of oscillation is controlled not via D/A converter sections.
For example in Figure 39, oscillator signal generative circuit 140 has variable capacitance circuit 142 and oscillating circuit 150.The vibration is believed
Number generative circuit 140 has the D/A converter sections 80 for setting Fig. 4, Fig. 5 in not having.Also, replace Figure 31 variable capacitance capacitor CX1
And the variable capacitance circuit 142 is set, one end of variable capacitance circuit 142 is connected with oscillator XTAL one end.
The variable capacitance circuit 142 controls its capacitance according to the frequency control data DDS from processing unit 50.For example, variable
Condenser network 142 has multiple capacitors (array of capacitors), the connection of each switch element is controlled according to frequency control data DDS
And the multiple switch element (switch arrays) disconnected.Each switch element of these multiple switch elements and each electricity of multiple capacitors
Container is electrically connected.Also, by being switched on or switched off these multiple switch elements, in multiple capacitors, its one end and oscillator
The number of the capacitor of XTAL one end connection changes.Thus, the capacitance that can control variable capacitance circuit 142 is controlled
System, the capacitance of oscillator XTAL one end changes.Therefore, variable capacitance is directly controlled using frequency control data DDS
The capacitance of circuit 142, control oscillator signal SSC frequency of oscillation.
Thus, the method for changing frequency control data DDS present embodiment by unit of k × LSB as shown in Figure 21, Figure 22 exists
It is not provided with to realize in the structure of D/A converter sections 80 in oscillator signal generative circuit 140 as shown in figure 39.Also,
By changing frequency control data DDS by unit of k × LSB, it can realize and in Figure 11~illustrated in fig. 13 embodiment party
The method identical effect of formula, can suppress the generation of Fig. 3 frequency hopping, prevent due to communication mistake etc. caused by frequency hopping.In addition,
In Figure 39 structure, also oscillator signal SSC can be generated in direct digital synthesiser mode.
In addition, in structure of Figure 39 circuit arrangement etc., in the method for present embodiment, as with Figure 12, Tu13Zhong
The corresponding formula of formula (1) of explanation, can use such as following formula (13).
DV<(FD/FR)×DFS (13)
That is, as it was previously stated, the changeable frequency scope of the frequency of oscillation of oscillator signal generative circuit 140 is set as FR, if specified time limit
(TP) the permission frequency drift of the frequency of oscillation in is FD.In addition, setting frequency control data DDS full scale value as DFS.For example
In the case where setting frequency control data DDS bit number as i, full scale value DFS can be expressed as such as 2i(0~2i).But,
Full scale value DFS not limited to this.In addition, setting at the frequency control data DDS of processing unit 50 output gap, FREQUENCY CONTROL number
It is DV according to DDS changing value.TDAC of the output gap equivalent to Figure 11.For example in Figure 21, Tu22Zhong, every the outlet chamber
Every frequency control data DDS changes by unit of k × LSB.Also, in this case, in the present embodiment, such as above formula
(13) shown in, DV<(FD/FR) × DFS is set up.
For example processing unit 50 changes frequency control data DDS in the range of full scale value DFS, in the changeable frequency shown in Figure 13
In scope FR, thus the frequency of oscillation of adjustment oscillator signal generative circuit 140, may be implemented in Fig. 6, oscillation frequency illustrated in fig. 7
The temperature-compensating processing of rate.
But, become big in the changing value DV of frequency control data DDS output gap (TDAC), such as DV >=(FD/FR) × DFS
When, the frequency drift of frequency of oscillation produces the frequency hopping shown in Figure 14 beyond frequency drift FD is allowed.
In this regard, in the present embodiment, to cause DV<(FD/FR) the small change value DV that × DFS relation is set up changes frequency
Rate control data DDS, therefore, it is possible to suppress to produce the frequency hopping shown in Figure 14.For example as shown in Figure 21, Figure 22, by with k ×
LSB is that unit changes frequency control data DDS, can suppress to produce frequency hopping.
In addition, in above formula (13), it is also desirable to set up following formula (14) in the same manner as above formula (2).
1/2i<(FD/FR) (14)
In this case, the i of above formula (14) is frequency control data DDS bit number.Processing unit 50, which is exported, causes 1/2i<(FD/
FR) higher bit number=the i set up frequency control data DDS, thereby, it is possible to suppress to produce frequency hopping.
For example when being multiplied by frequency control data DDS full scale value DFS to the both sides of above formula (14), as following formula (15).
DFS×1/2i<(FD/FR)×DFS (15)
Left side DFS × 1/2 of above formula (15)iEquivalent to frequency control data DDS 1LSB.Above formula (14), (15) mean to make
DFS × 1/2 suitable with the 1LSBiLess than (FD/FR) × DFS.If so making DFS × 1/2i<(FD/FR) × DFS, then exist
In the case of changing frequency control data DDS in units of 1LSB as shown in Figure 21, Figure 22, the frequency drift of frequency of oscillation will not
Beyond frequency drift FD is allowed, it can suppress to produce frequency hopping.
6. oscillator, electronic equipment, moving body
Figure 40 shows the configuration example of the oscillator 400 of the circuit arrangement 500 comprising present embodiment.As shown in figure 40, oscillator
400 include oscillator 420 and circuit arrangement 500.Oscillator 420 and circuit arrangement 500 are installed in the encapsulation 410 of oscillator 400.
Also, the terminal of oscillator 420 and the terminal (pad, pad) of circuit arrangement 500 (IC) are electrically connected by the internal wiring of encapsulation 410
Connect.
Figure 41 shows the configuration example of the electronic equipment of the circuit arrangement 500 comprising present embodiment.The electronic equipment includes this reality
Apply oscillator 420, antenna ATN, communication unit 510, the processing unit 520 of circuit arrangement 500, the quartz vibrator of mode etc..In addition, may be used also
To include operating portion 530, display part 540, storage part 550.Oscillator 400 is constituted by oscillator 420 and circuit arrangement 500.In addition,
Electronic equipment is not limited to Figure 41 structure, and a part of structural element or additional other structures that can carry out omitting them will
The various modifications such as element are implemented.
It is used as Figure 41 electronic equipment, it may be assumed that such as GPS onboard clocks, biological information measurement equipment (sphygmometer, pedometer
Deng) or head-mounted display device etc. wearable device, smart mobile phone, portable phone, portable game device, notebook
The portable information terminal such as PC or tablet PC (move Move terminals), issues the content providing terminal of content, digital camera or takes the photograph
The video equipments such as camera, or the network job relevant device such as base station or router etc. various equipment.
Communication unit 510 (radio-circuit) sent via antenna ATN from external reception data or to outside the processing of data.
Processing unit 520 carries out the control process of electronic equipment, various digital processings of data of reception etc. is sent via communication unit 510.
The function of the processing unit 520 can be realized for example, by the processor of microcomputer etc..
Operating portion 530 is used for user and carries out input operation, can be realized by operation button, touch panel display etc..Display
Portion 540 is used to show various information, can be realized by displays such as liquid crystal, organic EL.In addition, making as operating portion 530
In the case of touch panel display, the touch panel display has the function of operating portion 530 and display part 540 concurrently.Deposit
Storage portion 550 is used for data storage, and its function can be realized by the semiconductor memories such as RAM, ROM, HDD (hard disk) etc..
Figure 42 shows the example of the moving body of the circuit arrangement comprising present embodiment.Circuit arrangement (the vibration of present embodiment
Device) in various moving bodys such as can be installed to vehicle, aircraft, motorcycle, bicycle or ship.Moving body is that have
The operating-controlling mechanism such as drive mechanism, steering wheel or rudder such as engine or motor and various electronic equipments (mobile unit),
Be on land, aerial and marine mobile device.Figure 42 is roughly shown as the automobile of the concrete example of moving body
206.206 groups of automobile has entered the circuit arrangement of present embodiment and the oscillator (not shown) with oscillator.Control device 208
It is operated according to by the clock signal that the oscillator is generated.Control device 208 is according to the posture of such as car body 207 to suspension
Soft durometer be controlled, or the brake of each wheel 209 is controlled.It can for example be realized by control device 208
The automatic running of automobile 206.In addition, group enters to have the circuit arrangement of present embodiment and the equipment of oscillator to be not limited to such control
Device 208 processed, additionally it is possible to which group enters in the various equipment (mobile unit) set onto the moving body of the grade of automobile 206.
In addition, present embodiment is described in detail as described above, and for those of ordinary skill in the art, Ying Nengrong
The various deformation of the readily understood novel item and effect for not actually detaching the present invention.Therefore, such variation is integrally incorporated in
In the scope of the present invention.For example, in specification or accompanying drawing, at least one times with more broad sense or synonymous not common language one
Term with description can be replaced into the different terms in the arbitrary portion of specification or accompanying drawing.In addition, present embodiment
Whole combinations with variation are also contained in the scope of the present invention.In addition, circuit arrangement, oscillator, electronic equipment, moving body
Structure or action, D/A conversion methods, the processing method of frequency control data, the output side of the frequency control data of processing unit
Method, the output intent of the voltage of D/A converter sections, control method for frequency of oscillator etc. are also not necessarily limited to what is illustrated in the present embodiment
Mode, can carry out various modifications implementation.
Label declaration
XTAL ... oscillators, DACA~DACF ... D/A converters,
OPA~OPD, OPS ... operational amplifiers, CX1~CX3 ... capacitors,
VTD ... temperature detection voltages, DTD ... temperature detection data, DDS ... frequency control datas, (the frequency control of VQ ... output voltages
Voltage processed), SSC ... oscillator signals,
The temperature of T1 ... the 1st, the temperature of T2 ... the 2nd, the temperature detection data of DTD1 ... the 1st, the temperature detection data of DTD2 ... the 2nd, VC1 ...
1st control voltage, the control voltages of VC2 ... the 2nd, VDF ... differential voltages, VA ... voltage amplitudes,
TAD, TDAC ... period, TP ... specified time limits, FD ... allow frequency drift,
FR ... changeable frequency scopes, VFS ... full range voltages,
The data of DAT1 ... the 1st, the data of DAT2 ... the 2nd,
10 ... temperature sensor portions, 20 ... A/D converter sections, 22 ... logic sections, 23 ... processing units, 24 ... register portions, 26 ... moulds
Plan portion, 27 ... comparing sections,
28 ... temperature sensor portion amplifiers, 50 ... processing units, 52 ... control units, 53 ... determination units, 54,55 ... comparing sections,
58 ... multipliers, 59 ... adders, 60 ... operational parts,
61st, 62 ... type converter sections, 63 ... multiplexers, 64 ... arithmetic units,
65 ... multiplexers, 66,67 ... work registers, 68 ... type converter sections,
69 ... work registers, 70 ... output sections, 71 ... multiplexers,
72 ... output registers, 73 ... LSB adders, 74 ... LSB Minus calculate device,
80 ... D/A converter sections, 90 ... modulation circuits, 100 ... D/A converters,
104th, 106 ... decoders, 120 ... filter circuits, 130 ... filter circuits, 140 ... oscillator signal generative circuits, 142 ... can
Change condenser network, 150 ... oscillating circuits,
160 ... buffer circuits, 180 ... memory portions, 190 ... ROM,
206 ... automobiles, 207 ... car bodies, 208 ... control devices, 209 ... wheels,
400 ... oscillators, 410 encapsulation, 420 ... oscillators, 500 ... circuit arrangements,
510 ... communication units, 520 ... processing units, 530 ... operating portions, 540 ... display parts, 550 ... storage parts
Claims (20)
1. a kind of circuit arrangement, it is characterised in that the circuit arrangement has：
A/D converter sections, it carries out A/D conversions, output temperature detection data to the temperature detection voltage from temperature sensor portion；
Processing unit, its temperature-compensating for entering line of hitch oscillator frequency according to the temperature detection data is handled, and exports the frequency of oscillation
Frequency control data；And
Oscillator signal generative circuit, it uses the frequency control data and oscillator from the processing unit, generates according to institute
The oscillator signal of the frequency of oscillation of frequency control data setting is stated,
In the case where temperature is from the 1st temperature change into the 2nd temperature, processing unit output by unit of k × LSB from it is described
Corresponding 1st data variation of 1st temperature is to the frequency control data of the 2nd data corresponding with the 2nd temperature, wherein k
>=1,
It is fs in the output frequency for the frequency control data changed by unit of k × LSB for setting the processing unit, if described
Frequency control data using k × LSB in the case that the change of the frequency of oscillation turns to Δ f caused by the change of unit,
Δf/fs<1/106。
2. circuit arrangement according to claim 1, it is characterised in that
In the case of fs >=1kHz, Δ f/fs<1/106,
In fs<In the case of 1kHz, Δ f<1mHz.
3. a kind of circuit arrangement, it is characterised in that the circuit arrangement has：
A/D converter sections, it carries out A/D conversions, output temperature detection data to the temperature detection voltage from temperature sensor portion；
Processing unit, its temperature-compensating for entering line of hitch oscillator frequency according to the temperature detection data is handled, and exports the frequency of oscillation
Frequency control data；And
Oscillator signal generative circuit, it uses the frequency control data and oscillator from the processing unit, generates according to institute
The oscillator signal of the frequency of oscillation of frequency control data setting is stated,
In the case where temperature is from the 1st temperature change into the 2nd temperature, processing unit output by unit of k × LSB from it is described
Corresponding 1st data variation of 1st temperature is to the frequency control data of the 2nd data corresponding with the 2nd temperature, wherein k
>=1,
It is fs in the output frequency for the frequency control data changed by unit of k × LSB for setting the processing unit, if described
Frequency control data using k × LSB in the case that the change of the frequency of oscillation turns to Δ f caused by the change of unit,
In fs<In the case of 1kHz, Δ f<1mHz.
4. a kind of circuit arrangement, it is characterised in that the circuit arrangement has：
A/D converter sections, it carries out A/D conversions, output temperature detection data to the temperature detection voltage from temperature sensor portion；
Processing unit, its temperature-compensating for entering line of hitch oscillator frequency according to the temperature detection data is handled, and exports the frequency of oscillation
Frequency control data；And
Oscillator signal generative circuit, it uses the frequency control data and oscillator from the processing unit, generates according to institute
The oscillator signal of the frequency of oscillation of frequency control data setting is stated,
The changeable frequency scope of the frequency of oscillation that the oscillator signal generative circuit is realized is being set as FR, if specified time limit
The permission frequency drift of the interior frequency of oscillation is FD, if the full scale value of the frequency control data is DFS, if the place
In the case that the changing value of at the output gap of the frequency control data in the reason portion, frequency control data is DV,
DV<(FD/FR)×DFS。
5. circuit arrangement according to claim 4, it is characterised in that
The output frequency of the frequency control data of the processing unit is being set as fs, if the changing value of the frequency control data
In the case that the change of the frequency of oscillation turns to Δ f caused by DV change, Δ f/fs<1/106。
6. circuit arrangement according to claim 5, it is characterised in that
In the case of fs >=1kHz, Δ f/fs<1/106,
In fs<In the case of 1kHz, Δ f<1mHz.
7. circuit arrangement according to claim 4, it is characterised in that
The output frequency of the frequency control data of the processing unit is being set as fs, the changing value DV of the frequency control data
Change caused by the frequency of oscillation change turn to Δ f in the case of,
In fs<In the case of 1kHz, Δ f<1mHz.
8. circuit arrangement according to claim 1, it is characterised in that
The oscillator is quartz vibrator.
9. circuit arrangement according to claim 8, it is characterised in that
The quartz vibrator is that AT cuts oscillator, SC and cuts oscillator or SAW resonator.
10. circuit arrangement according to claim 1, it is characterised in that
The oscillator signal generative circuit has：
D/A converter sections, it carries out D/A conversions to the frequency control data from the processing unit；And
Oscillating circuit, it uses the output voltage and the oscillator of the D/A converter sections, generates the oscillator signal,
The output frequency fs of the frequency control data is the sample frequency of the D/A converter sections,
The changes delta f of the frequency of oscillation is the variable quantity of the frequency of oscillation caused by 1 D/A conversion.
11. circuit arrangement according to claim 10, it is characterised in that
The D/A converter sections have：
D/A converter, it carries out the D/A conversions of the frequency control data；And
Filter circuit, its output voltage to the D/A converter carries out smooth.
12. circuit arrangement according to claim 10, it is characterised in that
The output voltage i.e. frequency control voltages of the D/A converter sections corresponding with the 1st temperature is being set as the 1st control voltage, with
In the case that the corresponding frequency control voltage of 2nd temperature is the 2nd control voltage,
In the case where temperature is from the 1st temperature change into the 2nd temperature, from the D/A converter sections to the vibration electricity
Road output becomes according to the voltage amplitude smaller than the absolute value of the 1st control voltage and the differential voltage of the 2nd control voltage
The output voltage changed.
13. circuit arrangement according to claim 12, it is characterised in that
In the case where the minimum resolution for setting the data during the D/A is changed is LSB, D/A converter sections output according to k
The output voltage of the step change of the corresponding voltages of × LSB, wherein k >=1.
14. circuit arrangement according to claim 13, it is characterised in that
K=1.
15. circuit arrangement according to claim 12, it is characterised in that
The temperature detection data of the A/D converter sections when setting temperature as 1 temperature are the 1st temperature detection number
According to if the temperature detection data of A/D converter sections when temperature is 2 temperature are the 2nd temperature detection data
In the case of,
1st control voltage be the temperature-compensating handle temperature compensation characteristic in the 1st temperature detection data
The corresponding frequency control voltage,
2nd control voltage be the temperature-compensating handle temperature compensation characteristic in the 2nd temperature detection data
The corresponding frequency control voltage.
16. circuit arrangement according to claim 1, it is characterised in that
The processing unit is to the 1st data of the operation result data of the temperature-compensating processing as last time with being used as this
The 2nd data of the operation result data of secondary temperature-compensating processing are compared,
In the case where the 2nd data are more than the 1st data, carry out straight plus the processing of setting to the 1st data
Untill addition result data reach the 2nd data, and the addition result data are exported as the FREQUENCY CONTROL number
According to,
In the case where the 2nd data are less than the 1st data, subtracted from the 1st data processing of setting
Subtract each other result data as the FREQUENCY CONTROL until subtracting each other untill result data reaches the 2nd data, and described in exporting
Data.
17. circuit arrangement according to claim 16, it is characterised in that
The processing unit has：
Operational part, the computing that its described temperature-compensating for carrying out the frequency of oscillation according to the temperature detection data is handled is defeated
Go out the operation result data of the temperature-compensating processing；And
Output section, it receives the operation result data from the operational part, exports the frequency control data,
In the operation result data from the 1st data variation corresponding with the 1st temperature into corresponding with the 2nd temperature
The 2nd data in the case of, output section output is by unit of k × LSB from the 1st data variation to the described 2nd
The frequency control data of data.
18. a kind of oscillator, it is characterised in that the oscillator has the circuit arrangement and the oscillator described in claim 1.
19. a kind of electronic equipment, it is characterised in that the electronic equipment has the circuit arrangement described in claim 1.
20. a kind of moving body, it is characterised in that the moving body has the circuit arrangement described in claim 1.
Applications Claiming Priority (8)
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| JP2015211251 | 2015-10-27 | ||
| JP2015-211251 | 2015-10-27 | ||
| JP2015211250 | 2015-10-27 | ||
| JP2015-211250 | 2015-10-27 | ||
| JP2016099723A JP2017085536A (en) | 2015-10-27 | 2016-05-18 | Circuit device, oscillator, electronic equipment and mobile body |
| JP2016-099722 | 2016-05-18 | ||
| JP2016-099723 | 2016-05-18 | ||
| JP2016099722A JP6720687B2 (en) | 2015-10-27 | 2016-05-18 | Circuit devices, oscillators, electronic devices and mobile units |
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| CN107017837A true CN107017837A (en) | 2017-08-04 |
| CN107017837B CN107017837B (en) | 2022-02-08 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110086430A (en) * | 2018-01-26 | 2019-08-02 | 精工爱普生株式会社 | IC apparatus, oscillator, electronic equipment and moving body |
| CN113349463A (en) * | 2021-06-29 | 2021-09-07 | 荣成歌尔微电子有限公司 | Airflow sensor and electronic cigarette |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05347513A (en) * | 1992-06-12 | 1993-12-27 | Meidensha Corp | Temperature compensation type crystal oscillator |
| JPH11150478A (en) * | 1997-11-14 | 1999-06-02 | Nec Corp | Pulse width modulator |
| CN1364335A (en) * | 2000-03-17 | 2002-08-14 | 旭化成微系统株式会社 | Temperature-compensated crystal oscillator and method of temperature compensation |
| US20100301910A1 (en) * | 2009-05-26 | 2010-12-02 | Nec Electronics Corporation | Frequency synthesizer |
| CN102075143A (en) * | 2009-11-24 | 2011-05-25 | 精工爱普生株式会社 | Temperature compensation method for piezoelectric oscillator, and piezoelectric oscillator |
| CN102638224A (en) * | 2003-10-07 | 2012-08-15 | 联发科技股份有限公司 | Voltage controlled oscillator having improved phase noise |
| US20140191889A1 (en) * | 2013-01-09 | 2014-07-10 | Fujitsu Semiconductor Limited | Analog-digital conversion circuit and method |
-
2016
- 2016-10-19 CN CN201610910979.5A patent/CN107017837B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05347513A (en) * | 1992-06-12 | 1993-12-27 | Meidensha Corp | Temperature compensation type crystal oscillator |
| JPH11150478A (en) * | 1997-11-14 | 1999-06-02 | Nec Corp | Pulse width modulator |
| CN1364335A (en) * | 2000-03-17 | 2002-08-14 | 旭化成微系统株式会社 | Temperature-compensated crystal oscillator and method of temperature compensation |
| CN102638224A (en) * | 2003-10-07 | 2012-08-15 | 联发科技股份有限公司 | Voltage controlled oscillator having improved phase noise |
| US20100301910A1 (en) * | 2009-05-26 | 2010-12-02 | Nec Electronics Corporation | Frequency synthesizer |
| CN102075143A (en) * | 2009-11-24 | 2011-05-25 | 精工爱普生株式会社 | Temperature compensation method for piezoelectric oscillator, and piezoelectric oscillator |
| US20140191889A1 (en) * | 2013-01-09 | 2014-07-10 | Fujitsu Semiconductor Limited | Analog-digital conversion circuit and method |
Non-Patent Citations (1)
| Title |
|---|
| 徐磊: "一种高精度温度补偿晶体振荡器的算法研究及电路实现", 《中国优秀硕士学位论文全文数据库 信息科技辑》 * |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110086430A (en) * | 2018-01-26 | 2019-08-02 | 精工爱普生株式会社 | IC apparatus, oscillator, electronic equipment and moving body |
| CN110086430B (en) * | 2018-01-26 | 2023-06-02 | 精工爱普生株式会社 | Integrated circuit device, oscillator, electronic apparatus, and moving object |
| CN113349463A (en) * | 2021-06-29 | 2021-09-07 | 荣成歌尔微电子有限公司 | Airflow sensor and electronic cigarette |
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