CN107017307A - A kind of preparation method of low pressure p-type oxide nanofiber field-effect transistor - Google Patents

A kind of preparation method of low pressure p-type oxide nanofiber field-effect transistor Download PDF

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CN107017307A
CN107017307A CN201710192441.XA CN201710192441A CN107017307A CN 107017307 A CN107017307 A CN 107017307A CN 201710192441 A CN201710192441 A CN 201710192441A CN 107017307 A CN107017307 A CN 107017307A
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nio
preparation
nanofiber
field
effect transistor
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单福凯
刘奥
刘国侠
朱慧慧
孟优
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Qingdao University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1029Channel region of field-effect devices of field-effect transistors
    • H01L29/1033Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/24Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET

Abstract

The invention belongs to field-effect transistor preparing technical field, it is related to a kind of preparation method of low pressure p-type oxide nanofiber field-effect transistor, solvent is used as using dimethylformamide and glycerine, nickel nitrate is solute, polyvinylpyrrolidone is used as thickener, using electrostatic spinning technique, the mode that thermal annealing is combined prepares high-quality p-type NiO nanofiber semi-conducting materials, further prepare the FET device using NiO nanofibers as channel layer, its general embodiment low cost, technique is simple, principle is reliable, good product performance, prepare environment-friendly, have a extensive future, high-performance nano fiber FET device is prepared for large area, and feasible scheme is provided.

Description

A kind of preparation method of low pressure p-type oxide nanofiber field-effect transistor
Technical field:
The invention belongs to field-effect transistor preparing technical field, it is related to a kind of low pressure p-type oxide nanofiber The preparation method of field-effect transistor, particularly a kind of prepared using electrostatic spinning technique is based on p-type nickel oxide (NiO) Nanowire Low pressure, the method for high-performance fieldtron of dimension.
Background technology:
With the development of science and technology, FPD industry have become electronic information field " core pillar industry " it One, in the evolution of Display Technique, the use of amorphous silicon field-effect transistor (FET) realize Display Technique from vacuum to The transition of flat board, from traditional non-crystalline silicon FET to polysilicon FET, from polysilicon FETs of the polysilicon FET of high temperature to low temperature again To metal oxide FET, technology of preparing is more and more ripe, and camera, mobile phone, notebook electricity have been covered from product development The fields such as brain, computer monitor and TV.In recent years, with going deep into that transparent metal oxide is studied, with binary zinc oxide and Indium oxide, ternary indium zinc oxygen and zinc-tin oxygen, the N-type thin-film material such as quaternary indium gallium zinc oxygen for channel layer FET by wide coverage.This A little materials have very high electron concentration and larger energy gap in itself, and the FET made of these metal oxides has can See that optical range is transparent, mobility is high, the low advantage of technological temperature.However, due to lack with high mobility, performance it is stable and Easily prepared p-type oxide, p-type oxide FET development is seriously restricted.Compared to N-type FET, p-type FET is in display Technical field has more obvious advantage, does not interfere with drain current when as OLED anodes provide hole current, can realize more High-quality display application.In addition p-type oxide TFT is also that complementary metal oxide semiconductor (CMOS) must constitute portion Point.Compared with single polarity channel FET circuit, large scale display driver circuit is with greater need for complementary FET integrated devices.CMOS is electricity A kind of amplifying device of voltage-controlled system, is the elementary cell for constituting cmos digital integrated circuit.At present, to p-type oxide material In terms of research is concentrated mainly on ZnO p-type doping, but implement extremely difficult, and be long placed in and can also send out in atmosphere Transformation of the raw p-type to N-type.But the research for intrinsic p-type oxide FET is still within the primary stage at present, so far, Intrinsic p-type oxide TFT materials can be counted on one's fingers, and only aoxidize a few material such as (Asia) copper, nickel oxide, stannous oxide, and Performance does not reach N-type oxide FET level much.Applications of the p-type oxide TFT in liquid crystal display is display technology field Another problem to be broken through.Therefore, the task of top priority of current oxide FET development is research and development and N-type oxide FET performances The p-type oxide semiconductor material matched.
Monodimension nanometer material relied on unique nanoscale, high-specific surface area, larger length/diameter ratio in recent years, with And the physicochemical properties, the study hotspot as Material Field such as the electricity different from bulk sample, magnetic, power, heat, light.One wiener Rice structural material such as inorganic semiconductor nano wire/pipe/rod, CNT and high polymer nanometer fiber/pipe etc. is current science One of focus of research, they are in nano electron device, optics, sensor, filter, energy collection, storage and turn Change the numerous areas such as device, nano composite material and biomedicine and have broad application prospects (Chem.Soc.Rev.41, 5285,2012).Electrostatic spinning technique refers to that polymer solution or melt form the mistake of fiber under high voltage electrostatic field Journey, is that being used for of growing up more than ten years prepares the important method of superfine fibre recently both at home and abroad, with operating procedure it is simple with And the features such as wide applicability, the technology is by Formhals etc. in a series of United States Patent (USP)s that 1930s applies Reported, he elaborates how polymer solution asks to form jet (US in electrode using cellulose acetate as research object Patent No.1975504,1934).But the research hair then in terms of polymer fiber is prepared using electrostatic spinning technique Exhibition is more slow, not yet causes extensive concern.Until in the 1990s, due to Reneker groups of Akron university of the U.S. A series of research work, in particular with the development of nanosecond science and technology, scientific research circle of countries in the world and industrial quarters are to high-pressure electrostatic The research enthusiasm of spining technology starts to rekindle, and electrostatic spinning technique obtains fast development in recent years (Nanotechnology 7,216,1996), electrostatic spinning technique may not only prepare polymer fiber, can also prepare compound Fiber and oxide fibre, when the material advantage of metal oxide and the technical advantage of electrostatic spinning are combined, a width Fine microelectric technique way for development line chart is presented in face of us.Although researcher has paid substantial amounts of effort, quiet The device performance of Electrospun nano-fibers field-effect transistor or barely satisfactory, greatly suppressed that this pole is expected grinds Study carefully the development in direction.Therefore high-performance low-dimensional nano-device is prepared by Optimum Experiment technique as integrated circuit next step to develop Task urgently to be resolved hurrily.The present invention utilizes " electrostatic spinning " method to prepare nickel oxide (NiO) nanofiber, and is prepared for first Low pressure p-type NiO nanofiber FET devices based on high k dielectric layer.Based on above-mentioned technique, the NiO/Al of preparation2O3The TFT of structure Device not only has higher carrier mobility (2.75cm2/ V s), and with extremely low operating voltage (<5V), effectively Device power consumption is reduced, these advantages make it show in following low power consumption electronic, CMOS integration fields have very wide potential Market.
The content of the invention:
It is an object of the invention to overcome the shortcoming that prior art is present, seek to design and one kind be provided preparing low pressure, height The method of performance p-type metal oxide nanofibres field-effect transistor, solvent, nitric acid are used as using dimethylformamide and glycerine Nickel is solute, and polyvinylpyrrolidone prepares height as thickener by the way of " electrostatic spinning " technology, thermal annealing are combined Quality p-type NiO nanofiber semi-conducting materials, further prepare FET device using NiO nanofibers as channel layer, using molten Al prepared by glue gel technology2O3High k dielectric film can substitute traditional thermal oxide SiO2Gate dielectric layer, realizes high-performance, low energy Consume the preparation of NiO nanofiber devices.
To achieve these goals, the present invention specifically includes following processing step:
(1) preparation of NiO precursor solutions:First by nickel nitrate (Ni (NO3)2·H2O) it is dissolved in dimethylformamide and glycerine Mixed solution in, wherein the volume ratio of dimethylformamide and glycerine be 1:0.1-9:1, stirred in 20-90 degrees Celsius of lower magnetic force It is 0.01-0.5 moles of precursor solution to mix and form within 1-24 hours clear, concentration, then by polyvinylpyrrolidone (130 Ten thousand molecular weight) it is added in precursor solution, every 0.1-1.5 grams of 5 milliliters of precursor solutions addition polyethylene pyrrole network alkanone;
(2) preparation of NiO nanofibers:First by the SiO with 200 nanometer thickness2Or scribble Al2O3The Si pieces of high K thin film It is placed in electrostatic spinning apparatus receiving terminal, precursor solution injection syringe pump, direct current is connected at electrostatic spinning apparatus syringe needle high Voltage source, receiving terminal is 5-25 centimetres apart from syringe needle, and it is 0.1-1.5 mls/hour, high direct voltage to set syringe pump fltting speed For 10-20 kilovolts, under the effect such as electric field force, Coulomb force and surface tension, precursor solution sprays and acutely shaken, Nanowire Dimension diameter is remarkably decreased, and last receiving end is received, in SiO2Or the NiO composite nano fiber samples being evenly distributed on Si pieces Product;Wherein the acquisition time of nanofiber is 5-120 seconds, then NiO composite nano fiber samples are put into utilization under high-pressure sodium lamp UV light is handled 20-60 minutes, and wherein mercury lamp wave-length coverage is 200-400 nanometers, and power is 500-1200 watts, then handles light NiO composite nano fibers samples afterwards place progress high-temperature calcination processing in a furnace and obtain mutually pure NiO nanofibers; Wherein furnace is 300-700 degrees Celsius, and annealing time is 30-150 minutes;
(3) source, the preparation of drain electrode:Using vacuum thermal evaporation technology and stainless steel mask plate in NiO nanofiber raceway grooves Source metal, drain electrode are prepared on layer, that is, obtains being based on SiO2Or Al2O3The NiO nanofiber FET devices of high k dielectric layer.
Al of the present invention2O3The preparation parameter of high K thin film is shown in CN201510835588.7.
Electrostatic spinning apparatus of the present invention is commercially available prod LongerPump.
The present invention compared with prior art, has the advantage that:One is to prepare p-type NiO using " electrostatic spinning " technology partly to lead Body nanofiber, compared to other nano material preparation technologies (such as chemical vapor deposition or hydro-thermal method), the technical matters Simply, it is easy to operate, with low cost, suitable industrial large area production;Two be to be prepared in the invention being based on electrostatic spinning first The p-type NiO nanofiber fieldtrons of technology, greatly solve the blank in the field, are low-dimensional device and cmos circuit Development establish important foundation;Three be to attempt to prepare ultra-thin high k dielectric film using chemical solution method come instead of tradition first SiO2As the gate dielectric layer of p-type FET device, obtained device have lower operating voltage, more save, be low-power consumption, Good scientific basic is established in the development of High performance CMOS devices;Its general embodiment low cost, technique is simple, and principle can Lean on, good product performance, prepare environment-friendly, have a extensive future, preparing high-performance nano fiber FET device for large area provides Feasible scheme.
Brief description of the drawings:
Fig. 1 is NiO composite nano fiber structure charts prepared by the embodiment of the present invention.
Fig. 2 is the mutually pure NiO nanofiber grid structure charts that the embodiment of the present invention is obtained, and is moved back wherein (a) is 550 DEG C of heat NiO nanofiber grids after fire, (b) is the single NiO nanofibers captured by high-resolution-ration transmission electric-lens, and (c) is NiO high scores Projection electron microscope is distinguished, (d) is NiO SEADs, shoot precision from a-d figures increases successively.
Fig. 3 is Ni/NiO/SiO prepared by the embodiment of the present invention2/ Si transfer characteristic curve test charts, wherein a, b, c, d points Do not measured when source-drain voltage is 20,15,10,5 volts.
Fig. 4 is Ni/NiO/Al prepared by the embodiment of the present invention2O3/ Si transfer characteristic curve test charts, wherein a, b, c, d points Do not measured when source-drain voltage is 5,4,3,2 volts.
Embodiment:
Below by specific embodiment and the present invention will be further described with reference to accompanying drawing.
Embodiment:
The processing step that the present embodiment utilizes " electrostatic spinning technique " to prepare NiO nanofiber FET devices mainly includes:
(1) preparation of NiO precursor solutions and the preparation of NiO nanofibers:
0.14 gram of nickel nitrate, 0.65 gram of polyvinylpyrrolidone (1,300,000 molecular weight) are added to 5 milliliters of dimethyl formyls In amine and glycerine mixed solution (volume of wherein dimethylformamide and glycerine is respectively 4.5 and 0.5 milliliters), magnetic agitation is used Device rotates 12 hours, obtains the sticky precursor solution of green transparent;By the SiO with 200 nanometer thickness2Or scribble 20 and receive The thick Al of rice2O3The Si pieces of high K thin film are placed on electrostatic spinning apparatus receiving terminal, and the receiving terminal is made up of the aluminium-foil paper being grounded, quiet DC high-voltage power supply is connected at electric spinning device syringe needle, receiving terminal is fixed as 15 centimetres apart from syringe needle;Syringe pump is set to promote speed Spend for 0.5 ml/hour, high direct voltage is 15 kilovolts, nanofiber is most under the effect such as electric field force, Coulomb force, surface tension Receiving end receives (wherein the acquisition time of nanofiber is 15 seconds) afterwards, finally obtains equally distributed NiO composite Nanos fine Tie up (Fig. 1);
(2) calcination processing:
The NiO composite nano fibers obtained to step (1) handle 40 minutes, wherein mercury lamp wavelength main peak first with UV light For 365 nanometers, power is 1000 watts, and the step is effectively improved the adhesion of nanofiber and substrate, it is to avoid subsequent heat During nanofiber come off;Fiber sample then is placed into 550 degrees Celsius of progress in a furnace to calcine 90 minutes, it is decomposed In organic matter, obtain mutually pure NiO nanofibers grid (Fig. 2);
(3) thermal evaporation deposition source, leakage metal electrode:
It is stainless for 1000/100 micron with breadth length ratio on NiO nanofiber channel layers by vacuum thermal evaporation technology Steel mask plate prepares the W metal of 100 nanometer thickness as source, drain electrode, prepares Ni/NiO/Al2O3/ Si and Ni/NiO/ SiO2The FET device of/Si structures;
NiO nanofibers field-effect transistor manufactured in the present embodiment is tested, wherein Ni/NiO/SiO2/ Si is shifted Characteristic curve test such as Fig. 3 (4 transfer curves of wherein a, b, c, d are measured when source-drain voltage is 20,15,10,5 volts respectively); As can be seen from Figure 3 as there is obtained NiO nanowire fabulous field-effect to regulate and control, device current on-off ratio is more than 103.This It is also that the p-type metal oxide nano-wire device with good field-effect ability of regulation and control is reported in the current field first;Ni/NiO/ Al2O3/ Si transfer characteristic curves test as shown in Figure 4 (4 transfer curves of wherein a, b, c, d respectively source-drain voltage be 5,4, Measured at 3,2 volts), Al is utilized as can be seen from Figure 42O3High k dielectric layer replaces traditional SiO2, the operating voltage of device is from 35 Volt be reduced to only 5 volts, this be also first report can low pressure operation p-type metal oxide nano-wire device, for it is portable, Battery-driven equipment provides reliably technical guarantee.

Claims (1)

1. a kind of preparation method of low pressure p-type oxide nanofiber field-effect transistor, it is characterised in that specifically include following Processing step:
(1) preparation of NiO precursor solutions:First nickel nitrate is dissolved in the mixed solution of dimethylformamide and glycerine, wherein The volume ratio of dimethylformamide and glycerine is 1:0.1-9:1, form clarification within lower magnetic agitation 1-24 hours at 20-90 degrees Celsius Transparent, concentration is 0.01-0.5 moles of precursor solution, then polyvinylpyrrolidone is added in precursor solution, every 5 0.1-1.5 grams of milliliter precursor solution addition polyethylene pyrrole network alkanone;
(2) preparation of NiO nanofibers:First by the SiO with 200 nanometer thickness2Or scribble Al2O3The Si pieces of high K thin film are placed In electrostatic spinning apparatus receiving terminal, precursor solution injection syringe pump, DC high-voltage is connected at electrostatic spinning apparatus syringe needle Source, receiving terminal is 5-25 centimetres apart from syringe needle, and it is 0.1-1.5 mls/hour to set syringe pump fltting speed, and high direct voltage is 10-20 kilovolts, in SiO2Or the NiO composite nano fiber samples being evenly distributed on Si pieces, the wherein collection of nanofiber Time is 5-120 seconds;NiO composite nano fiber samples are put under high-pressure sodium lamp again and handled 20-60 minutes using UV light, wherein Mercury lamp wave-length coverage is 200-400 nanometers, and power is 500-1200 watts, the NiO composite nano fiber samples after then light is handled Product sample places progress high-temperature calcination processing in a furnace and obtains mutually pure NiO nanofibers;Wherein furnace is 300-700 Degree Celsius, annealing time is 30-150 minutes;
(3) source, the preparation of drain electrode:Using vacuum thermal evaporation technology and stainless steel mask plate on NiO nanofiber channel layers Source metal, drain electrode are prepared, that is, obtains being based on SiO2Or Al2O3The NiO nanofiber FET devices of high k dielectric layer.
CN201710192441.XA 2017-03-28 2017-03-28 A kind of preparation method of low pressure p-type oxide nanofiber field-effect transistor Pending CN107017307A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108417640A (en) * 2018-02-25 2018-08-17 青岛大学 A kind of nanofiber welding method based on capillary condensation phenomenon
CN111613662A (en) * 2020-05-27 2020-09-01 东北大学 Bias-induced collinear antiferromagnetic material generated spin-polarized current and regulation and control method thereof

Citations (3)

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Publication number Priority date Publication date Assignee Title
CN103011257A (en) * 2013-01-05 2013-04-03 青岛大学 Preparation method of P-type zinc oxide micro/nano fibers
CN104774015A (en) * 2014-01-14 2015-07-15 广州市香港科大霍英东研究院 Controllable-morphology high-porosity porous ceramic membrane supporting body and preparation method thereof
CN106486541A (en) * 2016-10-24 2017-03-08 青岛大学 A kind of regulation and control method of indium oxide nanometer fiber field-effect transistor electric property

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CN103011257A (en) * 2013-01-05 2013-04-03 青岛大学 Preparation method of P-type zinc oxide micro/nano fibers
CN104774015A (en) * 2014-01-14 2015-07-15 广州市香港科大霍英东研究院 Controllable-morphology high-porosity porous ceramic membrane supporting body and preparation method thereof
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108417640A (en) * 2018-02-25 2018-08-17 青岛大学 A kind of nanofiber welding method based on capillary condensation phenomenon
CN108417640B (en) * 2018-02-25 2021-05-11 青岛大学 Nanofiber welding method based on capillary condensation phenomenon
CN111613662A (en) * 2020-05-27 2020-09-01 东北大学 Bias-induced collinear antiferromagnetic material generated spin-polarized current and regulation and control method thereof

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Application publication date: 20170804