CN106990635A - Array base palte, display panel - Google Patents
Array base palte, display panel Download PDFInfo
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- CN106990635A CN106990635A CN201710436530.4A CN201710436530A CN106990635A CN 106990635 A CN106990635 A CN 106990635A CN 201710436530 A CN201710436530 A CN 201710436530A CN 106990635 A CN106990635 A CN 106990635A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/133345—Insulating layers
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136254—Checking; Testing
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
This disclosure relates to which a kind of array base palte, display panel, are related to display technology field.The array base palte includes the test structure for being used to provide test signal for signal wire；The test structure includes：Test pin, for receiving external signal and the external signal being transferred into the signal wire；Change-over switch, is arranged between the signal wire and the test pin, connection and disconnection for controlling the signal wire and the test pin.The disclosure can effectively reduce electromagnetic radiation, prevent electromagnetic interference.
Description
Technical field
This disclosure relates to display technology field, more particularly to a kind of array base palte, display panel.
Background technology
With the development of optical technology and semiconductor technology, with liquid crystal display (Liquid Crystal Display,
LCD) flat-panel monitor for representative has that frivolous, energy consumption is low, reaction speed is fast, excitation is good and the features such as high contrast,
Leading position is occupied in display field.Display device presents high integration in the last few years and the development of low cost becomes
Gesture.With array base palte row driving (Gate Driver on Array, GOA) technology for representative, using GOA technologies by raster data model
Circuit is integrated in the neighboring area of array base palte, can while narrow frame design is realized, effective lifting module process yields,
Lift product yield and cost-effective.
The signal lead of GOA structures is extracted from DP (Data Pad, data wire pad) side of display panel.
During lighting test (ET tests), in order to light display panel using external signal, ITO pad (Indium can be passed through
Tin Oxide pad, tin indium oxide pad) test signal is provided to the signal wire of GOA structures, the ITO pad are ET pad
(lighting pad).Fig. 1 show existing ITO pad plan and A-A directions sectional view, its structure can for example include according to
Secondary signal wire 20, insulating barrier 102 and the ITO103 for being arranged on the top of substrate 101, and ITO103 passes through via and signal wire 20
Electrical connection.Because ITO103 is exposed outside, therefore under module state, signal wire 20 can outwards produce electromagnetism spoke by ET pad
Penetrate.If the position of Touch (touch-control) touch points signal lead and ET pad radiation position are close or overlapping, then will
Electromagnetic coupled is produced, so as to cause touching signals to report an error.
It should be noted that information is only used for strengthening the reason of background of this disclosure disclosed in above-mentioned background section
Solution, therefore can include not constituting the information to prior art known to persons of ordinary skill in the art.
The content of the invention
The purpose of the disclosure is to provide a kind of array base palte, display panel, so at least overcome to a certain extent by
One or more problem caused by the limitation of correlation technique and defect.
Other characteristics and advantage of the disclosure will be apparent from by following detailed description, or partially by the disclosure
Practice and acquistion.
According to an aspect of this disclosure there is provided a kind of array base palte, including for providing test signal for signal wire
Test structure；
The test structure includes：
Test pin, for receiving external signal and the external signal being transferred into the p-wire；
Change-over switch, is arranged between the signal wire and the test pin, for control the signal wire with it is described
The connection and disconnection of test pin.
In a kind of exemplary embodiment of the disclosure, the test structure also includes：
It is arranged on the first insulating barrier above the signal wire；And
It is arranged on the guard electrode above first insulating barrier.
In a kind of exemplary embodiment of the disclosure, the change-over switch is switching transistor；
The switching transistor includes：
It is arranged on the first source electrode and the first drain electrode of surface；
It is arranged on the first active layer above first source electrode and first drain electrode；
It is arranged on the first gate insulation layer above first active layer；And
It is arranged on the first grid above first gate insulation layer；
Wherein, the first grid receives changeover control signal, and first source electrode is connected with the signal wire, and described the
One drain electrode is connected with the test pin.
In a kind of exemplary embodiment of the disclosure, the test pin includes：
It is arranged on the first electrode of the surface；
It is arranged on the second insulating barrier above the first electrode；And
It is arranged on the second electrode above second insulating barrier；
Wherein, the first electrode is connected with the described first drain electrode, and the second electrode is used to receive the external signal,
The second electrode is connected by the via in second insulating barrier with the first electrode.
In a kind of exemplary embodiment of the disclosure, the array base palte also includes multiple pixel cells of array arrangement,
Each pixel cell is provided with thin film transistor (TFT) and the pixel electrode electrically connected with the thin film transistor (TFT)；
Wherein, the thin film transistor (TFT) include being successively set on the second grid of the surface, the second gate insulation layer,
Second active layer and the second source electrode and the second drain electrode.
In a kind of exemplary embodiment of the disclosure, first source electrode, first drain electrode, the first electrode, institute
Second grid and the signal wire are stated with layer setting and material is identical.
In a kind of exemplary embodiment of the disclosure, the first grid, the second electrode, the pixel electrode, with
And the guard electrode is set with layer and material is identical.
In a kind of exemplary embodiment of the disclosure, the first grid, the second electrode, the pixel electrode, with
And the material of the guard electrode is tin indium oxide.
In a kind of exemplary embodiment of the disclosure, first insulating barrier, second insulating barrier, the first grid are exhausted
Edge layer and second gate insulation layer are set with layer and material is identical.
According to an aspect of this disclosure, there is provided a kind of display panel, including above-mentioned array base palte.
Array base palte and display panel that disclosure illustrative embodiments are provided, pixel knot is provided with viewing area
Structure, drive circuit and test knot for providing test signal for each signal wire in drive circuit are provided with non-display area
Structure.On the one hand, can be by controlling change-over switch so that signal wire draws with test when needing array substrate to carry out lighting test
Pin is connected, so as to be convenient to carry out lighting test；On the other hand, can be by controlling conversion to open after lighting test is completed
Close so that signal wire disconnects with test pin, so as to avoid signal wire by test pin progress electromagnetic radiation to other letters
Number produce electromagnetic interference.
It should be appreciated that the general description of the above and detailed description hereinafter are only exemplary and explanatory, not
The disclosure can be limited.
Brief description of the drawings
Accompanying drawing herein is merged in specification and constitutes the part of this specification, shows the implementation for meeting the disclosure
Example, and be used to together with specification to explain the principle of the disclosure.It should be evident that drawings in the following description are only the disclosure
Some embodiments, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis
These accompanying drawings obtain other accompanying drawings.
Fig. 1 schematically shows the schematic diagram of test structure in the prior art；
Fig. 2 schematically shows the schematic diagram of test structure in disclosure exemplary embodiment；
Fig. 3 schematically shows the structural representation of change-over switch in disclosure exemplary embodiment.
Embodiment
Example embodiment is described more fully with referring now to accompanying drawing.However, example embodiment can be real in a variety of forms
Apply, and be not understood as limited to example set forth herein；On the contrary, these embodiments are provided so that the disclosure will more comprehensively and
Completely, and by the design of example embodiment those skilled in the art is comprehensively conveyed to.Described feature, structure or characteristic
It can combine in any suitable manner in one or more embodiments.There is provided many details in the following description
So as to provide fully understanding for embodiment of this disclosure.It will be appreciated, however, by one skilled in the art that the disclosure can be put into practice
Technical scheme and omit one or more in the specific detail, or can using other methods, constituent element, device,
Step etc..In other cases, known solution is not shown in detail or describes to avoid making each side of the disclosure from becoming mould
Paste.
To be easy to description, such as " in ... lower section ", " ... below ", the space of " bottom ", " in ... top ", " top " etc.
Relational terms, it is (or other available for an element as depicted or feature and another element or feature is described here
Element or feature) relation.It should be appreciated that the device that spatial relationship term is intended to including the use of in or in operation is removed shown in figure
Orientation outside different azimuth.If for example, the equipment in figure is reversed, being described as being located at other elements or feature
The element of " following " or " lower section " is by positioned at " top " of other elements or feature.Therefore, exemplary term " ... below " can
Including " in ... top " and " ... below " both orientation.Equipment can be positioned in addition and (be rotated by 90 degrees or other
Orientation), and correspondingly explain use here spatial relation description symbol.
Term used herein is not intended to the present invention just for the sake of describing the purpose of specific illustrative embodiment
Limitation.As used herein like that, singulative " one ", " described " and its variant are intended to also include plural form, remove
Non- context makes instruction expressly otherwise.It will be further understood that term " comprising " and/or "comprising" are in present specification
The presence of described feature, entirety, step, operation, element and/or part is specified when using, but be not excluded for it is more than one its
Its feature, entirety, step, operation, element, the presence or increase of part and/or combinations thereof.
In addition, accompanying drawing is only the schematic illustrations of the disclosure, it is not necessarily drawn to scale.The thickness of each layer in accompanying drawing
Do not reflect actual proportions with shape, be merely for convenience and purposes of illustration content of this disclosure.Identical reference represents identical in figure
Or similar part, thus repetition thereof will be omitted.Some block diagrams shown in accompanying drawing are functional entitys, are differed
Surely must be corresponding with physically or logically independent entity.It can realize these functional entitys using software form, or
Realize these functional entitys in one or more hardware modules or integrated circuit, or heterogeneous networks and/or processor device and/
Or these functional entitys are realized in microcontroller device.
This example embodiment provides a kind of array base palte, including viewing area and non-display area；Wherein, the viewing area
Available for pixel is set, the non-display area can be used for setting drive circuit.
The viewing area can include multiple pixel cells of array arrangement, and each pixel cell is provided with film crystal
Pipe and the pixel electrode electrically connected with thin film transistor (TFT).
The non-display area can include drive circuit and for providing test letter for each signal wire in drive circuit
Number test structure.As shown in Fig. 2 the test structure can include：
Test pin 30, for receiving external signal and external signal being transferred into signal wire 20；
Change-over switch 40, is arranged between signal wire 20 and test pin 30, for control signal wire 20 and test pin
30 connection and disconnection.
It should be noted that：Signal wire 20 in the present embodiment for example can be to provide survey for grid line in gate driving circuit
The signal wire of trial signal, because the signal wire 20 is arranged on array base palte, therefore the array base palte for example can be GOA times
Row substrate.
The array base palte that disclosure illustrative embodiments are provided, dot structure is provided with viewing area, non-display
Area is provided with drive circuit and the test structure for providing test signal for each signal wire in drive circuit.On the one hand,
, can be by controlling change-over switch 40 so that signal wire 20 connects with test pin 30 when needing array substrate to carry out lighting test
It is logical, so as to be convenient to carry out lighting test；On the other hand, can be by controlling change-over switch 40 after lighting test is completed
So that signal wire 20 disconnects with test pin 30, so as to avoid signal wire 20 right by the progress electromagnetic radiation of test pin 30
Other signals produce electromagnetic interference.
In this example embodiment, with reference to shown in Fig. 2, the test structure can also include：
The first insulating barrier (not shown) of the top of signal wire 20 is arranged on, and is arranged on first insulation
Guard electrode 50 above layer；
Wherein, the material of the guard electrode 50 can be electrically conducting transparent material, such as ITO or ZnO (zinc oxide).
So, in one layer of guard electrode of the top of signal wire 20 covering of large area, it can be very good to play shielding letter
The effect of number electromagnetic radiation of line 20.On this basis, the setting of the guard electrode can replace in the prior art in ET pad areas
The conductive fabric pasted, saves assets so as to effective, production cost is reduced, while not influenceing production capacity also.
In this example embodiment, the change-over switch 40 can be switching transistor, and the switching transistor can be P
Transistor npn npn can be N-type transistor.
The present embodiment can have advantages below when using P-type transistor：For example it is strong to noise suppressed power；For example due to being low
Level is turned on, and low level is relatively easily realized in Charge Management；Such as N-type transistor is vulnerable to ground bounce (Ground
Bounce influence), and P-type transistor can only be driven pressure-wire pressure drop (IR Drop) influence, and IR Drop shadow
Ring and be more easy to eliminate；For example, P-type transistor processing procedure is simple, relative price is relatively low；For example, P-type transistor stability more preferably etc.
Deng.Therefore, the complexity and production cost of preparation technology can be not only reduced using P-type transistor, and contributes to lifting
Product quality.
In the present embodiment, the switching transistor can be top-gate type structure, as shown in figure 3, its structure can for example be wrapped
Include：
It is arranged on the first source electrode 401 and the first drain electrode 402 of surface；
It is arranged on the first active layer 403 of the first source electrode 401 and the top of the first drain electrode 402；
It is arranged on the first gate insulation layer 404 of the top of the first active layer 403；
It is arranged on the first grid 405 of the top of the first gate insulation layer 404；
Wherein, the first grid 405 can receive changeover control signal, first source electrode by conversion signal line
401 can be connected with the signal wire 20, and first drain electrode 402 can be connected with the test pin 30.
It should be noted that：The first source electrode 401 and first of switching transistor drains 402 for symmetrical junction in the present embodiment
Structure, its position can be exchanged, i.e., the first source electrode 401 is connected with test pin 30, and the first drain electrode 402 is connected with signal wire 20.This
Outside, the switching transistor can also be enhancement transistor or be depletion mode transistor, be not specifically limited here.
So, when the first grid 405 of the switching transistor receives changeover control signal, just it can respond
The changeover control signal and turn on, connected with the first source electrode 401 and the first drain electrode 402 of realizing the switching transistor, by
This is that signal wire 20 and the connection of test pin 30 can be achieved, and is that lighting test (ET tests) provides necessary condition.
In this example embodiment, with reference to shown in Fig. 2, the test pin 30 can include：
It is arranged on the first electrode 301 of surface；
It is arranged on the second insulating barrier of the top of first electrode 301；And
It is arranged on the second electrode 302 above the second insulating barrier；
Wherein, the first electrode 301 can be connected with the first drain electrode 402 of the switching transistor, second electricity
Pole 302 can be used for receiving external signal, and the second electrode 302 by the via 303 that is arranged in the second insulating barrier with
The first electrode 301 is connected.
So, because first electrode 301 is electrically connected with second electrode 302, therefore second electrode 302 will can be received
External signal by first electrode 301 transmit to switching transistor first drain 402, and switching transistor turn on feelings
The first source electrode 401 of switching transistor is further transmitted under condition, thus just the external signal can be write to signal wire 20,
So as to carry out lighting test.
It should be noted that：The present embodiment except can by external signal by switching transistor write to signal wire 20 with
Outside, also the electrical data on signal wire 20 can be read by switching transistor according to actual needs, do not specifically described here.
Understood based on foregoing description, the array base palte that this example embodiment is provided can include viewing area and non-display
Area.
The viewing area includes multiple pixel cells of array arrangement, and each pixel cell is provided with thin film transistor (TFT)
And the pixel electrode electrically connected with thin film transistor (TFT)；Wherein, the thin film transistor (TFT) can include being successively set on substrate base
Second grid, the second gate insulation layer, the second active layer, the second source electrode above plate and the second drain electrode, the pixel electrode can be with
It is in contact by way of overlap joint or via connection with second drain electrode of the thin film transistor (TFT).
The non-display area includes drive circuit and for providing test signal for each signal wire 20 in drive circuit
Test structure, and the test structure include test pin 30 and change-over switch 40.Wherein, the test pin 30 and described
The concrete structure of change-over switch 40 has been described in detail above, repeats no more here.
Based on this, it is contemplated that the matching of disclosed technique scheme and existing process, can make the test structure according to
Lower principle is designed.
First aspect：First source electrode 401 of the switching transistor and the first drain electrode 402, the of the test pin 30
The second grid of thin film transistor (TFT) can set and adopt with layer in one electrode 301, the signal wire 20 and the pixel cell
With identical material such as metal or alloy material.
It should be noted that：Each structure described in present aspect can be by being prepared with a patterning processes.For example,
The second grid of thin film transistor (TFT) is formed in viewing area in surface deposition layer of metal layer, and by a patterning processes,
In non-display area formation signal wire 20, the first source electrode 401 of switching transistor and the first drain electrode 402 and test pin 30
First electrode 301.
Second aspect：It is the first grid 405 of the switching transistor, the second electrode 302 of the test pin 30, described
Pixel electrode in guard electrode 50 and the pixel cell can be set with layer and using identical electrically conducting transparent material example
Such as ITO or ZnO.
It should be noted that：Each structure described in present aspect can be by being prepared with a patterning processes.For example,
Layer of transparent ITO layer is deposited in surface, and pixel electrode is formed in viewing area by a patterning processes, in non-display area
Form the second electrode 302 of guard electrode 50, the first grid 405 of switching transistor and test pin 30.
The third aspect：The first gate insulation layer 404, the signal wire 20 and the guard electrode 50 of the switching transistor
Between the first insulating barrier, in the second insulating barrier of the test pin 30 and the pixel cell thin film transistor (TFT)
Two gate insulation layers are set with layer and using identical isolation material such as silicon nitride or silica or the individual layer of silicon oxynitride
Or composite construction etc..
It should be noted that：Each structure described in present aspect can be by being prepared with a patterning processes.For example,
One layer of silicon nitride is deposited in surface, and the second gate insulation of thin film transistor (TFT) is formed in viewing area by a patterning processes
Layer, first between the first gate insulation layer 404, signal wire 20 and the guard electrode 50 of non-display area formation switching transistor is exhausted
Second insulating barrier of edge layer and test pin 30.
So, the test structure that this example embodiment is provided and the preparation technology of array base palte in the prior art
With good matching, existing manufacturing process is suitable for, so as to not interfere with production capacity.It will be clear that：Design above
Only it is the one of which embodiment of the disclosure, in other embodiments, each above-mentioned structure can pass through multiple structure
Figure technique is realized respectively, or part-structure therein can be by realizing that it is designed and preparation method with a patterning processes
It should be defined, be not specifically limited here by actual conditions.
This example embodiment additionally provides a kind of display panel, including above-mentioned array base palte.
The display panel can include viewing area and neighboring area, and the array base palte can be GOA substrates；Wherein, should
The viewing area of the viewing area correspondence array base palte of display panel, non-the showing of the neighboring area correspondence array base palte of the display panel
Show area, that is, the part of gate driving circuit is set.
Gate driving circuit is integrated in the periphery of display panel using GOA technologies by this example embodiment, so that in reality
While existing narrow frame panel design, it can also effectively reduce the manufacturing cost of display panel, lift the process yields of display module.
On this basis, the display panel can also effectively shield electromagnetic interference, and design is simple and without additionally increasing consumptive material.
In this example embodiment, the display panel is specifically as follows LCD display panel, OLED display panel, PLED
(Polymer Light-Emitting Diode, polymer LED) display panel, PDP (Plasma Display
Panel, Plasmia indicating panel) etc., specific limitation is not done for the applicable of display panel here.
Further, the display panel can also be the contact panel with touch controllable function, and the contact panel can be avoided
Signal wire outwards produces electromagnetic radiation by ET pad, so as to ensure the accuracy of Touch signals.
It should be noted that：Detail in the display panel has been carried out in detail in corresponding array base palte
Description, is repeated no more here.
This example embodiment also provides a kind of display device, including above-mentioned display panel.Wherein, the display device
It is any such as can include mobile phone, tablet personal computer, television set, notebook computer, DPF, navigator that there is display function
Product or part, the disclosure is to this without particular determination.
Those skilled in the art will readily occur to its of the disclosure after considering specification and putting into practice invention disclosed herein
Its embodiment.The application is intended to any modification, purposes or the adaptations of the disclosure, these modifications, purposes or
Person's adaptations follow the general principle of the disclosure and including the undocumented common knowledge in the art of the disclosure
Or conventional techniques.Description and embodiments are considered only as exemplary, and the true scope of the disclosure and spirit are by appended
Claim is pointed out.
It should be appreciated that the precision architecture that the disclosure is not limited to be described above and is shown in the drawings, and
And various modifications and changes can be being carried out without departing from the scope.The scope of the present disclosure is only limited by appended claim.
Claims (10)
1. a kind of array base palte, it is characterised in that including the test structure for providing test signal for signal wire；
The test structure includes：
Test pin, for receiving external signal and the external signal being transferred into the signal wire；
Change-over switch, is arranged between the signal wire and the test pin, for controlling the signal wire and the test
The connection and disconnection of pin.
2. array base palte according to claim 1, it is characterised in that the test structure also includes：
It is arranged on the first insulating barrier above the signal wire；And
It is arranged on the guard electrode above first insulating barrier.
3. array base palte according to claim 2, it is characterised in that the change-over switch is switching transistor；
The switching transistor includes：
It is arranged on the first source electrode and the first drain electrode of surface；
It is arranged on the first active layer above first source electrode and first drain electrode；
It is arranged on the first gate insulation layer above first active layer；And
It is arranged on the first grid above first gate insulation layer；
Wherein, the first grid receives changeover control signal, and first source electrode is connected with the signal wire, first leakage
Pole is connected with the test pin.
4. array base palte according to claim 3, it is characterised in that the test pin includes：
It is arranged on the first electrode of the surface；
It is arranged on the second insulating barrier above the first electrode；And
It is arranged on the second electrode above second insulating barrier；
Wherein, the first electrode is connected with the described first drain electrode, and the second electrode is used to receive the external signal, described
Second electrode is connected by the via in second insulating barrier with the first electrode.
5. array base palte according to claim 4, it is characterised in that the array base palte is also multiple including array arrangement
Pixel cell, each pixel cell is provided with thin film transistor (TFT) and the pixel electrically connected with the thin film transistor (TFT) electricity
Pole；
Wherein, the thin film transistor (TFT) includes being successively set on the second grid of the surface, the second gate insulation layer, second
Active layer and the second source electrode and the second drain electrode.
6. array base palte according to claim 5, it is characterised in that first source electrode, first drain electrode, described the
One electrode, the second grid and the signal wire are set with layer and material is identical.
7. array base palte according to claim 5, it is characterised in that the first grid, the second electrode, the picture
Plain electrode and the guard electrode are set with layer and material is identical.
8. array base palte according to claim 7, it is characterised in that the first grid, the second electrode, the picture
The material of plain electrode and the guard electrode is tin indium oxide.
9. array base palte according to claim 5, it is characterised in that first insulating barrier, second insulating barrier, institute
The first gate insulation layer and second gate insulation layer are stated with layer setting and material is identical.
10. a kind of display panel, it is characterised in that including the array base palte described in claim any one of 1-9.
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| CN201710436530.4A CN106990635A (en) | 2017-06-12 | 2017-06-12 | Array base palte, display panel |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710436530.4A CN106990635A (en) | 2017-06-12 | 2017-06-12 | Array base palte, display panel |
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| CN106990635A true CN106990635A (en) | 2017-07-28 |
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