CN106980474B - Data recorder based on PCIE interface - Google Patents
Data recorder based on PCIE interface Download PDFInfo
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- CN106980474B CN106980474B CN201710213150.4A CN201710213150A CN106980474B CN 106980474 B CN106980474 B CN 106980474B CN 201710213150 A CN201710213150 A CN 201710213150A CN 106980474 B CN106980474 B CN 106980474B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
- G06F3/0607—Improving or facilitating administration, e.g. storage management by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0674—Disk device
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Abstract
The invention discloses a data recorder based on a PCIE interface, which comprises a management control module, a data transceiver module, an exchange expansion module and a solid state disk with the PCIE interface, wherein the exchange expansion module is respectively connected with the management control module, the data transceiver module and the solid state disk through a PCIE bus, and the management control module controls the data transceiver module to directly transmit data to the solid state disk when the data transceiver module receives the data. The data is stored by the solid state disk with the PCIE interface, and the solid state disk can adopt an NVMe protocol or an ACHI protocol under the interface type, so that the speed and the density of the storage carrier are obviously improved. In addition, when the front end has data, the management control module does not need to temporarily store the data, but controls the data receiving and sending module to directly transmit the data to the solid state disk, so that the data moving is reduced, and the waste of CPU resources in the management control module can be effectively reduced.
Description
Technical Field
The invention relates to the field of data recorders, in particular to a data recorder based on a PCIE interface.
Background
The speed of the existing high-speed large-capacity data recorder is generally 2GB/s, the capacity is within 8TB, and the storage unit is generally a solid state disk of an SATA interface. Due to the adoption of the SATA protocol, the maximum speed of a single SATA interface solid state disk is 550MB/s, the maximum capacity of the single SATA interface solid state disk is 1TB, one set of recorder comprises one or more (generally 2, 4 or 8 and the like) solid state disks, the speed and capacity expansion is realized in a parallel expansion mode, and the SATA interface solid state disk is mainly applied to a data recorder with file management. In addition, in the prior art, when data needs to be stored in the storage module at the front end, the management control module needs to temporarily store the data first and then store the data in the storage module, so that more CPU resources are occupied, and the requirement on the CPU of the management control module is very high.
As can be seen from the above, the data recorder of the solid state disk based on the SATA interface is limited by the SATA protocol, and the speed can only reach 600MB/s at most, so that the data transmission speed of the data recorder becomes a bottleneck. In addition, the CPU resource consumption for the management control module is also very large.
Disclosure of Invention
The invention aims to provide a data recorder based on a PCIE interface, which is used for improving the data transmission speed and reducing the CPU resource consumption of a management control module.
In order to solve the technical problem, the invention provides a data recorder based on a PCIE interface, which includes a management control module for controlling interaction between modules, a data transceiver module for transceiving data, an exchange expansion module for providing an interaction interface, and a solid state disk having a PCIE interface, where the exchange expansion module is connected to the management control module, the data transceiver module, and the solid state disk through a PCIE bus, and the management control module controls the data transceiver module to directly transmit data to the solid state disk when the data transceiver module receives the data.
Preferably, the management control module comprises a chip adopting an ARM architecture.
Preferably, the management control module further comprises a first DDR chip connected off-chip to the chip.
Preferably, the data transceiver module comprises an FPGA chip with a serial transceiver.
Preferably, the data transceiver module further includes a second DDR chip connected to the outside of the FPGA chip and used as a cache.
Preferably, the Switch expansion module includes a Switch chip and a plurality of PCIE buses, and at least one PCIE bus is reserved.
Preferably, the PCIE protocol adopted by the solid state disk is Gen3x4, and the capacity is not less than 1.2T.
Preferably, the switching extension module, the management control module and the data transceiver module are integrated into a whole.
The data recorder based on the PCIE interface comprises a management control module used for controlling interaction among modules, a data receiving and transmitting module used for receiving and transmitting data, an exchange expansion module used for providing the interaction interface and a solid state disk with the PCIE interface, wherein the exchange expansion module is respectively connected with the management control module, the data receiving and transmitting module and the solid state disk through a PCIE bus, and when the data receiving and transmitting module receives data, the management control module controls the data receiving and transmitting module to directly transmit the data to the solid state disk. The data is stored by the solid state disk with the PCIE interface, and the solid state disk can adopt an NVMe protocol or an ACHI protocol under the interface type, so that the speed and the density of the storage carrier are obviously improved. In addition, when the front end has data, the management control module does not need to temporarily store the data, but controls the data receiving and sending module to directly transmit the data to the solid state disk, so that the data moving is reduced, and the waste of CPU resources in the management control module can be effectively reduced.
Drawings
In order to illustrate the embodiments of the present invention more clearly, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings can be obtained by those skilled in the art without inventive effort.
Fig. 1 is a structural diagram of a data recorder based on a PCIE interface according to an embodiment of the present invention;
fig. 2 is a structural diagram of another data recorder based on a PCIE interface according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without any creative work belong to the protection scope of the present invention.
The core of the invention is to provide a data recorder based on a PCIE interface, which is used for improving the data transmission speed and reducing the CPU resource consumption of a management control module.
In order that those skilled in the art will better understand the disclosure, the invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
Fig. 1 is a structural diagram of a data recorder based on a PCIE interface according to an embodiment of the present invention. As shown in fig. 1, the data recorder based on the PCIE interface includes a management control module 10 for controlling interaction between modules, a data transceiver module 11 for transceiving data, an exchange expansion module 12 for providing an interaction interface, and a solid state disk 13 having a PCIE interface. The switching expansion module 10 is connected to the management control module 10, the data transceiver module 11 and the solid state disk 13 through a PCIE bus, and when the management control module 10 receives data from the data transceiver module 11, the data transceiver module 11 is controlled to directly transmit the data to the solid state disk 13.
In a specific implementation, the management control module 10 is connected to the switching expansion module 12 through a PCIE bus, and mainly functions to respond to an external control instruction, manage an internal storage space and a stored file, control data movement among modules, and control read/write operations of the solid state disk 13. In a preferred embodiment, the management control module 10 comprises a chip using an ARM architecture. It is understood that the management control module 10 may also be an SOC or an SOPC based on a PowerPC or an X86 architecture, may run an operating system, or may be in a bare computer form, and is not described in detail in this embodiment.
The operation of the management control module 10 is roughly as follows:
1) the communication with the solid state disk 13 is realized through the exchange expansion module 12, and the solid state disk 13 is controlled and data is transmitted;
2) the management control module 10 communicates with the data transceiver module through the switching extension module 12, controls the data transceiver module, and transmits data.
3) The management control module 10 has an interface for communicating with an external host, and can receive data or control commands, process and execute the control commands, and return results.
The data transceiver module 11 is usually a high-bandwidth data transceiver module, and is connected to the switching expansion module 12 through a PCIE bus, and its main functions include two, that is, external data (such as optical fiber, network data, and the like) is received and transmitted, and under the control of the CPU of the management control module 10, the data is moved into or out of the solid state disk 13; secondly, small storage requests are cached, and received data are unpacked, so that the purpose of reducing the CPU workload of the management control module 10 is achieved. As a preferred embodiment, the data transceiver module 11 comprises an FPGA chip with a serial transceiver. It will be appreciated that the use of an FPGA chip is only one preferred approach and is not intended to represent only that approach.
The switching expansion module 12 is connected to the management control module 10, the solid state disk 13 and the data transceiver module 11 through a PCIE bus. The main function of the system is to complete interaction among the interfaces, and ensure that high-bandwidth interconnection can be realized between the data transceiver module 11 and the solid state disk 13, and between the management control module 10 and the solid state disk 13. In a preferred embodiment, the Switch expansion module 12 includes a Switch chip and a plurality of PCIE buses, and at least one PCIE bus is reserved. The operating parameters of the Switch chip are configured by the management control module 10. The reserved PCIE bus may access a new wide data transceiver module, a new solid state disk 13, or communicate with a next data recorder.
The solid state disk 13 is connected to the switching expansion module 12 through a PCIE bus. The main function of the solid state disk is to store system parameters and user data, and under the control of the CPU of the management control module 10, the DMA controller of the solid state disk 13 can implement data migration with the data transceiver module 11 or the management control module 10. In a preferred embodiment, the PCIE protocol adopted by the solid state disk 13 is Gen3x4, and the capacity is not less than 1.2T.
Since the solid state disk 13 has a PCIE interface, in a specific implementation, the solid state disk 13 may adopt an NVMe protocol or an ACHI protocol. The solid state disk 13 based on the NVMe protocol further increases the speed and storage density of the storage carrier, so that a larger speed and a higher capacity can be realized in a limited space. The speed of a single path of PCIE 3.0 is 1GB/s, if an X8 link is used, the speed reaches 8GB/s, and is higher than that of a solid state disk of an SATA interface by one order of magnitude. The speed of a single solid state disk 13 based on the PCIE interface can reach 3GB/s, and the capacity can reach 8TB or even larger, so that the high-speed large-capacity data recorder can meet the requirement of large data development.
In order to make the solution more clear to those skilled in the art, the following description will be given of the working process between the modules as a whole:
after being powered on, the management control module 10 initializes and configures the Switch chip, and then detects a device connected to the Switch chip and performs an initialization operation on the device.
After the initialization is completed and normal operation is completed, when the management control module 10 receives valid data sent by the host, the management control module 10 may control the DMA controller of the solid state disk 13 or the DMA controller inside itself to directly transmit the data to the solid state disk 13 for storage.
When receiving valid data sent by the host, the data transceiver module 11 communicates with the management control module 10, and the management control module 10 controls the DMA controller of the solid state disk 13 to transmit the data to the solid state disk 13 for storage.
When the management control module 10 wants to send valid data to the host, the DMA controller of the solid state disk 13 or the DMA controller inside the management control module will be controlled to transmit the data to the management control module 10, and then the data is sent by the management control module 10.
When the data transceiver module 11 is to send valid data to the host, the management control module 1 controls the DMA controller of the solid state disk 13 to transmit the stored data to the data transceiver module 11, and then the data is sent by the data transceiver module 11.
In the data recorder based on the PCIE interface provided in this embodiment, data is stored in the solid state disk with the PCIE interface, and in this interface type, the solid state disk may use an NVMe protocol or an ACHI protocol, so that the speed and the density of the storage carrier are obviously improved. In addition, when the front end has data, the management control module does not need to temporarily store the data, but controls the data receiving and sending module to directly transmit the data to the solid state disk, so that the data moving is reduced, and the waste of CPU resources in the management control module can be effectively reduced.
Fig. 2 is a structural diagram of another data recorder based on a PCIE interface according to an embodiment of the present invention. As shown in fig. 2, on the basis of the above embodiment, as a preferred implementation, the management control module 10 further includes a first DDR chip 21 externally connected to the chip 20 of the ARM architecture. The first DDR chip 21 may be configured to buffer data and control program operations.
On the basis of the above embodiment, as a preferred implementation, the data transceiver module 11 further includes a second DDR chip 23 externally connected to the FPGA chip 22 and used as a cache.
On the basis of the above-mentioned embodiments, as a preferred implementation, the exchange extension module 12, the management control module 10, and the data transceiver module 11 are integrated into a whole.
As shown in fig. 2, the switching expansion module 12, the management control module 10, and the data transceiver module 11 are integrated on the main control board 24, and the solid state disk 13 exists in the form of a PCIE backplane 25, so as to facilitate expansion of capacity and speed.
The data recorder based on the PCIE interface provided in the present invention is described in detail above. The embodiments are described in a progressive manner in the specification, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Claims (6)
1. A data recorder based on a PCIE interface is characterized by comprising a management control module for controlling interaction among modules, a data transceiver module for transceiving data, an exchange expansion module for providing the interaction interface and a solid state disk with the PCIE interface, wherein the exchange expansion module is respectively connected with the management control module, the data transceiver module and the solid state disk through a PCIE bus, and the management control module controls the data transceiver module to directly transmit the data to the solid state disk when the data transceiver module receives the data;
the data transceiver module comprises an FPGA chip with a serial transceiver and a second DDR chip which is connected with the FPGA chip and used as a cache.
2. The PCIE interface-based data recorder according to claim 1, wherein the management control module comprises a chip adopting an ARM architecture.
3. The PCIE interface-based data recorder according to claim 2, wherein the management control module further comprises a first DDR chip connected off-chip.
4. The PCIE interface-based data recorder according to claim 1, wherein the Switch expansion module includes a Switch chip and a plurality of PCIE buses, and at least one PCIE bus is reserved.
5. The PCIE interface-based data recorder according to claim 1, wherein a PCIE protocol adopted by the solid state disk is Gen3x4, and the capacity is not less than 1.2T.
6. The PCIE interface-based data recorder according to claim 1, wherein the switch expansion module, the management control module, and the data transceiver module are integrated into a whole.
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| CN112699006B (en) * | 2020-12-30 | 2023-08-18 | 湖南博匠信息科技有限公司 | Record exchange system |
| CN114116589A (en) * | 2022-01-25 | 2022-03-01 | 苏州浪潮智能科技有限公司 | Sensor data storage system, method, device and medium |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102346653A (en) * | 2011-09-16 | 2012-02-08 | 成都市华为赛门铁克科技有限公司 | Memory array and system and data protection method |
| CN104021107A (en) * | 2014-06-27 | 2014-09-03 | 浪潮电子信息产业股份有限公司 | Design method for system supporting non-volatile memory express peripheral component interface express solid state disc (NVMe PCIE SSD) |
| CN105335326A (en) * | 2015-10-10 | 2016-02-17 | 广州慧睿思通信息科技有限公司 | PCIE-SATA interface array device based on FPGA |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101620514B (en) * | 2009-08-11 | 2010-12-08 | 成都市华为赛门铁克科技有限公司 | Rigid disk storage system and data storage method |
| CN103809920B (en) * | 2014-02-13 | 2017-05-17 | 杭州电子科技大学 | Realizing method of ultra-large capacity solid state disk |
| CN106326160A (en) * | 2015-06-26 | 2017-01-11 | 华为技术有限公司 | Processing system and processing method |
| CN206696911U (en) * | 2017-03-20 | 2017-12-01 | 湖南博匠信息科技有限公司 | A kind of new types of data recorder |
-
2017
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102346653A (en) * | 2011-09-16 | 2012-02-08 | 成都市华为赛门铁克科技有限公司 | Memory array and system and data protection method |
| CN104021107A (en) * | 2014-06-27 | 2014-09-03 | 浪潮电子信息产业股份有限公司 | Design method for system supporting non-volatile memory express peripheral component interface express solid state disc (NVMe PCIE SSD) |
| CN105335326A (en) * | 2015-10-10 | 2016-02-17 | 广州慧睿思通信息科技有限公司 | PCIE-SATA interface array device based on FPGA |
Non-Patent Citations (1)
| Title |
|---|
| AMD VS 微软 SSD的AHCI驱动选哪家;纯金处理器;《电脑爱好者》;20150201;第80页 * |
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