CN106951391B - System and method for shielding access of point-to-point interconnection bus in chip - Google Patents
System and method for shielding access of point-to-point interconnection bus in chip Download PDFInfo
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- CN106951391B CN106951391B CN201710080269.9A CN201710080269A CN106951391B CN 106951391 B CN106951391 B CN 106951391B CN 201710080269 A CN201710080269 A CN 201710080269A CN 106951391 B CN106951391 B CN 106951391B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
Abstract
The invention discloses a system and a method for shielding access of a point-to-point interconnection bus in a chip, which are characterized in that the number a of effective commands transmitted on a write control channel and the number b of effective commands transmitted on a write data channel are recorded, when a bus shielding request sent by an external system is detected, a read control channel command of the bus is shielded, a read access shielding response signal is sent to the external system, when the bus shielding request sent by the external system is detected, the sizes of a and b are compared, then the write control channel command and the write data channel command of the bus are shielded according to a write access bus shielding strategy, and the write access shielding response signal is sent to the external system.
Description
Technical Field
The invention relates to the technical field of design of an interconnection bus in a chip, in particular to a system and a method for shielding access of a point-to-point interconnection bus in the chip.
Background
With the progress of VLSI technology, the design complexity of SoC chips of system-on-chip is continuously increased, and the multi-core technology, the multiple storage structures, the stream data processing unit, various high-speed interface circuits and the like are stacked in a single SoC chip, the data interaction among the SoC components depends on a high-performance interconnection bus structure, and a point-to-point interconnection bus has the advantages of high bandwidth, low delay, easy time sequence convergence and the like, is widely applied to the high-performance SoC chip, is different from a classical bidirectional sequential access bus based on a request-response working mode, and generally adopts a unidirectional channel structure for the point-to-point bus, so that the concurrence of multiple bus access can be realized, and the time sequence optimization and the bus performance are greatly improved.
The operation of the master device to the slave device in the SoC chip is represented in hardware as one or more bus accesses. The bus access is a hardware behavior, one-time complete bus access has indivisible performance, otherwise, a bus function error is caused, and the whole SoC chip enters an irreversible error state.
In a classical bidirectional sequential access bus, a control signal and a data signal have strict correlation, and a new bus access is not allowed to be initiated before a complete bus access is completed, the strict sequence requirement enables the safety shielding of the classical bus to be easily realized, only the bus control signal needs to be simply shielded, a point-to-point bus adopts a one-way channel structure, the control channel and the data channel have no strict correlation, multiple bus accesses are allowed to be executed concurrently, the bus bandwidth is obviously improved, but the difficulty is brought to the safety shielding of the bus.
Disclosure of Invention
Based on the technical problems existing in the background technology, the invention provides a system and a method for shielding access of a point-to-point interconnection bus in a chip.
The invention provides a point-to-point interconnection bus access shielding system in a chip, which comprises:
the shielding request starting module is respectively connected with the reading control channel shielding module and the writing access recording control module and is used for respectively sending shielding instructions to the reading control channel shielding module and the writing access recording control module when detecting a bus shielding request sent by an external system;
the read control channel shielding module is in communication connection with the shielding request starting module and is used for receiving the shielding instruction sent by the shielding request starting module and shielding the read control channel command of the bus according to the shielding instruction;
the write access record control module is in communication connection with the shielding request starting module and is used for receiving the shielding instruction sent by the shielding request starting module; the write access recording control module is respectively in communication connection with the write control channel shielding module and the write data channel shielding module and is used for respectively recording the number a of the effective commands transmitted on the write control channel and the number b of the effective commands transmitted on the write data channel, comparing the sizes of the a and the b, obtaining a write access bus shielding strategy according to the comparison result, and then forwarding a shielding instruction to the write control channel shielding module and the write data channel shielding module according to the write access bus shielding strategy;
the write control channel shielding module is in communication connection with the write access record control module and is used for receiving the shielding instruction forwarded by the write access record control module and shielding a write control channel command of the bus according to the shielding instruction;
the write data channel shielding module is in communication connection with the write access record control module and is used for receiving the shielding command forwarded by the write access record control module and shielding a write data channel command of the bus according to the shielding command;
the shielding response generating module is respectively in communication connection with the reading control channel shielding module and the writing access recording control module and is used for sending a reading access shielding response signal to an external system when the reading control channel shielding module shields a reading control channel command of a bus; when the write access recording control module transmits the shielding instruction to the write control channel shielding module and the write data channel shielding module, the shielding response generating module sends a write access shielding response signal to an external system.
Preferably, the write access recording control module is specifically configured to: respectively recording the number a of the effective commands transmitted on the write control channel and the number b of the effective commands transmitted on the write data channel, comparing the sizes of a and b, and obtaining a write access bus shielding strategy according to the comparison result, wherein the bus shielding strategy specifically comprises:
when a is larger than b, the shielding instruction is forwarded to the writing control channel shielding module, and when a is larger than b, the shielding instruction is forwarded to the writing data channel shielding module;
when a is less than b, transmitting a shielding instruction to the write data channel shielding module, and transmitting the shielding instruction to the write control channel shielding module until a is equal to b;
and when a is equal to b, the mask instruction is forwarded to the write control channel mask module and the write data channel mask module simultaneously.
Preferably, the shielding request initiating module is further configured to: and when detecting a bus shielding cancellation request sent by an external system, respectively sending a shielding cancellation instruction to the read control channel shielding module and the write access record control module.
Preferably, the read control channel shielding module is further configured to: receiving a shielding cancellation instruction sent by a shielding request starting module, and canceling shielding of a read control channel command of a bus;
preferably, the write access recording control module is further configured to: receiving a shielding cancellation command sent by a shielding request starting module, and forwarding the shielding cancellation command to a write control channel shielding module and a write data channel shielding module;
preferably, the write control channel mask module is further configured to: receiving a shielding cancellation instruction forwarded by the write access record control module, and canceling shielding of a write control channel command of a bus;
preferably, the write data channel mask module is further configured to: and receiving a shielding cancellation instruction forwarded by the write access record control module, and canceling shielding of a write data channel command of the bus.
An on-chip point-to-point interconnection bus access shielding method, comprising the steps of:
s1, recording the number a of the effective commands transmitted on the write control channel and the number b of the effective commands transmitted on the write data channel;
s2, when detecting a bus shielding request sent by an external system, shielding a read control channel command of the bus, and sending a read access shielding response signal to the external system;
and S3, when a bus shielding request sent by an external system is detected, comparing the sizes of a and b, obtaining a write access bus shielding strategy according to the comparison result, shielding a write control channel command and a write data channel command of the bus according to the write access bus shielding strategy, and sending a write access shielding response signal to the external system.
Preferably, in step S3, the comparing the sizes of the a and the b, obtaining the write access bus masking policy according to the comparison result, and masking the write control channel command and the write data channel command of the bus according to the write access bus masking policy specifically includes:
when a is larger than b, firstly shielding the write control channel command of the bus until a is larger than b, and then shielding the write data channel command of the bus;
when a is less than b, firstly shielding the write data channel command of the bus until a is equal to b, and then shielding the write control channel command of the bus;
when a equals b, the write control channel command and the write data channel command of the bus are simultaneously masked.
Preferably, the method further includes step S4, when detecting a bus mask cancellation request sent by an external system, simultaneously canceling the masks of the read control channel command, the write control channel command and the write data channel command of the bus, and executing step S1.
The invention records the effective command quantity transmitted on the control channel and the data channel, adopts a simple write access bus shielding strategy, realizes the rapid shielding of bus access, avoids the fussy software delay waiting for the completion of all bus access, and solves the problem that a point-to-point bus supports the concurrent execution of a plurality of bus accesses and is difficult to safely shield by a hardware method.
Drawings
FIG. 1 is a block diagram of an on-chip point-to-point interconnect bus access masking system according to the present invention;
fig. 2 is a flowchart of a method for shielding access to a point-to-point interconnection bus in a chip according to the present invention.
Detailed Description
As shown in fig. 1, fig. 1 is a schematic block diagram of an on-chip point-to-point interconnection bus access shielding system according to the present invention;
referring to fig. 1, the on-chip point-to-point interconnection bus access shielding system provided by the present invention is characterized by comprising:
the shielding request starting module is respectively connected with the reading control channel shielding module and the writing access recording control module and is used for respectively sending shielding instructions to the reading control channel shielding module and the writing access recording control module when detecting a bus shielding request sent by an external system;
the shielding request initiating module is further configured to: when detecting a bus shielding cancellation request sent by an external system, respectively sending a shielding cancellation instruction to a read control channel shielding module and a write access record control module;
in this embodiment, the shielding request initiating module continuously detects whether the external system sends a bus shielding request, and when the bus shielding request sent by the external system is detected, the system starts shielding work, and when the bus shielding cancellation request sent by the external system is detected, the system starts to cancel shielding work.
The read control channel shielding module is in communication connection with the shielding request starting module and is used for receiving the shielding instruction sent by the shielding request starting module and shielding the read control channel command of the bus according to the shielding instruction;
the read control channel shielding module is further configured to: receiving a shielding cancellation instruction sent by a shielding request starting module, and canceling shielding of a read control channel command of a bus;
in this embodiment, after receiving the shielding instruction, the read control channel shielding module immediately shields the read control channel command of the bus, and after receiving the shielding cancellation instruction, the read control channel shielding module immediately cancels the shielding of the read control channel command of the bus.
The write access record control module is in communication connection with the shielding request starting module and is used for receiving the shielding instruction sent by the shielding request starting module; the write access recording control module is respectively in communication connection with the write control channel shielding module and the write data channel shielding module and is used for respectively recording the number a of the effective commands transmitted on the write control channel and the number b of the effective commands transmitted on the write data channel, comparing the sizes of the a and the b, obtaining a write access bus shielding strategy according to the comparison result, and then forwarding a shielding instruction to the write control channel shielding module and the write data channel shielding module according to the write access bus shielding strategy;
the write access recording control module is specifically configured to record the number a of valid commands transmitted on the write control channel and the number b of valid commands transmitted on the write data channel, respectively, compare the sizes of a and b, and obtain a write access bus masking policy according to a comparison result, where the bus masking policy specifically includes:
when a is larger than b, the shielding instruction is forwarded to the writing control channel shielding module, and when a is larger than b, the shielding instruction is forwarded to the writing data channel shielding module;
when a is less than b, transmitting a shielding instruction to the write data channel shielding module, and transmitting the shielding instruction to the write control channel shielding module until a is equal to b;
when a is b, simultaneously transmitting a shielding instruction to the write control channel shielding module and the write data channel shielding module;
the write access recording control module is further to: receiving a shielding cancellation command sent by a shielding request starting module, and forwarding the shielding cancellation command to a write control channel shielding module and a write data channel shielding module;
in this embodiment, if the number of the valid commands already sent on the write control channel is greater than that of the write data channel, the mask command is first forwarded to the write control channel mask module to mask the write control channel command of the bus, and then the mask command is forwarded to the write data channel mask module to mask the write data channel command of the bus after the number of the valid commands is equal; if the number of the effective commands sent on the write control channel is smaller than that of the write data channel, firstly, a shielding instruction is forwarded to a write data channel shielding module to shield the write data channel command of the bus, and then, after the number of the effective commands is equal, the shielding instruction is forwarded to the write control channel shielding module to shield the write control channel command of the bus; if the number of the effective commands sent on the write control channel is equal to that of the write data channel, the shielding command is simultaneously forwarded to the write control channel shielding module and the write data channel shielding module, and the write control channel command and the write data channel command of the bus are simultaneously shielded; when the write access record control module receives the shielding cancellation command sent by the shielding request starting module, the shielding cancellation command is forwarded to the write control channel shielding module and the write data channel shielding module.
The write control channel shielding module is in communication connection with the write access record control module and is used for receiving the shielding instruction forwarded by the write access record control module and shielding a write control channel command of the bus according to the shielding instruction;
the write control channel mask module is further to: receiving a shielding cancellation instruction forwarded by the write access record control module, and canceling shielding of a write control channel command of a bus;
in this embodiment, when the write control channel shielding module receives the shielding instruction, the write control channel command of the bus is immediately shielded, and when the write control channel shielding module receives the shielding instruction; when the write control channel shielding module receives the shielding canceling instruction, the shielding of the write control channel command of the bus is immediately canceled.
The write data channel shielding module is in communication connection with the write access record control module and is used for receiving the shielding command forwarded by the write access record control module and shielding a write data channel command of the bus according to the shielding command;
the write data channel mask module is further to: receiving a shielding cancellation command forwarded by the write access record control module, and cancelling shielding of a write data channel command of the bus;
in this embodiment, when the write data channel masking module receives the masking command, the write data channel command of the bus is immediately masked; when the write data channel shielding module receives the shielding canceling instruction, the shielding of the write data channel command of the bus is immediately canceled.
The shielding response generating module is respectively in communication connection with the reading control channel shielding module and the writing access recording control module and is used for sending a reading access shielding response signal to an external system when the reading control channel shielding module shields a reading control channel command of a bus; when the write access recording control module transmits the shielding instruction to the write control channel shielding module and the write data channel shielding module, the shielding response generating module sends a write access shielding response signal to an external system;
in this embodiment, the shielding response generating module sends a read access shielding response signal to an external system when the read control channel shielding module shields a read control channel command of the bus; when the write access record control module forwards the shielding instruction to the write control channel shielding module and the write data channel shielding module, the shielding response generation module sends a write access shielding response signal to an external system to inform the external system of the shielding process;
as shown in fig. 2, fig. 2 is a flowchart of a method for shielding access to a point-to-point interconnection bus in a chip according to the present invention;
referring to fig. 2, the method for shielding access to a point-to-point interconnection bus in a chip according to the present invention is characterized in that the method includes the following steps:
step S1, recording the number a of the effective commands transmitted on the write control channel and the number b of the effective commands transmitted on the write data channel;
in this embodiment, the number a of valid commands transmitted on the write control channel and the number b of valid commands transmitted on the write data channel are recorded, so as to provide data support for the write access bus mask policy.
Step S2, when detecting the bus shielding request sent by the external system, shielding the read control channel command of the bus, and sending the read access shielding response signal to the external system;
in the present embodiment, when a bus mask request transmitted from an external system is detected, a read control channel command of the bus is masked and a read access mask response signal is transmitted to the external system.
Step S3, when detecting the bus shielding request sent by the external system, comparing a and b, obtaining the shielding strategy of the write access bus according to the comparison result, shielding the write control channel command and the write data channel command of the bus according to the shielding strategy of the write access bus, and sending a write access shielding response signal to the external system;
in this step, the comparing the sizes of the a and the b, obtaining a write access bus masking policy according to the comparison result, and then masking a write control channel command and a write data channel command of the bus according to the write access bus masking policy specifically includes:
when a is larger than b, firstly shielding the write control channel command of the bus until a is larger than b, and then shielding the write data channel command of the bus;
when a is less than b, firstly shielding the write data channel command of the bus until a is equal to b, and then shielding the write control channel command of the bus;
when a is b, simultaneously masking the write control channel command and the write data channel command of the bus;
in this embodiment, if the number of the valid commands already sent on the write control channel is greater than that of the write data channels, the write control channel commands of the bus are masked first, and then the write data channel commands of the bus are masked after the number of the valid commands is equal; if the number of the effective commands already sent on the write control channel is smaller than that of the write data channel, firstly shielding the write data channel commands of the bus, and then shielding the write control channel commands of the bus after the number of the effective commands is equal; and if the number of the effective commands already sent on the write control channel is equal to that of the write data channels, shielding the write control channel command and the write data channel command of the bus at the same time, and when the write access record control module receives a mask canceling instruction sent by the mask request starting module, forwarding the mask canceling instruction to the write control channel mask module and the write data channel mask module.
The method also comprises a step S4, when detecting the bus shielding cancellation request sent by the external system, simultaneously canceling the shielding of the read control channel command, the write control channel command and the write data channel command of the bus, and executing S1.
In this embodiment, when a bus mask cancellation request sent by an external system is detected, the masks of the read control channel command, the write control channel command, and the write data channel command for the bus are cancelled, and the masking operation is ended.
In the embodiment, by recording the number of the effective commands transmitted on the control channel and the data channel and adopting a simple write access bus shielding strategy, the fast shielding of bus access is realized, the complex software delay waiting for the completion of all bus access is avoided, and the problem that a point-to-point bus supports the concurrent execution of a plurality of bus accesses and is difficult to safely shield by a hardware method is solved.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and the technical solutions and the inventive concepts thereof according to the present invention should be equivalent or changed within the scope of the present invention.
Claims (7)
1. An on-chip point-to-point interconnect bus access masking system, comprising:
the shielding request starting module is respectively connected with the reading control channel shielding module and the writing access recording control module and is used for respectively sending shielding instructions to the reading control channel shielding module and the writing access recording control module when detecting a bus shielding request sent by an external system;
the read control channel shielding module is in communication connection with the shielding request starting module and is used for receiving the shielding instruction sent by the shielding request starting module and shielding the read control channel command of the bus according to the shielding instruction;
the write access record control module is in communication connection with the shielding request starting module and is used for receiving the shielding instruction sent by the shielding request starting module; the write access recording control module is respectively in communication connection with the write control channel shielding module and the write data channel shielding module and is used for respectively recording the number a of the effective commands transmitted on the write control channel and the number b of the effective commands transmitted on the write data channel, comparing the sizes of the a and the b, obtaining a write access bus shielding strategy according to the comparison result, and then forwarding a shielding instruction to the write control channel shielding module and the write data channel shielding module according to the write access bus shielding strategy;
the write control channel shielding module is in communication connection with the write access record control module and is used for receiving the shielding instruction forwarded by the write access record control module and shielding a write control channel command of the bus according to the shielding instruction;
the write data channel shielding module is in communication connection with the write access record control module and is used for receiving the shielding command forwarded by the write access record control module and shielding a write data channel command of the bus according to the shielding command;
the shielding response generating module is respectively in communication connection with the reading control channel shielding module and the writing access recording control module and is used for sending a reading access shielding response signal to an external system when the reading control channel shielding module shields a reading control channel command of a bus; when the write access recording control module transmits the shielding instruction to the write control channel shielding module and the write data channel shielding module, the shielding response generating module sends a write access shielding response signal to an external system.
2. The on-chip peer-to-peer interconnect bus access masking system of claim 1, wherein the write access record control module is specifically configured to: respectively recording the number a of the effective commands transmitted on the write control channel and the number b of the effective commands transmitted on the write data channel, comparing the sizes of a and b, and obtaining a write access bus shielding strategy according to the comparison result, wherein the bus shielding strategy specifically comprises:
when a is larger than b, the shielding instruction is forwarded to the writing control channel shielding module, and when a is larger than b, the shielding instruction is forwarded to the writing data channel shielding module;
when a is less than b, transmitting a shielding instruction to the write data channel shielding module, and transmitting the shielding instruction to the write control channel shielding module until a is equal to b;
and when a is equal to b, the mask instruction is forwarded to the write control channel mask module and the write data channel mask module simultaneously.
3. The on-chip point-to-point interconnect bus access masking system of claim 1, wherein the masking request initiation module is further configured to: and when detecting a bus shielding cancellation request sent by an external system, respectively sending a shielding cancellation instruction to the read control channel shielding module and the write access record control module.
4. The on-chip point-to-point interconnect bus access masking system of claim 3, wherein the read control channel masking module is further to: receiving a shielding cancellation instruction sent by a shielding request starting module, and canceling shielding of a read control channel command of a bus;
preferably, the write access recording control module is further configured to: receiving a shielding cancellation command sent by a shielding request starting module, and forwarding the shielding cancellation command to a write control channel shielding module and a write data channel shielding module;
preferably, the write control channel mask module is further configured to: receiving a shielding cancellation instruction forwarded by the write access record control module, and canceling shielding of a write control channel command of a bus;
preferably, the write data channel mask module is further configured to: and receiving a shielding cancellation instruction forwarded by the write access record control module, and canceling shielding of a write data channel command of the bus.
5. An on-chip point-to-point interconnect bus access masking method, comprising the steps of:
s1, recording the number a of the effective commands transmitted on the write control channel and the number b of the effective commands transmitted on the write data channel;
s2, when detecting a bus shielding request sent by an external system, shielding a read control channel command of the bus, and sending a read access shielding response signal to the external system;
and S3, when a bus shielding request sent by an external system is detected, comparing the sizes of a and b, obtaining a write access bus shielding strategy according to the comparison result, shielding a write control channel command and a write data channel command of the bus according to the write access bus shielding strategy, and sending a write access shielding response signal to the external system.
6. The on-chip peer-to-peer interconnect bus access shielding method of claim 5, wherein in step S3, the comparing the sizes of a and b, obtaining a write access bus shielding policy according to the comparison result, and shielding the write control channel command and the write data channel command of the bus according to the write access bus shielding policy specifically comprises:
when a is larger than b, firstly shielding the write control channel command of the bus until a is larger than b, and then shielding the write data channel command of the bus;
when a is less than b, firstly shielding the write data channel command of the bus until a is equal to b, and then shielding the write control channel command of the bus;
when a equals b, the write control channel command and the write data channel command of the bus are simultaneously masked.
7. The on-chip point-to-point interconnect bus access masking method of claim 5, further comprising step S4, when a bus mask cancellation request sent by an external system is detected, simultaneously canceling the masking of the read control channel command, the write control channel command and the write data channel command of the bus, and executing step S1.
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