CN106935643A - HEMT and memory chip - Google Patents
HEMT and memory chip Download PDFInfo
- Publication number
- CN106935643A CN106935643A CN201511031136.XA CN201511031136A CN106935643A CN 106935643 A CN106935643 A CN 106935643A CN 201511031136 A CN201511031136 A CN 201511031136A CN 106935643 A CN106935643 A CN 106935643A
- Authority
- CN
- China
- Prior art keywords
- layer
- electrode
- gallium nitride
- hemt
- oxide layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 43
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 claims abstract description 22
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 21
- 150000001875 compounds Chemical class 0.000 claims abstract description 18
- 238000003780 insertion Methods 0.000 claims abstract description 8
- 230000037431 insertion Effects 0.000 claims abstract description 8
- 239000000758 substrate Substances 0.000 claims abstract description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 11
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 11
- 239000002131 composite material Substances 0.000 claims description 9
- 238000000926 separation method Methods 0.000 claims description 8
- 229910052782 aluminium Inorganic materials 0.000 claims description 7
- 239000004411 aluminium Substances 0.000 claims description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 7
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 7
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 6
- ZCZYDYAIIVVFPH-UHFFFAOYSA-N alumane;titanium Chemical compound [AlH3].[Ti].[Ti].[Ti] ZCZYDYAIIVVFPH-UHFFFAOYSA-N 0.000 claims description 4
- 230000005611 electricity Effects 0.000 claims 2
- 230000007547 defect Effects 0.000 abstract description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 5
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 4
- 229910052733 gallium Inorganic materials 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000003475 lamination Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 230000005533 two-dimensional electron gas Effects 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- -1 titanium-aluminium-titanium-nitrogen Chemical compound 0.000 description 2
- 239000002253 acid Substances 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000005693 optoelectronics Effects 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2229/00—Indexing scheme for semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, for details of semiconductor bodies or of electrodes thereof, or for multistep manufacturing processes therefor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
The invention provides a kind of HEMT and memory chip, wherein HEMT includes：Substrate；Gallium nitride layer and aluminum gallium nitride layer, the side of gallium nitride layer are compound in the top layer of substrate, and the opposite side of gallium nitride layer is compound in the bottom of aluminum gallium nitride layer；Oxide layer, is compound in the top layer of aluminum gallium nitride layer, and oxide layer is provided with the contact hole of at least three insertions；Electrode, electrode includes drain electrode, gate electrode and source electrode, and drain electrode, gate electrode and source electrode are respectively arranged in the contact hole of corresponding at least three insertion in corresponding contact hole.By technical scheme, the boundary defect between gate electrode and drain electrode is reduced, improve the reliability of HEMT.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of high electron mobility crystal
Pipe and a kind of memory chip.
Background technology
In the related art, with the development of semiconductor fabrication, with low-power consumption and high speed high pass
The power device of characteristic turns into mainstream research direction.
GaN (gallium nitride) is third generation semiconductor material with wide forbidden band, with big energy gap
(3.4eV), electron saturation velocities high (2e7cm/s), breakdown electric field (1e10-- high
3e10V/cm), thermal conductivity higher, corrosion-resistant and radiation resistance, and high pressure, high frequency,
There is stronger advantage under high temperature, high-power and Flouride-resistani acid phesphatase environmental condition, thus be considered as short research
The optimal material of wavelength optoelectronic and high voltagehigh frequency rate high power device.
Specifically, high concentration, high mobility are formed at AlGaN (aluminum gallium nitride)/GaN hetero-junctions
Two-dimensional electron gas (2DEG, Two-dimensional electron gas), while hetero-junctions pair
2DEG has good adjustment effect, and GaN base AlGaN/GaN high mobility transistors are power
Study hotspot in device.
But, the use of GaN material and undoped intrinsic material so that with low on-resistance
HEMT (Hight Electron Mobility Transistor, HEMT) devices compared with
Hardly possible is obtained, and for high-power high-frequency device, boundary defect has a strong impact on HEMT
Reliability.
Therefore, how to design a kind of new HEMT is turned into improving device reliability
Technical problem urgently to be resolved hurrily at present.
The content of the invention
The present invention is based on above mentioned problem, it is proposed that a kind of skill of new HEMT
Art scheme, by aluminum gallium nitride and electrode structure (gate electrode, source electrode and drain electrode it
Between) oxide layer is set, the boundary defect of aluminum gallium nitride is reduced, tracking current is reduced, improve
The reliability of HEMT.
In view of this, the present invention proposes a kind of HEMT, including：Substrate；Nitrogen
Change gallium layer and aluminum gallium nitride layer, the side of the gallium nitride layer is compound in the top layer of the substrate, described
The opposite side of gallium nitride layer is compound in the bottom of the aluminum gallium nitride layer；Oxide layer, is compound in the nitrogen
Change the top layer of gallium aluminium lamination, the oxide layer is provided with the contact hole of at least three insertions；Electrode, it is described
Electrode includes drain electrode, gate electrode and source electrode, the drain electrode, the gate electrode
Corresponding in the contact hole of corresponding at least three insertion connecing is respectively arranged at the source electrode
In contact hole.
In the technical scheme, by aluminum gallium nitride and electrode structure (gate electrode, source electrode
And drain electrode between) oxide layer is set, the boundary defect of aluminum gallium nitride is reduced, reduce surface
Leakage current, improves the reliability of HEMT.
In the above-mentioned technical solutions, it is preferred that the source electrode includes the first titanium-aluminium-titanium-titanium nitride
Composite bed.
In the above-mentioned technical solutions, it is preferred that the drain electrode includes the second titanium-aluminium-titanium-titanium nitride
Composite bed, the source electrode and the drain electrode are to separate.
In the above-mentioned technical solutions, it is preferred that the gate electrode includes：Ni-au composite bed, institute
State gate electrode and the source electrode is to separate, the gate electrode and the drain electrode are point
From.
In the above-mentioned technical solutions, it is preferred that the oxide layer includes：First silicon oxide layer, it is described
First silicon oxide layer includes teos layer.
In the technical scheme, include teos layer by setting the first silicon oxide layer, due to just
The compactness and reliability of silester layer, further ensure that the resistance to of HEMT
Pressure characteristic.
In the above-mentioned technical solutions, it is preferred that the oxide layer also includes：Alumina layer, the oxygen
Change the top layer that aluminium lamination is compound in first silicon nitride layer.
In the technical scheme, by setting alumina layer in oxide layer, reduce aln layer and
Stress between silicon nitride layer, further improves the reliability of HEMT.
In the above-mentioned technical solutions, it is preferred that the aluminum gallium nitride layer includes intrinsic gallium nitride constructed of aluminium
Layer.
In the above-mentioned technical solutions, it is preferred that also include：Separation layer, be compound in the oxide layer and
The top layer of the electrode.
In the technical scheme, separation layer is set by the top layer in oxide layer and electrode, in lifter
On the premise of part reliability, interference of the spatial electromagnetic signal to HEMT is reduced.
In the above-mentioned technical solutions, it is preferred that the separation layer includes the second silicon oxide layer and/or the
Nitride silicon layer.
According to the second aspect of the invention, it is proposed that a kind of memory chip, including：It is any as described above
HEMT described in item technical scheme.
By above technical scheme, contacted by by gate electrode and source electrode, eliminate grid and
Spacing between source electrode, efficiently reduces the conducting resistance and power consumption of HEMT,
Improve the reliability of HEMT.
Brief description of the drawings
Fig. 1 shows that the section of HEMT according to an embodiment of the invention is illustrated
Figure；
Fig. 2 shows the schematic block diagram of memory chip according to an embodiment of the invention.
Specific embodiment
In order to be more clearly understood that the above objects, features and advantages of the present invention, with reference to attached
Figure and specific embodiment are further described in detail to the present invention.It should be noted that not
In the case of conflict, the feature in embodiments herein and embodiment can be mutually combined.
Many details are elaborated in the following description in order to fully understand the present invention, but,
The present invention can also be different from other modes described here to implement using other, therefore, the present invention
Protection domain do not limited by following public specific embodiment.
Fig. 1 shows that the structure of HEMT according to an embodiment of the invention is shown
It is intended to.
As shown in figure 1, HEMT 100 according to an embodiment of the invention, bag
Include：Substrate 1；Gallium nitride layer 2 and aluminum gallium nitride layer 3, the side of the gallium nitride layer 2 is compound in
The top layer of the substrate 1, the opposite side of the gallium nitride layer 2 is compound in the aluminum gallium nitride layer 3
Bottom；Oxide layer 4, is compound in the top layer of the aluminum gallium nitride layer 3, and the oxide layer 4 is provided with
The contact hole of at least three insertions；Electrode, the electrode includes 51 electrodes of drain electrode, the electrode of grid 52
With the electrode of source electrode 53, the electrode of the drain electrode 51, the electrode of the grid 52 and the electrode of the source electrode 53
It is respectively arranged in the contact hole of corresponding at least three insertion in corresponding contact hole.
In the technical scheme, by aluminum gallium nitride 3 and electrode structure (electrode of grid 52, source
Between 51 electrodes of the electrode of pole 53 and drain electrode) oxide layer 4 is set, reduce the interface of aluminum gallium nitride 3
Defect, reduces tracking current, improves the reliability of HEMT.
Wherein, HEMT 100 apply electric load after, gallium nitride layer 2 and nitridation
Polarization induces two-dimensional electron gas 7 between gallium aluminium lamination 3, and it has high concentration and high mobility characteristic,
While improving device reliability, it is ensured that the manufacture craft of HEMT 100 is compatible
In CMOS (Complementary Metal-Oxide-Semiconductor Transistor, compensation payment
Category oxide-semiconductor transistors) technique is manufacturing cost so as to reduce.
In the above-mentioned technical solutions, it is preferred that the source electrode 53 includes the first titanium-aluminium-titanium-nitrogen
Change titanium composite bed.
In the above-mentioned technical solutions, it is preferred that the drain electrode 51 includes the second titanium-aluminium-titanium-nitrogen
Change titanium composite bed, the source electrode 53 and the drain electrode 51 are to separate.
In the above-mentioned technical solutions, it is preferred that the gate electrode 52 includes：Ni-au composite bed,
The gate electrode 52 and the source electrode 53 are to separate, the gate electrode 52 and described
Drain electrode 51 is to separate.
In the above-mentioned technical solutions, it is preferred that the oxide layer 4 includes：First silicon oxide layer, institute
Stating the first silicon oxide layer includes teos layer.
In the technical scheme, include teos layer by setting the first silicon oxide layer, due to just
The compactness and reliability of silester layer, further ensure that HEMT 100
Voltage endurance.
In the above-mentioned technical solutions, it is preferred that the oxide layer 4 also includes：Alumina layer, it is described
Alumina layer is compound in the top layer of first silicon nitride layer.
In the technical scheme, by setting alumina layer in oxide layer, reduce aln layer and
Stress between silicon nitride layer, further improves the reliability of HEMT 100
Property.
In the above-mentioned technical solutions, it is preferred that the aluminum gallium nitride layer 3 includes intrinsic gallium nitride aluminium knot
Structure layer.
In the above-mentioned technical solutions, it is preferred that also include：Separation layer 6, is compound in the oxide layer
4 and the top layer of the electrode.
In the technical scheme, separation layer 6 is set by the top layer in oxide layer 4 and electrode, carried
On the premise of rising device reliability, spatial electromagnetic signal is reduced to HEMT 100
Interference.
In the above-mentioned technical solutions, it is preferred that the separation layer includes the second silicon oxide layer and/or the
Nitride silicon layer.
Fig. 2 shows the schematic block diagram of memory chip according to an embodiment of the invention.
As shown in Fig. 2 memory chip 200 according to an embodiment of the invention, including：As described above
HEMT 100 described in any one technical scheme.
Technical scheme is described in detail above in association with accompanying drawing, it is contemplated that proposed in correlation technique
How to design a kind of new HEMT to reduce the technical problem of conducting resistance, this
Invention proposes a kind of technical scheme of new HEMT, by aluminum gallium nitride and
Electrode structure (between gate electrode, source electrode and drain electrode) sets oxide layer, reduces nitrogen
Change the boundary defect of gallium aluminium, reduce tracking current, improve HEMT can
By property.
The preferred embodiments of the present invention are the foregoing is only, is not intended to limit the invention, for
For those skilled in the art, the present invention can have various modifications and variations.It is all in essence of the invention
Within god and principle, any modification, equivalent substitution and improvements made etc. should be included in the present invention
Protection domain within.
Claims (10)
1. a kind of HEMT, it is characterised in that including：
Substrate；
Gallium nitride layer and aluminum gallium nitride layer, the side of the gallium nitride layer are compound in the table of the substrate
Layer, the opposite side of the gallium nitride layer is compound in the bottom of the aluminum gallium nitride layer；
Oxide layer, is compound in the top layer of the aluminum gallium nitride layer, and the oxide layer is provided with least three
The contact hole of insertion；
Electrode, the electrode includes drain electrode, gate electrode and source electrode, the drain electrode electricity
Pole, the gate electrode and the source electrode are respectively arranged at corresponding at least three insertion
In contact hole in corresponding contact hole.
2. HEMT according to claim 1, it is characterised in that
The source electrode includes the first titanium-aluminium-titanium-titanium nitride composite bed.
3. HEMT according to claim 2, it is characterised in that
The drain electrode includes the second titanium-aluminium-titanium-titanium nitride composite bed, the source electrode and described
Drain electrode is to separate.
4. HEMT according to claim 3, it is characterised in that described
Gate electrode includes：
Ni-au composite bed, the gate electrode and the source electrode are to separate, the grid electricity
Pole and the drain electrode are to separate.
5. HEMT according to claim 4, it is characterised in that described
Oxide layer includes：First silicon oxide layer, first silicon oxide layer includes teos layer.
6. HEMT according to claim 3, it is characterised in that described
Oxide layer also includes：
Alumina layer, the alumina layer is compound in the top layer of first silicon nitride layer.
7. HEMT according to any one of claim 1 to 6, it is special
Levy and be, the aluminum gallium nitride layer includes intrinsic gallium nitride constructed of aluminium layer.
8. HEMT according to any one of claim 1 to 6, it is special
Levy and be, also include：
Separation layer, is compound in the top layer of the oxide layer and the electrode.
9. HEMT according to any one of claim 1 to 6, it is special
Levy and be, the separation layer includes the second silicon oxide layer and/or the second silicon nitride layer.
10. a kind of memory chip, it is characterised in that including：
HEMT as claimed in any one of claims 1-9 wherein.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201511031136.XA CN106935643A (en) | 2015-12-31 | 2015-12-31 | HEMT and memory chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201511031136.XA CN106935643A (en) | 2015-12-31 | 2015-12-31 | HEMT and memory chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106935643A true CN106935643A (en) | 2017-07-07 |
Family
ID=59444649
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201511031136.XA Pending CN106935643A (en) | 2015-12-31 | 2015-12-31 | HEMT and memory chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106935643A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110323275A (en) * | 2018-03-28 | 2019-10-11 | 台湾积体电路制造股份有限公司 | Semiconductor structure |
| CN112133739A (en) * | 2019-06-25 | 2020-12-25 | 联华电子股份有限公司 | High electron mobility transistor and method for adjusting electron density of two-dimensional electron gas |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102891171A (en) * | 2011-07-21 | 2013-01-23 | 联华电子股份有限公司 | Nitride semiconductor device and manufacturing method thereof |
| CN103456781A (en) * | 2012-06-04 | 2013-12-18 | 英飞凌科技奥地利有限公司 | Compound semiconductor transistor with self aligned gate |
-
2015
- 2015-12-31 CN CN201511031136.XA patent/CN106935643A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102891171A (en) * | 2011-07-21 | 2013-01-23 | 联华电子股份有限公司 | Nitride semiconductor device and manufacturing method thereof |
| CN103456781A (en) * | 2012-06-04 | 2013-12-18 | 英飞凌科技奥地利有限公司 | Compound semiconductor transistor with self aligned gate |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110323275A (en) * | 2018-03-28 | 2019-10-11 | 台湾积体电路制造股份有限公司 | Semiconductor structure |
| CN112133739A (en) * | 2019-06-25 | 2020-12-25 | 联华电子股份有限公司 | High electron mobility transistor and method for adjusting electron density of two-dimensional electron gas |
| CN112133739B (en) * | 2019-06-25 | 2024-05-07 | 联华电子股份有限公司 | High electron mobility transistor and method for adjusting electron density of two-dimensional electron gas |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10008591B2 (en) | Semiconductor device, fabrication method for semiconductor device, power supply apparatus and high-frequency amplifier | |
| TWI515874B (en) | Semiconductor device, method for manufacturing the same, power supply, and high-frequency amplifier | |
| CN106663693B (en) | Manufacturing silicon carbide semiconductor device | |
| CN104395993B (en) | Semiconductor device | |
| EP3082160A1 (en) | Semiconductor device and manufacturing method thereof | |
| CN103035706B (en) | A kind of vertical gallium nitride radical heterojunction field effect transistor with polarization doping current barrier layer | |
| US8772833B2 (en) | Power semiconductor device and fabrication method thereof | |
| CN106601809A (en) | Gallium-nitride field effect transistor and manufacturing method therefor | |
| KR20170059975A (en) | Iii-n epitaxial device structures on free standing silicon mesas | |
| JP2013516795A5 (en) | ||
| CN103824845A (en) | Semiconductor device | |
| JP2012222360A (en) | Stacked composite device including group iii-v transistor and group iv lateral transistor | |
| CN105140302B (en) | Charge compensation pressure-resistance structure vertical gallium nitride radical heterojunction field effect pipe | |
| CN104167445B (en) | GaN-based enhancement/depletion mode heterojunction field effect transistor with buried gate structure | |
| CN102820325A (en) | Gallium nitride-based hetero-junction field effect transistor with back electrode structure | |
| KR20140042470A (en) | Normally off high electron mobility transistor | |
| JP2011159763A (en) | Power semiconductor device | |
| CN104269433B (en) | Gallium-nitride-based enhancement type heterojunction field effect transistor with composite channel layer | |
| JP2015122361A (en) | Field effect transistor | |
| US20150069615A1 (en) | Semiconductor device | |
| US8907377B2 (en) | High electron mobility transistor and method of manufacturing the same | |
| WO2023236523A1 (en) | Enhanced integrated structure of n-channel and p-channel gan devices | |
| CN103441131A (en) | Partially-depleted silicon-on-insulator device structure | |
| TW201234601A (en) | Vertical semiconductor device and manufacturing method therefor | |
| CN106935643A (en) | HEMT and memory chip |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20170707 |
|
| RJ01 | Rejection of invention patent application after publication |