CN106934258A - A kind of embedded system - Google Patents
A kind of embedded system Download PDFInfo
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- CN106934258A CN106934258A CN201511030896.9A CN201511030896A CN106934258A CN 106934258 A CN106934258 A CN 106934258A CN 201511030896 A CN201511030896 A CN 201511030896A CN 106934258 A CN106934258 A CN 106934258A
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- 238000003860 storage Methods 0.000 claims abstract description 233
- 238000013507 mapping Methods 0.000 claims description 47
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- 230000000694 effects Effects 0.000 claims description 7
- 238000000151 deposition Methods 0.000 claims description 5
- 210000003205 muscle Anatomy 0.000 claims description 5
- 230000003068 static effect Effects 0.000 claims description 2
- 230000009286 beneficial effect Effects 0.000 abstract description 3
- 238000000034 method Methods 0.000 description 7
- 238000013500 data storage Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
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- 238000005538 encapsulation Methods 0.000 description 1
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/10—Protecting distributed programs or content, e.g. vending or licensing of copyrighted material ; Digital rights management [DRM]
- G06F21/12—Protecting executable software
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1408—Protection against unauthorised use of memory or access to memory by using cryptography
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
- G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
Abstract
The invention discloses a kind of embedded system, including：Flash controller, CPU and flash chip, flash controller are connected respectively with CPU with flash chip；Flash chip includes：Flash memory main storage area, for storing general program data；Flash memory system configuring area, the status information for configuring flash chip；Also include：Flash memory extension storage area, for storing specific user data；The flash controller, status information for interacting flash chip with flash memory system configuring area, and according to the status information of flash chip, the user data is read from flash memory extension storage area, performed for the CPU, or the user data that flash memory extension storage area is stored is rewritten；It is additionally operable to be written and read access to flash memory main storage area.The technical program, the memory space for independently using has been provided the user by increasing flash memory extension storage area, realizes the safety storage of user's private data, meanwhile, also with multiplexing, the beneficial effect of extra hardware spending is not increased.
Description
Technical field
The present embodiments relate to field of computer technology, more particularly to a kind of embedded system.
Background technology
Microcontroller (Micro Control Unit, MCU) application is widely, small to toy for children, greatly
It is possible to use to engineering machinery.
Memory space in MCU chip generally used now is mostly all user's indifferences and uses, as user
Shared memory space, the data stored by user very can easily be accessed the chip user read,
Even rewrite, cause the security of the data of user's storage relatively low.Especially in the row that some confidentiality are very high
In industry application, when needing to store the security informations such as some crucial keys, it will usually need some independent privates
Some memory spaces, and existing MCU chip cannot independently meet the demand of user's customization storage, it is necessary to borrow
Help the mode of external other chips to realize, such as by the external small flash chip of MCU chip or
(Electrically Erasable Programmable Read-Only Memory, electronics is erasable for EEPROM
Except programmable read only memory) etc. some crucial security informations exclusive to store user.
But, using the method for external other chips of existing MCU chip, firstly, it is necessary to MCU chip branch
Hold the other flash chip of access or EEPROM；Secondly, extraneous other chips can increase entirety and take up room,
Increase the workload of operating personnel, operation is relatively cumbersome, and substantially increase cost and system development difficulty.
The content of the invention
The present invention provides a kind of embedded system, to solve the safety problem of user data storage.
A kind of embedded system is the embodiment of the invention provides, including：Flash controller, central processing unit
(Central Processing Unit, CPU) and flash chip, the flash controller and the CPU and
The flash chip is connected respectively；Wherein,
The flash chip includes：
Flash memory main storage area, for storing general program data；
Flash memory system configuring area, the status information for configuring the flash chip；
The flash chip also includes：
Flash memory extension storage area, for storing specific user data；
The flash controller, the state for interacting the flash chip with the flash memory system configuring area is believed
Breath, and according to the status information of the flash chip, the user is read from the flash memory extension storage area
Data, perform, or the user data that the flash memory extension storage area is stored is changed for the CPU
Write；It is additionally operable to be written and read access to the flash memory main storage area.
Further, the flash controller includes：
Flash memory system EBI；
Flash configuration register, is connected with the flash memory system EBI；
Main control unit, is connected respectively with the flash memory system EBI and the flash configuration register；
Flash memory control unit, with the flash configuration register, the main control unit and the flash chip point
Do not connect；
The flash memory system EBI, for the first reading instruction for sending system bus and corresponding address
Send to the main control unit, wherein, first reading instruction, for entering to the flash memory extension storage area
Row read access；The first write command and corresponding address for being additionally operable to send system bus are sent to the master control
Unit, wherein, first write command, for carrying out write access to the flash memory extension storage area；
The flash configuration register, for after electricity in the embedded system, the flash memory being read automatically
The status information of the flash chip in system configuration area, the status information of the flash chip includes：Dodge
Deposit extension storage area whether effective information；To be interacted with the flash memory system EBI and read with described first
Corresponding address or address corresponding with first write command are instructed, the sudden strain of a muscle in flash chip is mapped as
The physical address information in extension storage area is deposited, as the address mapping information in flash memory extension storage area；And to institute
Whether the address mapping information and flash memory extension storage area for stating main control unit offer flash memory extension storage area are effectively believed
Breath；
The main control unit, for whether being had according to the address mapping information and the flash memory extension storage area
Whether effectively effect information, judge the first reading instruction that system bus sends and corresponding address, if so, then controlling
Make the flash memory control unit is carried out to the user data that flash memory extension storage area in the flash chip is stored
Read；Be additionally operable to according to the address mapping information and the flash memory extension storage area whether effective information, sentence
Whether the first write command and corresponding address that disconnected system bus sends are effective, if so, then controlling the flash memory
Control unit is rewritten to the user data that flash memory extension storage area in the flash chip is stored；
The flash memory control unit, for the control according to the main control unit, to being dodged in the flash chip
The user data that extension storage area stored is deposited to be read out or rewrite.
Further, the flash configuration register includes：
Extension storage enables register, for automatic from the flash memory system in the flash chip after upper electricity
Configuring area read extension storage area whether effective information, and provide to the main control unit；
Extension storage mapping address register, for will be interacted with the flash memory system EBI with it is described
The corresponding address of first reading instruction or address corresponding with first write command, are mapped as in flash chip
The physical address information in the flash memory extension storage area, as the address mapping information in flash memory extension storage area,
There is provided to the main control unit；
Accordingly, the flash memory system EBI, is additionally operable to directly carry out the flash configuration register
Read and write access.
Further, the flash configuration register also includes：Flash memory keys register and/or flash disk operation
Register；
The flash memory keys register, for depositing the flash memory system configuration accessed in the flash chip
The key in area；
The flash disk operation register, for the number of the flash memory system configuring area in the flash chip
According to being wiped, write or read.
Further, the main control unit includes：
Operation control unit, for controlling the flash memory control unit to be wiped the flash chip, write
Enter or read operation；
Extension storage address comparing unit, the first reading that the system bus for judging to receive sends refers to
Whether order and corresponding address or the first write command for sending and corresponding address are effective.
Further, stating system also includes：SRAM (Static Random Access
Memory, SRAM), for storing general program data and user in the flash chip after the power-up
Data；
The flash controller also includes：SRAM control units, with the flash memory system EBI, institute
Main control unit, the flash memory control unit and the SRAM is stated to connect respectively；
Whether the main control unit, be additionally operable to effective according to the address mapping information and the extension storage area
Whether effectively information, judge the first reading instruction that system bus sends and corresponding address, if so, then controlling
The SRAM control units are read out to the user data stored in the SRAM；It is additionally operable to basis
The address mapping information and the extension storage area whether effective information, judge system bus sends first
Whether write command and corresponding address are effective, if so, then controlling the SRAM control units to described
The user data stored in SRAM is rewritten, or controls the flash memory control unit to the flash memory core
The user data stored in piece is rewritten；
The SRAM control units, for the control according to the main control unit, to institute in the SRAM
The user data of storage is read out or rewrites.
Further, the flash memory extension storage area includes at least one flash memory extension storage block；
Accordingly, the extension storage enables register, for automatic from the flash chip after upper electricity
Any one is read in the flash memory system configuring area or whether any number of flash memory extension storage blocks are effectively believed
Breath, and provide to the main control unit.
Further, the extension storage mapping address register, be additionally operable to by with the flash memory system bus
The multiple different address corresponding with first reading instruction or corresponding with first write command of interactive interfacing
Address, the identical physical address information in the flash memory extension storage area being mapped as in flash chip, make
It is the address mapping information in flash memory extension storage area, there is provided to the main control unit.
Further, storage of the memory space in the flash memory extension storage area less than the flash memory main storage area
Space.
The technical scheme that the embodiment of the present invention is provided, by increasing flash memory extension storage in flash chip
Area, it is customizable that the memory space for having provided the user and independently having used is independently operated, to special user and any
Other users are invisible, realize the safety storage of user's private data, can be to dodging by flash controller
Deposit extension storage area and be written and read access；Simultaneously as flash chip typically can all have some idle spaces,
Using above-mentioned technical proposal, the idle space of flash chip can be used as flash memory extension storage area, it is not necessary to
Increase flash chip area, while saving external one small flash chip or EEPROM, it is not necessary to increase
Plus extra hardware spending, but also the logic with reading, the erasable flash memory extension storage area can be with reading
Take, the beneficial effect of the logical multiplexing in erasable flash memory main storage area.
Brief description of the drawings
The detailed description made to non-limiting example made with reference to the following drawings by reading, the present invention
Other features, objects and advantages will become more apparent upon：
A kind of structural representation of embedded system that Fig. 1 is provided by the embodiment of the present invention one；
Fig. 2A is a kind of structural representation of embedded system that the embodiment of the present invention two is provided；
Flash memory system in a kind of embedded system that Fig. 2 B embodiment of the present invention two is provided in flash chip
The flow chart of the Improvement of configuring area；
Fig. 3 is a kind of structural representation of embedded system that the embodiment of the present invention three is provided；
Fig. 4 A are a kind of structural representations in the flash memory extension storage area provided for the embodiment of the present invention four；
Fig. 4 B are a kind of read-write side in the flash memory extension storage area of embedded system provided in an embodiment of the present invention
The flow chart of method.
Specific embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this
The described specific embodiment in place is used only for explaining the present invention, rather than limitation of the invention.Also need in addition
It is noted that for the ease of description, illustrate only part related to the present invention in accompanying drawing and not all knot
Structure.
Embodiment one
The structural representation of a kind of embedded system that Fig. 1 is provided by the embodiment of the present invention one, such as Fig. 1 institutes
Show, the embedded system that the present embodiment is provided, including：Flash controller 110, central processing unit (CPU)
120 and flash chip 130, flash controller 110 is connected respectively with CPU 120 with flash chip 130；Its
In, CPU 120 is used to control the operation of flash controller 110 and flash chip 130；Flash chip 130
Readable, erasable, the data message stored under powering-off state is not lost.
Wherein, flash controller 110, CPU120 configuration can be used on the master chip of embedded system
MCP (Multiple Chip Package) technologies manufacture in same encapsulation master chip and flash chip,
Form embedded system.
In embodiments of the present invention, flash chip 130 includes：Flash memory main storage area 131 and flash memory system are matched somebody with somebody
Put area 132.
Wherein, flash memory main storage area 131 is used to store general program data, usually all with can make per family
Storage region, the space typically occupied in flash chip 130 is relatively large, for example, can be several
Hundred kilobytes are to several Mbytes.Flash memory system configuring area 132 is used to configure the status information of the flash chip.
Flash memory system configuring area 132 is generally pre-configured in flash chip, in actual use, flash memory system
Uniting, the usual user in configuring area 132 is invisible can not also to change.Flash memory system configuring area 132 is general smaller,
For example can be several bytes to tens bytes.
Flash chip 130 also includes：Flash memory extension storage area 133, for storing specific user data.
Flash memory extension storage area 133 is particularly suited for storing the user data of crucial secrecy, such as password etc., flash memory
The user data that extension storage area 133 is stored, any other user cannot directly access, and can effectively protect
The security and confidentiality of user data are demonstrate,proved, demand of the user to the separate storage of private data is met.
Flash controller 110, the state for interacting flash chip 130 with the flash memory system configuring area 132
Information, and the user data is read from flash memory extension storage area 133, performed for CPU 120, or
The user data that flash memory extension storage area 133 is stored is rewritten；It is additionally operable to flash memory main storage area 131
It is written and read access.The embedded system passes through operation one of the flash controller 110 to flash chip 130
As predominantly read operation, directly can read user data from flash chip 130；When in flash chip 130
Data when needing modification, also can perform write operation, write operation needs first to wipe corresponding in flash chip 130
Position, then programming by way of rewrite data.
The technical scheme that the embodiment of the present invention is provided, by increasing flash memory extension storage in flash chip
Area, it is customizable that the memory space for having provided the user and independently having used is independently operated, to special user and any
Other users are invisible, realize the safety storage of user's private data, can be to dodging by flash controller
Deposit extension storage area and be written and read access；Simultaneously as flash chip typically can all have some idle spaces,
Using above-mentioned technical proposal, the idle space of flash chip can be used as flash memory extension storage area, it is not necessary to
Increase flash chip area, while saving external one small flash chip or EEPROM, it is not necessary to increase
Plus extra hardware spending, but also the logic with reading, the erasable flash memory extension storage area can be with reading
Take, the beneficial effect of the logical multiplexing in erasable flash memory main storage area.
Embodiment two
Fig. 2A is a kind of structural representation of embedded system that the embodiment of the present invention two is provided, such as Fig. 2 institutes
Show, the present embodiment is on the basis of above-described embodiment, there is provided the preferred implementation scheme of flash controller 210.
Flash controller 210 includes：Flash memory system EBI 211, flash configuration register 212, master control
Unit 213 and flash memory control unit 214.
Wherein, flash configuration register 212 is connected with flash memory system EBI 211；Main control unit 213
It is connected respectively with flash memory system EBI 211 and flash configuration register 212；Flash memory control unit 214
It is connected respectively with flash configuration register 212, main control unit 213 and flash chip 230.
Flash memory system EBI 211, for the first reading instruction for sending system bus 220 and corresponding
Location is sent to main control unit 213, wherein, first reading instruction, for the flash memory extension storage area
Carry out read access；The first write command and corresponding address for being additionally operable to send system bus 220 are sent to master
Control unit 213, wherein, first write command, for carrying out write access to the flash memory extension storage area
Specifically, can be sent to main control unit 213 by control access 1.
Flash configuration register 212, for after electricity in the embedded system, the flash memory being read automatically
The status information of the flash chip 230 in system configuration area, the status information of flash chip 230 includes：Dodge
Deposit extension storage area whether effective information；To be interacted with flash memory system EBI 211 and read with described first
Corresponding address or address corresponding with first write command are instructed, the institute in flash chip 230 is mapped as
The physical address information in flash memory extension storage area is stated, as the address mapping information in flash memory extension storage area；And
There is provided whether the address mapping information in flash memory extension storage area and flash memory extension storage area have to main control unit 213
Effect information.
Whether main control unit 213, can be used for being had according to the address mapping information and the extension storage area
Whether effectively effect information, judge the first reading instruction that system bus 220 sends and corresponding address, if so,
The user data that then control flash memory control unit 214 is stored to flash memory extension storage area in flash chip 230
It is read out；Be additionally operable to according to the address mapping information and the extension storage area whether effective information, sentence
Whether the first write command and corresponding address that disconnected system bus 220 sends are effective, if so, then controlling flash memory
Control unit 214 is rewritten to the user data that flash memory extension storage area in flash chip 230 is stored.
Further, main control unit 213 can also be according to the first reading instruction of system bus 220 and corresponding
Address or the first write command and corresponding address, are sent to flash memory control unit 214 by control access 2.
Flash memory control unit 214, can be used for the control according to the main control unit 213, to flash chip
The user data that flash memory extension storage area is stored in 230 is read out or rewrites.Flash memory control unit 214
Can be by data path 2 by the flash chip 230 in the flash memory system configuring area in flash chip 230
Status information, there is provided to flash configuration register 212, further, flash configuration register 212 can be with
It is general program data and number of users in the offer flash chip 230 of main control unit 213 by control access 3
It is believed that breath.
Additionally, system bus 220 can also be by data path 1 (for flash memory system EBI 211 arrives flash memory
Data path between configuration register 212) configuration flash configuration register 212 information.
The function of flash memory system EBI 211 is except the read and write access of system bus 220 is converted into dodging
Deposit outside the read and write access of chip 230, it is right to can be also used for being converted into the read and write access of system bus 220
The read and write access of flash configuration register 212, can distinguish from address.When to flash configuration register 212
During read-write, then in directly reading or being written to flash configuration register 212 by data path 1.
On the basis of above-described embodiment, the main control unit 213 can include：Operation control unit 2131
With extension storage address comparing unit 2132.
Wherein, operation control unit 2131, for controlling the flash memory core of the flash memory control unit 214 pairs
Piece 230 is wiped, write or read operation；Specifically, controlling the flash memory control unit 214 pairs
Flash memory extension storage area in the flash chip 230 wiped, write or during read operation, it is necessary to
Extension storage address comparing unit 2132 can just be carried out in the case of judging current operation as effective.
Extension storage address comparing unit 2132, for judging the system bus that receives sends first
Whether reading instruction and corresponding address or the first write command for sending and corresponding address are effective.
That is, main control unit 213 can be obtained by control access 1 from flash memory system EBI 211
The operation to be performed of system bus 220, such as read operation, or write operation.By control access 2, to sudden strain of a muscle
Deposit control unit 214 and send instruction, such as wipe, programming, or reading instruction etc..If specifically, read-write is dodged
The user data in the flash memory extension storage area in chip 230 is deposited, system bus 220 is obtained from control access 1
The read write command for sending and address, the address mapping information in flash memory extension storage area is obtained from control access 3,
And extension storage area whether effective information, by extension storage address comparing unit, judge system bus 220
Whether effectively the read write command for sending and address, deposit if effectively to the flash memory extension in flash chip 230
Storage area is written and read, such as invalid, then ignore the operation of system bus 220.
On the basis of above-described embodiment, the flash configuration register 212 can include：
Extension storage enables register 2123, for after upper electricity it is automatic from the flash chip 230 described in
Flash memory system configuring area read flash memory extension storage area whether effective information, and provide to the main control unit
213；It should be noted that the flash memory extension storage area for being read whether effective information be flash chip 230 in
The status information of flash chip 230 that is configured of flash memory system configuring area in one of which.
Extension storage mapping address register 2124, for will be interacted with flash memory system EBI 211 with
The corresponding address of first reading instruction or address corresponding with first write command, are mapped as flash chip
The physical address information in the flash memory extension storage area in 230, reflects as the address in flash memory extension storage area
Penetrate information, there is provided to the main control unit 213.
Accordingly, flash memory system EBI 211, is additionally operable to directly carry out flash configuration register 212
Read and write access, system bus 220 can arrive flash configuration register 212 by flash memory system EBI 211
Between the information of the configuration of data path 1 flash memory register 212；The flash memory system of flash chip 230 is matched somebody with somebody
Putting area also includes that extension storage enables the shape of register 2123 and extension storage mapping address register 2124
State information.After the power-up, extension storage enables register 2123 and extension storage mapping address register
2124 status information can automatically update extension storage and enable register 2123 and extension storage mapping ground
In location register 2124.
It is described to judge the system bus 220 that receives sends first on the basis of above-described embodiment
Whether effectively reading instruction and corresponding address or the first write command for sending and corresponding address, can be specifically：
Whether the corresponding address of the first reading instruction that the 1st, decision-making system bus 220 sends is in flash memory extension storage area
Within the scope of the effective address of setting；
2nd, by comparing the first reading that extension storage mapping address register 2124 and system bus 220 send
Corresponding address is instructed, judges current address whether within the scope of address of cache；
3rd, register 2123 is enabled by extension storage and judges that the corresponding flash memory extension storage area in current address is
It is no effective.
After 3 steps judge successfully, then operation control unit 2131 sends corresponding read operation instruction.
It should be noted that this is said as a example by sentencing the flash memory extension storage area read in flash chip 230
It is bright, for flash memory extension storage area, rewrite, erasing or programming instruction and corresponding address it is whether effective
Judge similar.
On the basis of above-described embodiment, flash configuration deposits 212 devices can also be included：Flash memory keys are deposited
Device 2121 and/or flash disk operation register 2122.Wherein, the flash memory keys register 2121, for depositing
The key for accessing the flash memory system configuring area in flash chip 230 is put, key is generally pre-configured in sudden strain of a muscle
In depositing cipher key register 2121, in the data in needing to rewrite flash memory system configuring area, it is necessary to judge key
Whether correct, flash memory keys register 2121 can effectively prevent illegal rewriting.Flash memory in flash chip 230
System configuration area is producer's configuration, is unavailable user, invisible, by judging whether key correctly hinders
It is only illegal to rewrite.
Flash disk operation register 2122, the flash memory system configuring area in can be used for flash chip 230
Data wiped, write or read.Specifically, when producer need rewrite flash chip 230 in flash memory
During system configuration area, erasing, and programming operation instruction can be sent by flash disk operation register 2122, with
Reach the purpose for rewriting flash memory system configuring area in flash chip 230.
The present embodiment also provides a kind of rewriting side of the flash memory system configuring area in flash chip in embedded system
Method, referring to Fig. 2 B, methods described is specifically included：
S210, electrification reset, the system status information in reading flash chip in flash memory system configuring area.
S220, CPU read the general program data in flash chip, control system operation by system bus.
The reading program data from flash chip, are provided in CPU, institute by the program data bus of system bus
State embedded system and start normal operation.
S230, judge whether main control unit receives the first write command of system bus and corresponding address, if
It is S240 to be performed, if it is not, then returning to S220.That is, judge whether to need replacement system to configure,
If so, then entering the step of writing key.
S240, flash memory keys register judge whether the key that receives correct, if if so, perform S250,
It is no, then return to S210.Only flash memory keys register judges that the key for receiving is correct, can just perform phase
The operation of the status information of the erasable described flash chip answered, the first of the system bus that will otherwise receive writes
Instruction and corresponding address are considered as illegal operation.
S250, according to first write command of the system bus and corresponding address, in flash chip
Flash memory system configuring area, wipe and write the status information of the corresponding flash chip.In this case, it is
What the system bus write-in extension storage enable register and the extension storage mapping address register to be updated
Value, the first write order according to system bus and corresponding address by flash disk operation register root are logical by data
Rewrite the status information of the flash chip of flash memory system configuring area in road 2.
On the basis of above-mentioned technical proposal, methods described can also include：The flash disk operation register root
According to the first reading instruction that the system bus writes, by the flash chip in current flash system configuration area
State information updating is in flash configuration register.Further, current institute is then read by system bus
The status information of flash chip is stated, and is compared with first write command；According to comparison result, it is determined that
The system configuration state in current flash system configuration area.Specifically, the state of flash chip is believed as is now described
Breath is consistent with first write command, then judge that the status information of the flash chip is correct, otherwise, it is determined that
The status information mistake of the flash chip, can directly abandon and change chip, or reconfigure as needed
The status information of the flash chip of the flash memory system configuring area.
Using above-mentioned technical proposal, register is enabled by increasing extension storage, extension storage mapping address is posted
Storage and extension storage address comparing unit, both meet the need of the user for needing the crucial security information of storage
Ask, be easy to User Exploitation, and in extending user memory space, protect user data private ownership and independence
While, effectively protect the security of flash memory chip data.
Embodiment three
Fig. 3 is a kind of structural representation of embedded system that the embodiment of the present invention two is provided, as shown in figure 3,
The technical scheme of the present embodiment is further optimized on the basis of above-described embodiment, is compared and above-mentioned reality
Example is applied, the system also includes：
SRAM (SRAM) 310, for storing the general journey in flash chip 320 after the power-up
Ordinal number evidence and user data.Read operation of the embedded system to flash chip 320, can directly from flash memory
Read in chip 320, because the reading speed of flash chip 320 is slower, preferably can be by SRAM 310
Read, it is possible to achieve the real-time reading to general program data in flash chip 320 and user data, improve
To the reading speed of general program data and user data in flash chip 320.
In order to preferably meet the quick general program data and user data read in flash chip 320, and
In view of SRAM areas and shared address space, SRAM 310 can include main SRAM and auxiliary SRAM,
The address space of main SRAM typically can not be too big, such as can be tens kilobytes, in concrete operations, when
When the address space of main SRAM is not enough, can be using auxiliary SRAM.
The flash controller 330 also includes：SRAM control units 331, with flash memory system EBI 332,
Main control unit 333, flash memory control unit 334 and SRAM310 are connected respectively.
Main control unit 333, be additionally operable to according to the address mapping information and the flash memory extension storage area whether
Whether effectively effective information, judge the first reading instruction that system bus 340 sends and corresponding address, if so,
Then control SRAM 331 user data to being stored in SRAM 310 of control unit is read out；It is additionally operable to
According to the address mapping information and the flash memory extension storage area whether effective information, judge system bus 340
Whether the first write command for sending and corresponding address are effective, if so, then control SRAM control units 331 pairs
The user data stored in SRAM 310 is rewritten, or control flash memory control unit 334 is to flash chip
The user data stored in 320 is rewritten.
On the basis of above-described embodiment, system bus 340 can be sent out in flash chip 320
The instruction that the general program data that flash memory main storage area is stored are rewritten and corresponding address, the flash memory
Control unit 334 by data path 5 and flash memory system EBI 332 interact it is described instruct with it is corresponding
Address, so as to realize entering the general program data stored in the flash memory main storage area in flash chip 320
Row is rewritten.
In the present embodiment, the concrete structure and function of flash configuration register 335 are same as the previously described embodiments.
The first reading instruction and correspondence that the reception system bus 340 of main control unit 333 is sent by control access 1
Address, and according to flash configuration register 335 provide address mapping information and extension storage area whether have
Effect information, judges the first reading instruction that system bus 340 sends and corresponding address effectively, preferably through
SRAM 310 reads the data in flash chip 320.If in the embedded system after electricity, main control unit 333
The target data of required reading in SRAM 310, then directly reads, and lead in storage from SRAM 310
Data path 1 is crossed to send into system bus 340；Target data is not stored in SRAM 310 as described,
Then the target data first can be read into data in SRAM 310 from flash chip 320, then from SRAM
Read in 310.
Specifically, the user data that SRAM 310 is stored can be by flash memory control unit to SRAM controls
Data path 4 between unit, the general program data and user data in flash chip 320 are read
In SRAM 310, and in the embedded system after electricity, SRAM 310 can automatically read and store flash memory
The user data in general program data or flash memory extension storage area in chip 320 in flash memory main storage area.
SRAM control units 331, for the control according to the main control unit 333, to institute in SRAM 310
The user data of storage is read out or rewrites.The main control unit that SRAM control units 331 will can be received
333 by the first reading instruction of control access 4 and corresponding address translation into SRAM 310 the first reading instruction
With corresponding address, the first write command of the main control unit 333 that will can also be received and corresponding address are turned over
It is translated into first write command of SRAM 310 and corresponding address.
In the above-described embodiments, main control unit 333 can be by the reading flash chips 320 of main SRAM 310
General program data and user data, for example can be specifically that main SRAM carries out 1:1 replicates flash chip
The general program data of real-time response are needed in flash memory main storage area in 320, is provided by data path 4
To flash memory system EBI 332, that is to say, that this partial data system bus can directly from main SRAM
Middle reading, is to read in real time, and without waiting for the cycle, reading speed is most fast；Can also be read by aiding in SRAM
General program data and the user data in flash chip 320 are taken, if having corresponding number of targets in auxiliary SRAM
According to, then directly read from auxiliary SRAM, if there is no corresponding data in auxiliary SRAM, will first can need
The data to be read read in auxiliary SRAM from flash chip 320, by aiding in SRAM to provide by number
According to path 3 to flash memory system EBI 332.That is, the mode of operation by being similar to cache, such as
There are corresponding data (similar to cache hit) in fruit auxiliary SRAM, then directly read from auxiliary SRAM
Take, if there is no corresponding data (similar to cache miss) in auxiliary SRAM, will first need what is read
Data are read in auxiliary SRAM from flash chip, and system bus reads from auxiliary SRAM again.
Auxiliary SRAM typically stores the data that magnanimity is seldom changed.It is less demanding to reading speed, it is general to read
Taking has certain latent period.In the present case, flash memory extension storage area is smaller (such as 1K bytes),
1 can be carried out by main SRAM:1 replicates, and can so read in real time, but can increase the area of SRAM.
Can be read by aiding in SRAM, reading manner is consistent with noted earlier, so reading can increase some waits
Cycle, but SRAM areas will not be increased.
To sum up, above-mentioned technical proposal reads the general program number in the flash chip 320 by SRAM 310
According to and user data, effectively accelerate the embedded system to the general program in the flash chip 320
The reading speed of data and user data, and realize reading in real time, significant increase Consumer's Experience.
Example IV
The embodiment of the present invention provides two kinds of embedded systems, on the basis of the various embodiments described above, realizes multiplex
Family stores.
Mode one
Fig. 4 A are a kind of structural representation in flash memory extension storage area that the embodiment of the present invention four is provided, and are such as schemed
Shown in 4A, the technical scheme of the present embodiment is further optimized on the basis of above-described embodiment, is compared
With above-described embodiment, difference is that preferably, flash memory extension storage area 410 expands including at least one flash memory
Exhibition memory block 411.Wherein, the size of flash memory extension storage block 411 can be set according to the actual requirements,
Do not limit herein.For example, flash memory extension storage area 410 is total up to 128K bytes, it is divided into 32 extensions
Memory block 411, each block is 4 kbytes in size.
Accordingly, the extension storage enables register, for automatic from the flash chip after upper electricity
Any one is read in the flash memory system configuring area or whether any number of flash memory extension storage blocks 411 are effective
Information, and provide to the main control unit.Can be by 410 points of flash memory extension storage area using the technical program
Multiple flash memory extension storage blocks 411 are cut into, and then whether effectively to can configure each flash memory extension storage block 411,
Multiple users are so may be configured to, the flash memory extension storage block 411 of each user is isolated in physical store.
And, any one or more flash memory extension storage blocks 411 of flexibly configurable are effective, to meet different user
To the demand of the size of extension storage block 411.
For example, it is assumed that there are 32 flash memory extension storage blocks 411 in flash memory extension storage area 410, each sudden strain of a muscle
Depositing extension storage block 411 has 4Kbytes (byte), and the space of 128K bytes is taken altogether；The extension
Whether it is 32bits that storage enables register, control 1 flash memory extension storage block 411 effective per bit.It is existing
6 users are respectively necessary for the extension storage area of 4KB, 4KB, 8KB, 16KB, 32KB, 64KB size
Domain, then it is that (lowest order is 1 to 32 ' h1, and other are that can be respectively configured the extension storage and enable register
0)、32’h2、32’hC、32’hF0、32’hFF00、32’hFFFF_0000.Above-mentioned 6 except this
With open air, other all of universal standards are then configured to 32 ' h0 (institutes with not having extension storage region per family
There is bit for 0).So this 6 family expenses can be used different flash memory extension storage blocks 411 per family, so as to realize 6
Data of the individual user's storage in flash memory extension storage area 410 are mutually isolated, and reach secrecy effect.
Mode two
In mode one, because every one flash memory extension storage block 411 of increase then needs to increase in flash card chip
Plus same physical space, in order that the data that can meet more users of flash memory extension storage area 410 are deposited
Storage demand, the extension storage mapping address register, be preferably additionally operable to by with the flash memory system bus
The multiple different address corresponding with first reading instruction or corresponding with first write command of interactive interfacing
Address, the identical physical address information in the flash memory extension storage area 410 being mapped as in flash chip, make
It is the address mapping information in flash memory extension storage area, there is provided to the main control unit.
Wherein, the address mapping information in the flash memory extension storage area is usually as flash memory extension storage area 410
Identical physical address information logical address, for user by system bus realize to flash memory expand
Open up the read and write access of memory block 410.
For example, it is assumed that first user needs 4K extension storages area the first flash memory extension storage block of correspondence, expands
It is 32 ' h1 that exhibition storage enables register, and can configure extension storage mapping address register is 0, if 4K altogether
The ranges of logical addresses of bytes, the then system bus address being mapped to is 32 ' h00C0_0000 to 32 '
h00C0_0FFF；Second user equally uses the first flash memory extension storage block, and extension storage enables register still
It is 32 ' h1, it is 1, the then system being mapped to that can now configure the extension storage mapping address register
Bus address is the 32 ' h00C2_0FFF of h00C2_0000 to 32 '.So because two users access described
The logical address in flash memory extension storage area is different, can equally reach data isolation, mutually the effect of secrecy.
Above-mentioned technical proposal, is controlled the same flash memory using the extension storage mapping address register
Fast physical address information is mapped as the multiple different logical address of system bus, because user is in reality
In the operation of border, generally only need to use the logical address of system bus so that the same flash memory extension
Memory block may be configured to different user, so as to realize meeting the data storage requirement of more users, will dodge
The limited physical space of chip is deposited, being preferably allocated to more users carries out data storage.
In order to better meet demand of the user to the flash chip, reasonable distribution space is preferably described
Memory space of the memory space in flash memory extension storage area less than the flash memory main storage area.
The embedded system provided using above-mentioned technical proposal, even if the data message of the user A that is stored with
Flash chip A, is cracked by user B, and user B can only also read flash memory main storage area in flash chip A
General program data, due to the chip of user A flash memory extension storage area used by physical address or logically
Location is different from the physical address and/or logical address used by the extension storage area of user B so that flash chip A
The general program data in middle flash memory main storage area cannot be used on the flash chip B of user B, be adequately protected
Private ownership, the independence of the data storage of each user, substantially increases security.
A kind of reading/writing method in the flash memory extension storage area of embedded system that Fig. 4 B are provided for the present embodiment
Flow chart, methods described includes：
S410, electrification reset, the system status information in reading flash chip in flash memory system configuring area.Tool
Body includes, after electrification reset, the extension storage that the flash memory system configuring area in flash chip is stored is enabled and posted
The information of storage, and extension storage mapping address register information, can automatically update to extension storage
In enable register and extension storage mapping address register.
S420, CPU read the general program data in flash chip, control system operation by system bus.
S430, judge the system bus instruction whether be read and write flash chip in flash memory extension storage area,
If so, performing S440；If it is not, then returning to S420.
S440, main control unit perform corresponding operation according to the instruction of the system bus.
If the instruction of S450, the system bus is the first reading instruction and corresponding address, the main control unit
According to the address mapping information and the extension storage area whether effective information, judge what system bus sent
Whether the first reading instruction and corresponding address are effective, if so, S470 is performed, if it is not, then returning to S420.
If S460, the system bus instruction be the first write command and corresponding address, main control unit according to
The system status information configuration flash controller of the flash memory system configuring area in the flash chip, performs
S480。
S470, the CPU read the corresponding data in flash memory extension storage area by flash memory control unit.
Whether S480, the main control unit are effectively believed according to the address mapping information and the extension storage area
Whether effectively breath, judge the first write command that system bus sends and corresponding address, if so, execution S490；
If it is not, then returning to S420.
In S450 and S480, the main control unit can judge institute by extension storage address comparing unit
State the first reading instruction and corresponding address that system bus sends or the first write command for sending and corresponding address
No is flash memory extension storage area effective address.
For example, it is assumed that it is 32bits that extension storage enables register 2123, a total of 32 extensions are deposited
Storage block, every piece of 4Kbytes, variable is set to ext_en [31:0] (from 0~31,32 configurations altogether).Extension
The physical address map of each extension storage block can be 32 different by storage mapping address register 2124
Logical address, variable is set to ext_ad [4:0], then ranges of logical addresses is needed for 32x4KBx32=4096KB,
The ranges of logical addresses that flash memory extension storage area can be set is the 32 ' h00FF_FFFF of h00C0_0000~32 ',
Wherein, the mapping range of every kind of logical address is 4096/32=128KB, and each 128KB points is 32
Extension storage block.Then each flash memory extension storage block is 128KB/32=4KB.Now system bus sends reading
Instruction, reading address is addr.At this time, it may be necessary to passing through extension storage address comparing unit judges that current address is
No is the effective address in flash memory extension storage area, and determination step is：
1.addr<=32 ' h00FF_FFFF and addr>=32 ' h00C0_0000；
2.addr[21:17]==ext_ad [4:0]；
3.ext_en[addr[16:12] it is] 1.
When 3 decision conditions are satisfied by, then illustrate that current address is the effective address in extension storage area.
S490, the CPU are by the erasable flash memory extension storage of operation control unit in main control unit
Area.
Using above-mentioned technical proposal, the demand of the privately owned storage of multi-user can be not only met, and in read-write
During flash memory extension storage area, by the judgement to address validity, the safety of data is fully ensured that.
Note, above are only presently preferred embodiments of the present invention and institute's application technology principle.Those skilled in the art
It will be appreciated that the invention is not restricted to specific embodiment described here, can enter for a person skilled in the art
The various obvious changes of row, readjust and substitute without departing from protection scope of the present invention.Therefore, though
The present invention is described in further detail by above example so, but the present invention be not limited only to
Upper embodiment, without departing from the inventive concept, can also include more other Equivalent embodiments,
And the scope of the present invention is determined by scope of the appended claims.
Claims (9)
1. a kind of embedded system, it is characterised in that including：Flash controller, central processor CPU
And flash chip, the flash controller is connected respectively with the CPU with the flash chip；Wherein,
The flash chip includes：
Flash memory main storage area, for storing general program data；
Flash memory system configuring area, the status information for configuring the flash chip；
The flash chip also includes：
Flash memory extension storage area, for storing specific user data；
The flash controller, the state for interacting the flash chip with the flash memory system configuring area is believed
Breath, and according to the status information of the flash chip, the user is read from the flash memory extension storage area
Data, perform, or the user data that the flash memory extension storage area is stored is changed for the CPU
Write；It is additionally operable to be written and read access to the flash memory main storage area.
2. system according to claim 1, it is characterised in that the flash controller includes：
Flash memory system EBI；
Flash configuration register, is connected with the flash memory system EBI；
Main control unit, is connected respectively with the flash memory system EBI and the flash configuration register；
Flash memory control unit, with the flash configuration register, the main control unit and the flash chip point
Do not connect；
The flash memory system EBI, for the first reading instruction for sending system bus and corresponding address
Send to the main control unit, wherein, first reading instruction, for entering to the flash memory extension storage area
Row read access；The first write command and corresponding address for being additionally operable to send system bus are sent to the master control
Unit, wherein, first write command, for carrying out write access to the flash memory extension storage area；
The flash configuration register, for after electricity in the embedded system, the flash memory being read automatically
The status information of the flash chip in system configuration area, the status information of the flash chip includes：Dodge
Deposit extension storage area whether effective information；To be interacted with the flash memory system EBI and read with described first
Corresponding address or address corresponding with first write command are instructed, the sudden strain of a muscle in flash chip is mapped as
The physical address information in extension storage area is deposited, as the address mapping information in flash memory extension storage area；And to institute
Whether the address mapping information and flash memory extension storage area for stating main control unit offer flash memory extension storage area are effectively believed
Breath；
The main control unit, for whether being had according to the address mapping information and the flash memory extension storage area
Whether effectively effect information, judge the first reading instruction that system bus sends and corresponding address, if so, then controlling
Make the flash memory control unit is carried out to the user data that flash memory extension storage area in the flash chip is stored
Read；Be additionally operable to according to the address mapping information and the flash memory extension storage area whether effective information, sentence
Whether the first write command and corresponding address that disconnected system bus sends are effective, if so, then controlling the flash memory
Control unit is rewritten to the user data that flash memory extension storage area in the flash chip is stored；
The flash memory control unit, for the control according to the main control unit, to being dodged in the flash chip
The user data that extension storage area stored is deposited to be read out or rewrite.
3. system according to claim 2, it is characterised in that the flash configuration register bag
Include：
Extension storage enables register, for automatic from the flash memory system in the flash chip after upper electricity
Configuring area read extension storage area whether effective information, and provide to the main control unit；
Extension storage mapping address register, for will be interacted with the flash memory system EBI with it is described
The corresponding address of first reading instruction or address corresponding with first write command, are mapped as in flash chip
The physical address information in the flash memory extension storage area, as the address mapping information in flash memory extension storage area,
There is provided to the main control unit；
Accordingly, the flash memory system EBI, is additionally operable to directly carry out the flash configuration register
Read and write access.
4. system according to claim 3, it is characterised in that the flash configuration register is also wrapped
Include：Flash memory keys register and/or flash disk operation register；
The flash memory keys register, for depositing the flash memory system configuration accessed in the flash chip
The key in area；
The flash disk operation register, for the number of the flash memory system configuring area in the flash chip
According to being wiped, write or read.
5. according to any described systems of claim 2-4, it is characterised in that the main control unit includes：
Operation control unit, for controlling the flash memory control unit to be wiped the flash chip, write
Enter or read operation；
Extension storage address comparing unit, the first reading that the system bus for judging to receive sends refers to
Whether order and corresponding address or the first write command for sending and corresponding address are effective.
6. system according to claim 2, it is characterised in that the system also includes：It is static with
Machine memory SRAM, for storing general program data and number of users in the flash chip after the power-up
According to；
The flash controller also includes：SRAM control units, with the flash memory system EBI, institute
Main control unit, the flash memory control unit and the SRAM is stated to connect respectively；
Whether the main control unit, be additionally operable to effective according to the address mapping information and the extension storage area
Whether effectively information, judge the first reading instruction that system bus sends and corresponding address, if so, then controlling
The SRAM control units are read out to the user data stored in the SRAM；It is additionally operable to basis
The address mapping information and the extension storage area whether effective information, judge system bus sends first
Whether write command and corresponding address are effective, if so, then controlling the SRAM control units to described
The user data stored in SRAM is rewritten, or controls the flash memory control unit to the flash memory core
The user data stored in piece is rewritten；
The SRAM control units, for the control according to the main control unit, to institute in the SRAM
The user data of storage is read out.
7. system according to claim 5, it is characterised in that：The flash memory extension storage area includes
At least one flash memory extension storage block；
Accordingly, the extension storage enables register, for automatic from the flash chip after upper electricity
Any one is read in the flash memory system configuring area or whether any number of flash memory extension storage blocks are effectively believed
Breath, and provide to the main control unit.
8. system according to claim 7, it is characterised in that：The extension storage mapping address is posted
Storage, is additionally operable to multiple different and first reading instruction that will be interacted from the flash memory system EBI
Corresponding address or address corresponding with first write command, the flash memory being mapped as in flash chip expand
The identical physical address information of memory block is opened up, as the address mapping information in flash memory extension storage area, there is provided
To the main control unit.
9. system according to claim 1, it is characterised in that：The flash memory extension storage area deposits
Memory space of the storage space less than the flash memory main storage area.
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