CN106933767A - A kind of comma detection and word alignment schemes and system suitable for JESD204B agreements - Google Patents

A kind of comma detection and word alignment schemes and system suitable for JESD204B agreements Download PDF

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Publication number
CN106933767A
CN106933767A CN201710142240.9A CN201710142240A CN106933767A CN 106933767 A CN106933767 A CN 106933767A CN 201710142240 A CN201710142240 A CN 201710142240A CN 106933767 A CN106933767 A CN 106933767A
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data
displacement
comma detection
detection code
register
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CN201710142240.9A
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CN106933767B (en
Inventor
唐枋
李世平
殷鹏
陈卓
叶楷
舒洲
王忠杰
黄莎琳
李明东
夏迎军
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Chongqing paixin Chuangzhi Microelectronics Co., Ltd
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Chongqing Pai Microelectronics Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0002Serial port, e.g. RS232C

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Communication Control (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

The present invention relates to a kind of suitable for the comma detection of JESD204B agreements and word alignment schemes and system, wherein, methods described includes:Cache N data of input respectively using the first register and the second register;N data are taken out from first register, N data of taking-up are carried out into the displacement of preset times, obtain the shift sequence of N after displacement every time;The complete comma detection code is detected in each described shift sequence, to determine the positional information of the comma detection code;After the positional information for detecting the comma detection code, according to state machine generation displacement address;The length of the displacement address is identical with the length of the positional information of the comma detection code;According to the displacement address, 2N data in first register and second register are shifted, to obtain the data of word alignment.The technical scheme that the present invention is provided, disclosure satisfy that the rate requirement of the 12.5Gbps that JESD204B agreements specify.

Description

A kind of comma detection and word alignment schemes and system suitable for JESD204B agreements
Technical field
The invention belongs to HSSI High-Speed Serial Interface chip technology field, it is related to a kind of comma suitable for JESD204B agreements to examine Survey and word alignment schemes and system.
Background technology
Continuous growth with people to data volume demand, the I/O interface technology of Traditional parallel has become data high-speed The bottleneck problem of rate transmission.As the JESD204B interface protocols that data converter and logical device are interconnected at a high speed, compared to tradition CMOS interfaces and LVDS interface, in high speed transmission data, simplify system design in terms of have and have great advantage.JESD204B agreements Substantially it is a kind of standard in serdes technologies, is mainly formulated for the high speed of data converter and logical device is interconnected 's.And in Serdes receiver sections, comma detection (comma detection) module is primarily used to indicate byte boundary, Obtain and checking byte of sync.Usually used comma yards has K28.1 (0011111001 or 1100000110), K28.5 (0011111010 or 1100000101).Usually, the structure of comma detection and word alignment has serial structure and parallel organization.String Row structural circuit is very simple, but also has some shortcomings, such as high-speed case is difficult to meet timing requirements and dynamic power consumption Greatly.Parallel organization is due to being operated in low rate clock zone, it is possible to be easily met the design of high speed serdes It is required that.Comma detection of the prior art and word alignment schemes, if to meet the 12.5Gbps's that JESD204B agreements specify Rate requirement, is detected using the commas of parallel 10 and word alignment module at least will be in 1.25Ghz (12.5G/10) clock rate Under meet timing requirements, it can be seen that if it is difficult to meet rate requirement not to use advanced technique and Full-custom design.
The content of the invention
In view of this, it is an object of the invention to provide a kind of comma detection and word alignment suitable for JESD204B agreements Method and system, disclosure satisfy that the rate requirement of the 12.5Gbps that JESD204B agreements specify.
To reach above-mentioned purpose, the present invention provides following technical scheme:
A kind of comma detection and word alignment schemes suitable for JESD204B agreements, methods described includes:
Cache N data of input respectively using the first register and the second register;Wherein, wrapped in the N data Containing at least one complete comma detection code;
N data are taken out from first register, N data of taking-up the displacement of preset times is carried out into, every time The shift sequence of one N is obtained after displacement;
The complete comma detection code is detected in each described shift sequence, to determine the position of the comma detection code Confidence ceases;
After the positional information for detecting the comma detection code, according to state machine generation displacement address;The displacement ground The length of location is identical with the length of the positional information of the comma detection code;
According to the displacement address, 2N data in first register and second register are moved Position, to obtain the data of word alignment.
Further, the complete comma detection code includes that two string length are identical and opposite polarity K28.5 yards.
Further, the N is 40, and the length of the complete comma detection code is 20, and the preset times are 10 It is secondary.
Further, the displacement that N data of taking-up carry out preset times is included:
In displacement every time, by the N of taking-up for data are shifted to same direction, and every time only to the direction Synchronizing moving a data.
Further, included according to state machine generation displacement address:
Search state will be entered after resets, when the trigger message for receiving is effective, jumps to lock-out state, To lock the displacement address;
When state machine is in the lock state, if receiving the search error signal from receiving terminal, jumps to and search State is sought, to detect the position of the comma detection code.
A kind of comma detection and word alignment suitable for JESD204B agreements, the system include the first register, Second register, displacement comma detection module, state locking module and displacement output module, wherein:
First register and second register, the N data for caching input respectively;Wherein, it is described N At least one complete comma detection code is included in data;
The displacement comma detection module, for taking out N data from first register, the N digits that will be taken out According to the displacement for carrying out preset times, the shift sequence of N is obtained after displacement every time;In each described shift sequence The complete comma detection code is detected, to determine the positional information of the comma detection code;
The state locking module, for after the positional information for detecting the comma detection code, being given birth to according to state machine Into displacement address;The length of the displacement address is identical with the length of the positional information of the comma detection code;
The displacement output module, for according to the displacement address, to first register and second deposit 2N data in device are shifted, to obtain the data of word alignment.
Further, the complete comma detection code includes that two string length are identical and opposite polarity K28.5 yards.
Further, the N is 40, and the length of the complete comma detection code is 20, and the preset times are 10 It is secondary.
Further, the displacement comma detection module is additionally operable in displacement every time, and the N that will be taken out is data to same Individual direction is shifted, and every time only to the direction synchronizing moving a data.
Further, the state locking module is used to that search state will to be entered after resets, when what is received When trigger message is effective, lock-out state is jumped to, to lock the displacement address;When state machine is in the lock state, if The search error signal from receiving terminal is received, then jumps to search state, to detect the position of the comma detection code.
Beneficial effects of the present invention are:
The present invention is examined when comma detection and alignment is carried out in the data of the presence dislocation that first can be cached from register Measure the positional information of comma detection code.May then pass through the positional information and determine corresponding displacement address, Jin Erke Word alignment is carried out with according to the displacement address.Further, the application can carry out comma inspection in 40 parallel data Survey, so the solution of the present invention only need to meet timing requirements under the clock zone of 312.5Mhz (12.5G/40).
Brief description of the drawings
In order that the purpose of the present invention, technical scheme and beneficial effect are clearer, the present invention provides drawings described below and carries out Explanation:
Fig. 1 is the system framework schematic diagram in the present invention;
Fig. 2 is the displacement detection schematic diagram in the present invention;
Fig. 3 is the state locking schematic diagram in the present invention.
Specific embodiment
Below in conjunction with accompanying drawing, the preferred embodiments of the present invention are described in detail.
The application implementation method provides a kind of suitable for the comma detection of JESD204B agreements and word alignment schemes, the side Method includes:
Cache N data of input respectively using the first register and the second register;Wherein, wrapped in the N data Containing at least one complete comma detection code;
N data are taken out from first register, N data of taking-up the displacement of preset times is carried out into, every time The shift sequence of one N is obtained after displacement;
The complete comma detection code is detected in each described shift sequence, to determine the position of the comma detection code Confidence ceases;
After the positional information for detecting the comma detection code, according to state machine generation displacement address;The displacement ground The length of location is identical with the length of the positional information of the comma detection code;
According to the displacement address, 2N data in first register and second register are moved Position, to obtain the data of word alignment.
In the present embodiment, the complete comma detection code includes that two string length are identical and opposite polarity K28.5 yards.
In present embodiment, the N is 40, and the length of the complete comma detection code is 20, the preset times It is 10 times.
In present embodiment, the displacement that N data of taking-up carry out preset times is included:
In displacement every time, by the N of taking-up for data are shifted to same direction, and every time only to the direction Synchronizing moving a data.
In present embodiment, included according to state machine generation displacement address:
Search state will be entered after resets, when the trigger message for receiving is effective, jumps to lock-out state, To lock the displacement address;
When state machine is in the lock state, if receiving the search error signal from receiving terminal, jumps to and search State is sought, to detect the position of the comma detection code.
Fig. 1 is referred to, the application implementation method also provides a kind of suitable for the comma detection of JESD204B agreements and word pair Neat system, the system includes the first register, the second register, displacement comma detection module, state locking module and shifting Position output module, wherein:
First register and second register, the N data for caching input respectively;Wherein, it is described N At least one complete comma detection code is included in data;
The displacement comma detection module, for taking out N data from first register, the N digits that will be taken out According to the displacement for carrying out preset times, the shift sequence of N is obtained after displacement every time;In each described shift sequence The complete comma detection code is detected, to determine the positional information of the comma detection code;
The state locking module, for after the positional information for detecting the comma detection code, being given birth to according to state machine Into displacement address;The length of the displacement address is identical with the length of the positional information of the comma detection code;
The displacement output module, for according to the displacement address, to first register and second deposit 2N data in device are shifted, to obtain the data of word alignment.
In present embodiment, the complete comma detection code includes that two string length are identical and opposite polarity K28.5 yards.
In present embodiment, the N is 40, and the length of the complete comma detection code is 20, the preset times It is 10 times.
In present embodiment, the displacement comma detection module be additionally operable to every time displacement when, will take out N for data to Same direction is shifted, and every time only to the direction synchronizing moving a data.
In present embodiment, the state locking module is used to that search state will to be entered after resets, works as reception When the trigger message for arriving is effective, lock-out state is jumped to, to lock the displacement address;When state machine is in the lock state, If receiving the search error signal from receiving terminal, search state is jumped to, to detect the position of the comma detection code Put.
Specifically, Fig. 1 to Fig. 3 is referred to, input can be cached using two 40 register reg0, reg1 first 40 data data_in [39:0], according to JESD204B protocol requirements, K28.5 yards is sent always in starting stage transmitting terminal (i.e. comma detection codes), thus receiving terminal receive at least exist in 40 data of dislocation 1 it is complete by two continuous poles Property opposite K28.5 composition 20 comma yards (00111110101100000101 or 11000001010011111010).Comma Then detection from reg1 registers as shown in Fig. 2 take out 40 data found by the displacement comma of ten times is detected Comma yards of position, and produce the comma code position information sel [9 of ten:0], example as shown in Figure 1, only need to shift two It is secondary both to have found comma code positions (according to Fig. 2 displacement detections), so the sel [9 for producing:0]=10 ' b0000_0001_00. Fig. 3 is referred to, state locking module is to produce displacement address according to state machine after comma code position signals are detected shiftaddr[9:0], to carry out shifting function to all data in subsequent process, its operation is as follows:Enter after reset SEARCH state, uses intermediate variable sel_tmp [9 in this condition:0] sel [9 is preserved:0] information.When trigger signals have (comma yards is detected during effect), jump to LOCK states, now sel_tmp [9:0] by shiftaddr [9:0] be given.Institute Only to need sel_tmp [9:0] it is assigned to shiftaddr [9:0] can both realize locking sel [9:0].Search error letter in Fig. 1 Number output from receiving terminal JESD204B controllers, shows not detecting comma yards when its is effective, now needs to enter again Row comma is detected, so state machine redirects SEARCH state.Displacement output module is according to shiftaddr [9:0] signal comes right 80 data are shifted, and (80 digits are set to shift_data_reg [79:0]), so that the signal of output word alignment.Such as Fig. 1 institutes The example for showing, the position signalling shiftaddr [9 of comma has been obtained according to Fig. 2, Fig. 3:0]=10 ' b0000_0001_00, Shiftaddr [2]=1 ' b1 represents shift_data_reg [79:0] shift_data_reg [41 is taken out:2] after being alignd 40 data.Similarly, if shiftaddr [9:0]=10 ' b0000_0100_00 is then from shift_data_reg [79:0] take Go out shift_data_reg [43:4] 40 data after being alignd.
Beneficial effects of the present invention are:
The present invention, can be first from register in the data of the presence dislocation of caching when comma detection is carried out and word aligns Detect the positional information of comma detection code.May then pass through the positional information and determine corresponding displacement address, and then Word alignment can be carried out according to the displacement address.Further, the application can carry out comma in 40 parallel data Detection, so the solution of the present invention only need to meet timing requirements under the clock zone of 312.5Mhz (12.5G/40).
Finally illustrate, preferred embodiment above is merely illustrative of the technical solution of the present invention and unrestricted, although logical Cross above preferred embodiment to be described in detail the present invention, it is to be understood by those skilled in the art that can be Various changes are made to it in form and in details, without departing from claims of the present invention limited range.

Claims (10)

1. it is a kind of suitable for the comma detection of JESD204B agreements and word alignment schemes, it is characterised in that methods described includes:
Cache N data of input respectively using the first register and the second register;Wherein, comprising extremely in the N data A few complete comma detection code;
N data are taken out from first register, N data of taking-up are carried out into the displacement of preset times, every time displacement The shift sequence of one N is obtained afterwards;
The complete comma detection code is detected in each described shift sequence, is believed with the position for determining the comma detection code Breath;
After the positional information for detecting the comma detection code, according to state machine generation displacement address;The displacement address Length is identical with the length of the positional information of the comma detection code;
According to the displacement address, 2N data in first register and second register are shifted, with Obtain the data of word alignment.
2. method according to claim 1, it is characterised in that the complete comma detection code includes two string length phases It is same and opposite polarity K28.5 yards.
3. method according to claim 1 and 2, it is characterised in that the N is 40, the complete comma detection code Length is 20, and the preset times are 10 times.
4. method according to claim 1, it is characterised in that N data of taking-up are carried out into the displacement bag of preset times Include:
In displacement every time, by the N of taking-up for data are shifted to same direction, and every time only to the direction synchronization Mobile a data.
5. method according to claim 1, it is characterised in that included according to state machine generation displacement address:
Search state will be entered after resets, when the trigger message for receiving is effective, jump to lock-out state, to lock The fixed displacement address;
When state machine is in the lock state, if receiving the search error signal from receiving terminal, search shape is jumped to State, to detect the position of the comma detection code.
6. a kind of comma detection and word alignment suitable for JESD204B agreements, it is characterised in that the system includes the One register, the second register, displacement comma detection module, state locking module and displacement output module, wherein:
First register and second register, the N data for caching input respectively;Wherein, the N data In include at least one complete comma detection code;
The displacement comma detection module, for taking out N data from first register, N data of taking-up is entered The displacement of row preset times, obtains the shift sequence of N every time after displacement;Detected in each described shift sequence The complete comma detection code, to determine the positional information of the comma detection code;
The state locking module, for after the positional information for detecting the comma detection code, being generated according to state machine and being moved Bit address;The length of the displacement address is identical with the length of the positional information of the comma detection code;
The displacement output module, for according to the displacement address, in first register and second register 2N data shifted, with obtain word alignment data.
7. system according to claim 6, it is characterised in that the complete comma detection code includes two string length phases It is same and opposite polarity K28.5 yards.
8. the system according to claim 6 or 7, it is characterised in that the N is 40, the complete comma detection code Length is 20, and the preset times are 10 times.
9. system according to claim 6, it is characterised in that the displacement comma detection module is additionally operable to shifting every time When, by the N of taking-up for data are shifted to same direction, and every time only to the direction synchronizing moving a data.
10. system according to claim 6, it is characterised in that the state locking module be used for by resets it Enter search state afterwards, when the trigger message for receiving is effective, lock-out state is jumped to, to lock the displacement address;When When state machine is in the lock state, if receiving the search error signal from receiving terminal, search state is jumped to, to examine Survey the position of the comma detection code.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108184038A (en) * 2017-12-19 2018-06-19 重庆湃芯微电子有限公司 A kind of high speed transmission system of the very high speed digital cmos image sensor of internet of things oriented
CN112968753A (en) * 2021-01-29 2021-06-15 深圳市紫光同创电子有限公司 Data boundary alignment method and system for high-speed serial transceiver
CN116015550A (en) * 2022-11-17 2023-04-25 飞腾信息技术有限公司 K code detection circuit, K code detection method and related equipment

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1656821A (en) * 2002-04-19 2005-08-17 微软公司 Methods and systems for preventing start code emulation at locations that include non-byte aligned and/or bit-shifted positions
CN101605012A (en) * 2009-07-02 2009-12-16 中兴通讯股份有限公司南京分公司 A kind of method and device of realizing the frame header of synchronous digital system location
CN102523436A (en) * 2011-11-30 2012-06-27 杭州海康威视数字技术股份有限公司 Transmission terminal, receiving terminal, multi-channel video optical fiber transmission system and multi-channel video optical fiber transmission method
CN102819006A (en) * 2012-08-08 2012-12-12 中国人民解放军信息工程大学 Broadband direction finding control method based on frequency domain correlation interferometer
WO2017012453A1 (en) * 2015-07-23 2017-01-26 华为技术有限公司 Method and device for data transmission

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1656821A (en) * 2002-04-19 2005-08-17 微软公司 Methods and systems for preventing start code emulation at locations that include non-byte aligned and/or bit-shifted positions
CN101605012A (en) * 2009-07-02 2009-12-16 中兴通讯股份有限公司南京分公司 A kind of method and device of realizing the frame header of synchronous digital system location
CN102523436A (en) * 2011-11-30 2012-06-27 杭州海康威视数字技术股份有限公司 Transmission terminal, receiving terminal, multi-channel video optical fiber transmission system and multi-channel video optical fiber transmission method
CN102819006A (en) * 2012-08-08 2012-12-12 中国人民解放军信息工程大学 Broadband direction finding control method based on frequency domain correlation interferometer
WO2017012453A1 (en) * 2015-07-23 2017-01-26 华为技术有限公司 Method and device for data transmission

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108184038A (en) * 2017-12-19 2018-06-19 重庆湃芯微电子有限公司 A kind of high speed transmission system of the very high speed digital cmos image sensor of internet of things oriented
CN112968753A (en) * 2021-01-29 2021-06-15 深圳市紫光同创电子有限公司 Data boundary alignment method and system for high-speed serial transceiver
CN112968753B (en) * 2021-01-29 2022-06-10 深圳市紫光同创电子有限公司 Data boundary alignment method and system for high-speed serial transceiver
CN116015550A (en) * 2022-11-17 2023-04-25 飞腾信息技术有限公司 K code detection circuit, K code detection method and related equipment

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