CN106933586B - System and method for realizing version synchronization of system management controller - Google Patents
System and method for realizing version synchronization of system management controller Download PDFInfo
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- CN106933586B CN106933586B CN201710138592.7A CN201710138592A CN106933586B CN 106933586 B CN106933586 B CN 106933586B CN 201710138592 A CN201710138592 A CN 201710138592A CN 106933586 B CN106933586 B CN 106933586B
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Abstract
The invention relates to a method and a system for realizing version synchronization of system management controllers, which are characterized in that the system management controllers know program version information of the opposite side through serial port communication, when the two are inconsistent, the system management controller with higher version informs the opposite side through a serial port, SMC knows the program version information of the opposite side through the serial port communication, when the two are inconsistent, the SMC with higher version informs the opposite side through the serial port, and burns programs of the SMC into a Flash memory of the opposite side through an SPI bus, so that the versions of the system management controllers of a server are automatically kept consistent, and adverse effects on system functions caused by version disorder are avoided.
Description
Technical Field
The invention belongs to the technical field of server system management, and particularly relates to a system and a method for realizing version synchronization of a system management controller.
Background
The System Management Controller (SMC) is often used in high-end servers, and is used for monitoring and controlling various states of a server system, such as temperature, power consumption, network connection, fan rotating speed and the like, in order to prevent the system management controller from failing to cause the system to work normally, 2 SMC are adopted in the design, and when one SMC fails, the other SMC manages the system. In practical applications, the program version may be updated for one SMC, but not updated for another SMC, which may lead to version confusion and affect system functions. This is a disadvantage of the prior art.
Disclosure of Invention
The present invention is directed to a system and a method for implementing version synchronization of a system management controller, so as to solve the above technical problems.
In order to achieve the purpose, the invention provides the technical scheme that:
a system for realizing version synchronization of system management controllers is characterized by comprising a first system management controller and a second system management controller connected with the first system management controller, wherein the first system management controller and the second system management controller respectively comprise a RST signal interface, an SPI bus interface, a FW SPI bus interface and two GPIO ports, one GPIO port of the first system management controller is connected to a RST signal interface of the second system management controller, and one GPIO port of the second system management controller is connected to the RST signal interface of the first system management controller;
the system also comprises a first Flash memory, a second Flash memory, a first signal selector and a second signal selector;
the first Flash memory is respectively connected to the FW SPI bus interface of the first system management controller and the SPI bus interface of the second system management controller through a first signal selector, and the gating control signal of the first signal selector is from the other GPIO port of the second system management controller;
the second Flash memory is respectively connected to the FW SPI bus interface of the second system management controller and the SPI bus interface of the first system management controller through a second signal selector, and the gating control signal of the second signal selector is from the other GPIO port of the first system management controller.
The first system management controller and the second system management controller are connected with each other through a serial port, and know the program version information of each other through serial port communication.
And when the system management controller is started, a program is loaded from a Flash memory connected with the FW SPI bus, a first Flash memory is connected with the first system management controller under the default condition, and a second Flash memory is connected with the second system management controller.
A method for realizing version synchronization of a system management controller is characterized by comprising the following concrete implementation steps:
step 1: the first system management controller is communicated with the second system management controller through a serial port, and the first system management controller detects that the version of the first system management controller is higher than that of the second system management controller;
step 2: the first system management controller switches and connects the second Flash memory to the first system management controller through a gating control signal;
and step 3: the first system management controller writes a new version program into the second Flash memory through the SPI bus;
and 4, step 4: after the writing is finished, the first system management controller switches and connects the second Flash memory to the second system management controller through a gating control signal;
and 5: the first system management controller uses the RST signal controlled by the GPIO to restart the second system management controller;
step 6: and the second system management controller loads the program from the second Flash memory and finishes the startup again, and the versions of the first system management controller and the second system management controller are kept synchronous.
The system management controller SMC knows the program version information of the opposite side through serial port communication, when the two are not consistent, the SMC with higher version informs the opposite side through the serial port, and burns the program into the Flash memory of the opposite side through the SPI bus, so that the versions are kept synchronous.
The invention has the advantages that the technical scheme provided by the invention can automatically keep the versions of the system management controller of the server consistent, and avoids the adverse effect of version disorder on the system function.
In addition, the invention has reliable design principle, simple structure and very wide application prospect.
Therefore, compared with the prior art, the invention has prominent substantive features and remarkable progress, and the beneficial effects of the implementation are also obvious.
Drawings
Fig. 1 is a functional block diagram of a system for implementing version synchronization of a system management controller.
The system comprises a first system management controller 1, a second system management controller 2, a first signal selector 3, a second signal selector 4, a first Flash memory 5 and a second Flash memory 6.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings by way of specific examples, which are illustrative of the present invention and are not limited to the following embodiments.
As shown in fig. 1, the system for implementing version synchronization of a system management controller provided in this embodiment includes a first system management controller 1 and a second system management controller 2 connected to the first system management controller 1, and each of the system management controllers 1 and 2 includes a RST signal interface, an SPI bus interface, a FW SPI bus interface, and two GPIO ports, one GPIO port of the first system management controller 1 is connected to the RST signal interface of the second system management controller 2, and one GPIO port of the second system management controller 2 is connected to the RST signal interface of the first system management controller 1;
the system also comprises a first Flash memory 5, a second Flash memory 6, a first signal selector 3 and a second signal selector 4;
a first Flash memory 5 is respectively connected to an FW SPI bus interface of the first system management controller 1 and an SPI bus interface of the second system management controller 2 through a first signal selector 3, and a gating control signal of the first signal selector 3 is from the other GPIO port of the second system management controller 2;
the second Flash memory 6 is respectively connected to the FW SPI interface of the second system management controller 2 and the SPI bus interface of the first system management controller 1 through the second signal selector 4, and the strobe control signal of the second signal selector 4 is from the other GPIO port of the first system management controller 1.
The first system management controller 1 and the second system management controller 2 are connected to each other via a serial port, and know the program version information of each other via serial port communication.
And when the system management controller is started, a program is loaded from a Flash memory connected with the FW SPI bus, a first Flash memory is connected with the first system management controller under the default condition, and a second Flash memory is connected with the second system management controller.
In this embodiment, the specific implementation steps include:
step 1: the first system management controller is communicated with the second system management controller through a serial port, and the first system management controller detects that the version of the first system management controller is higher than that of the second system management controller;
step 2: the first system management controller switches and connects the second Flash memory to the first system management controller through a gating control signal;
and step 3: the first system management controller writes a new version program into the second Flash memory through the SPI bus;
and 4, step 4: after the writing is finished, the first system management controller switches and connects the second Flash memory to the second system management controller through a gating control signal;
and 5: the first system management controller uses the RST signal controlled by the GPIO to restart the second system management controller;
step 6: and the second system management controller loads the program from the second Flash memory and finishes the startup again, and the versions of the first system management controller and the second system management controller are kept synchronous.
The system management controllers know the program version information of the opposite side through serial port communication, and when the program version information is inconsistent with the program version information of the opposite side, the system management controller with the higher version informs the opposite side through the serial port.
The terms first, second, third and the like in the description and in the claims, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions.
The above disclosure is only for the preferred embodiments of the present invention, but the present invention is not limited thereto, and any non-inventive changes that can be made by those skilled in the art and several modifications and amendments made without departing from the principle of the present invention shall fall within the protection scope of the present invention.
Claims (7)
1. A system for realizing version synchronization of a system management controller is characterized by comprising a first system management controller and a second system management controller connected with the first system management controller, wherein the first system management controller and the second system management controller respectively comprise a RST signal interface, an SPI bus interface, a FW SPI bus interface and two GPIO ports, one GPIO port of the first system management controller is connected to a RST signal interface of the second system management controller, and one GPIO port of the second system management controller is connected to the RST signal interface of the first system management controller;
the system also comprises a first Flash memory, a second Flash memory, a first signal selector and a second signal selector;
the first Flash memory is respectively connected to the FW SPI bus interface of the first system management controller and the SPI bus interface of the second system management controller through a first signal selector, and the gating control signal of the first signal selector is from the other GPIO port of the second system management controller;
the second Flash memory is respectively connected to the FW SPI bus interface of the second system management controller and the SPI bus interface of the first system management controller through a second signal selector, and the gating control signal of the second signal selector is from the other GPIO port of the first system management controller;
the working process of the system comprises the following steps:
step 1: the first system management controller detects that the version of the first system management controller is higher than that of the second system management controller;
step 2: the first system management controller switches and connects the second Flash memory to the first system management controller through a gating control signal;
and step 3: the first system management controller writes a new version program into the second Flash memory through the SPI bus;
and 4, step 4: after the writing is finished, the first system management controller switches and connects the second Flash memory to the second system management controller through a gating control signal;
and 5: the first system management controller uses the RST signal controlled by the GPIO to restart the second system management controller;
step 6: and the second system management controller loads the program from the second Flash memory and finishes the startup again, and the versions of the first system management controller and the second system management controller are kept synchronous.
2. The system of claim 1, wherein the first system management controller and the second system management controller are connected to each other via a serial port.
3. The system of claim 1, wherein the system management controller loads the program from the FW SPI bus-connected Flash memory at startup.
4. The system of claim 1, wherein a first Flash memory is configured to be connected to the first system management controller and a second Flash memory is configured to be connected to the second system management controller by default.
5. The system for realizing version synchronization of system management controllers as claimed in claim 1, wherein the system management controllers know the version information of the programs of the other party through serial port communication.
6. A method for implementing version synchronization of system management controllers based on the system for implementing version synchronization of system management controllers in claim 1, the method comprising the following steps:
step 1: the first system management controller detects that the version of the first system management controller is higher than that of the second system management controller;
step 2: the first system management controller switches and connects the second Flash memory to the first system management controller through a gating control signal;
and step 3: the first system management controller writes a new version program into the second Flash memory through the SPI bus;
and 4, step 4: after the writing is finished, the first system management controller switches and connects the second Flash memory to the second system management controller through a gating control signal;
and 5: the first system management controller uses the RST signal controlled by the GPIO to restart the second system management controller;
step 6: and the second system management controller loads the program from the second Flash memory and finishes the startup again, and the versions of the first system management controller and the second system management controller are kept synchronous.
7. The method of claim 6, wherein the system management controllers know the program version information of the other party through serial communication, and when the two are not consistent, the system management controller with higher version notifies the other party through the serial.
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Citations (2)
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| US8918778B2 (en) * | 2013-04-17 | 2014-12-23 | American Megatrends, Inc. | Method of fail safe flashing management device and application of the same |
| US8943302B2 (en) * | 2012-08-07 | 2015-01-27 | American Megatrends, Inc. | Method of flashing bios using service processor and computer system using the same |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102035683B (en) * | 2010-12-20 | 2013-05-22 | 新邮通信设备有限公司 | Control method and system for switching of main board and standby board |
| CN103488494A (en) * | 2013-08-12 | 2014-01-01 | 浪潮电子信息产业股份有限公司 | Multi-firmware synchronous updating and upgrading method for blade server |
| CN103473152B (en) * | 2013-09-25 | 2017-03-01 | 郑州云海信息技术有限公司 | A kind of active and standby management module backup of blade server and update method |
| CN105700970A (en) * | 2014-11-25 | 2016-06-22 | 英业达科技有限公司 | Server system |
| CN105700969B (en) * | 2014-11-25 | 2018-11-30 | 英业达科技有限公司 | server system |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8943302B2 (en) * | 2012-08-07 | 2015-01-27 | American Megatrends, Inc. | Method of flashing bios using service processor and computer system using the same |
| US8918778B2 (en) * | 2013-04-17 | 2014-12-23 | American Megatrends, Inc. | Method of fail safe flashing management device and application of the same |
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Effective date of registration: 20201109 Address after: 215100 No. 1 Guanpu Road, Guoxiang Street, Wuzhong Economic Development Zone, Suzhou City, Jiangsu Province Applicant after: SUZHOU LANGCHAO INTELLIGENT TECHNOLOGY Co.,Ltd. Address before: 450000 Henan province Zheng Dong New District of Zhengzhou City Xinyi Road No. 278 16 floor room 1601 Applicant before: ZHENGZHOU YUNHAI INFORMATION TECHNOLOGY Co.,Ltd. |
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