CN106919210A - A kind of particular power source scheme of attribute - Google Patents
A kind of particular power source scheme of attribute Download PDFInfo
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- CN106919210A CN106919210A CN201510988514.7A CN201510988514A CN106919210A CN 106919210 A CN106919210 A CN 106919210A CN 201510988514 A CN201510988514 A CN 201510988514A CN 106919210 A CN106919210 A CN 106919210A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
Abstract
A kind of particular power source scheme of attribute, belongs to electronic technology field, voltage regulation unit；OR gate input block；Accessory power supply；Time quantum；Logic unit；Power amplifier unit is constituted, the input connection system power supply of voltage regulation unit, the power end of the integrated circuit of the output connection gate circuit of voltage regulation unit, the output end of OR gate input block connects the first input end of Auxiliary Power Units, the output connection two-way of Auxiliary Power Units, the power end of time quantum Counter is connect all the way, second tunnel connects the input of the differential circuit of counter, the clear terminal of the output end flip-flop number of differential circuit, one output end of counter triggers the first input end of logic unit, the output of logic unit connects power amplifier unit, the output of power amplifier unit connects load decoding integrated circuit, the present invention is with the input of multi-channel control end, supported the use with polylith decoding integrated circuit, prevent once to decode the theoretical probability of output, greatly increase the possibility for cracking.
Description
Technical field
Belong to electronic technology field.
Background technology
The present invention be for this enterprise achievement in a kind of Important Circuit, the circuit also has extensive purposes in electronic circuit.The present invention is the particular power source of proposition integrated circuit composition.
For example, in telecontrol engineering.Level of confidentiality is improved, is one critically important key point of researcher.Present advanced code is rolling code, is characterized in that address code is extremely more, and code is in conversion, so being cracked than fixed code difficult much more difficult.If, by all of rule battery has fired of rolling code, the required time cracked takes more than thousand only to manage theoretically analysis, but said there are still the probability for cracking if being soundd out by random rule and being transmitted in theory.Its reason still belongs to integrated the possessed decoded signal premise of signal decoding when being and cracking signal that people launched, simply in numerous codes, and probability is very low.Therefore thoroughly to prevent the rate that cracks in theory, exactly make to crack the signal rule that people is launched, not constitute the premise for receiving decoding integrated circuit decoding.
Therefore the imagination of this enterprise is that from traditional a piece of decoding integrated circuit is changed into a new decoding unit, the decoding output of this new unit, multi-code signal more than necessarily secondary, if a signal routinely is soundd out, because not constituting the premise of decoding, just accomplish that it is zero to crack probability in theory.By this thinking, reach above-mentioned purpose, deblocked integrated circuit it is necessary to have polylith in this new unit, and carry out such working procedure, correspond to one piece of encoded signal in one piece of transmitting with each piece of decoding integrated circuit in new unit, correspondence decoding, is then synthesized the output signal of all of decoding integrated circuit, the synthesized signal just newly last output of unit.Followed by, the automatic decoded signal received to last time of all decoding integrated circuits is eliminated, that is, reset, to receive the signal of decoding next time.Therefore the decoding integrated circuit in this new unit is it is necessary to have following some performance：One is that can automatically eliminate last time decoded output signal, and two is should possess the time that all decoding integrated circuits synthesize last signal before automatic elimination last time decoded signal, and three is that decoding integrated circuit should have sensitivity higher.
But current decoder IC products do not meet the requirement wanted needed for this new unit, the performance of current decoding integrated circuit has two classes, and a class is non-locking-typed, and a class is locked out type.
Though non-locking type decoding integrated circuit can realize automatic clear, but shortcoming one is locking-typed relative low remolding sensitivity, mainly be embodied in apart from it is remote when, be also both that locking-typed integrated circuit can receive signal in larger distance, but non-locking type but can not receive signal.Two is that the time for resetting is too short, it is impossible to meet the time of signal synthesis.Three is that the length for resetting action time cannot be adjusted, and cannot more meet the synthesis when code is more multiple.
Although locking-typed decoding integrated circuit sensitivity is high, and meets the time of composite signal, serious situation is can not to realize automatic clear.
It is achieved that a piece of decoding integrated circuit is changed into an imagination for new decoding unit, can only be formed with the locking-typed decoding integrated circuit of existing product is supporting with a kind of special power supply, its purpose makes locking-typed decoding integrated circuit ensure due advantage, and makes up the defect that can not be reset.The method for making up is, after the synthesis of signal is completed, breaks the power supply of decoding integrated circuit, allows its original memory to disappear, and resets.This supporting power supply is the present invention, and it is not general common power, and must have following characteristic：
1st, three kinds of programs must be completed afterwards before activation：Power supply was provided to load before this, was then to close, then be and open-minded.
2nd, there must be three time constants.Its meaning is that very first time constant is infinitely great, with adapt to receive first piece decoding it is integrated the need for, second time constant is used to meet the need for the decoding of synthesis first is integrated into other all decoding integrated circuit signals, 3rd time constant is after composite signal is finished, to meet all decoding integrated circuits and eliminate the time needs that memory is clearing.And latter two time constant should facilitate adjustable.
3rd, the voltage for opening power supply meets the need for load is decoding integrated circuit, is closing voltage necessary to power supply should meet elimination memory, is preferably zero.
4th, power supply open with closing, and close should be very of short duration with the transit time opened, i.e., should have good switching characteristic, in theory the time of Push And Release contain number into square-wave-shaped, so just improper encoded signal for receiving solution transmitting by mistake.
5th, this power supply answers power saving, and itself does not consume electric current substantially.
So currently without the off-the-shelf for meeting so requirement, if to be designed being also filled with difficult point, it is necessary to comprehensively innovated.
The content of the invention
The purpose of the present invention one is, design a kind of particular power source scheme of attribute, there is the program multi-channel control end to be input into, can be supported the use with polylith decoding integrated circuit and constitute a kind of new unit, the new unit just has last decoding to export after having to receive multiple encoded signal in decoding after implementing, so as to prevent once to decode the theoretical probability of output, the possibility for cracking is greatly increased, it is supporting so as to be fruitful with this enterprise.Simultaneously present invention may also apply to other exploitations and application of electronic circuit.Three is after this circuit is made up of gate circuit, with serial bright spot.
The measure of this programme is：
1st, a kind of particular power source scheme of attribute is by voltage regulation unit；OR gate input block；Accessory power supply；Time quantum；Logic unit；Power amplifier unit is collectively constituted.
Wherein：Voltage regulation unit is a mu balanced circuit.
OR gate input block is that an input is the OR circuit of multidigit.
The circuit that Auxiliary Power Units are connected with each other by the head and the tail that two gate circuits are constituted, the input of wherein first door is the first input end of Auxiliary Power Units, the input of second door has two inputs, one is first output end of door, another one is the second input of logic unit, and the output end of second door is the output end of Auxiliary Power Units.
The circuit that time quantum is made up of counter and peripheral element.
Logic unit is the circuit being in series by two not circuits, wherein the output end of first not gate is connected to second input of not gate, the output end of second not gate is connected to first input of not gate；The input of wherein first door is the first input end of logic unit, and the input of second door is the second input of logic unit, and the output end of second door is the output end of logic unit.
Power amplifier unit is formed in parallel by multiple doors, and the input of parallel gate is the input of power amplifier unit, and output end in parallel is the output end of power amplifier unit, is also last output end of the invention.
Its mutual connected mode of each unit is, system power supply is connected to the input of voltage regulation unit, the output end of voltage regulation unit is connected to the power end of integrated circuit in the present invention, the multidigit control output end of prime voltage input is connected to the multidigit input of OR circuit, the output end of OR gate is connected to the first input end of Auxiliary Power Units, the output end of Auxiliary Power Units is connected to two-way, and the first via is connected to the power end of time quantum Counter.The output of second tunnel is connected to an input for the differential circuit of time quantum Counter, and the output end of differential circuit triggers the clear terminal of counter.An output end in counter triggers the first input end of logic unit.
Decoding circuit is constituted with output end before an output end in the counter in time quantum and counter, its decoding circuit has two-way to export, and the first via triggers the second input in logic unit.Second tunnel triggers the input of Auxiliary Power Units second.
The input of power amplifier composite door is connected to the output end of logic unit, the output end of power amplifier composite door is output end of the invention.
2, a kind of a kind of connected mode of the particular power source scheme of attribute is, voltage regulation unit is by three end integrated circuits and ground connection branch road, inclined resistance is collectively constituted on three ends, the mode of connection is that the input of three end integrated circuits is connected on the power end of system, the output end of three end integrated circuits is connected on the electric power incoming line termination of all integrated circuits, the earth terminal connection of three end integrated circuits is grounded branch road to ground, the circuit that ground connection branch road is made up of resistance and Diode series, ground connection branch road is connected on the earth terminal of three end integrated circuits by one end of diode cathode, ground connection branch road is connected on ground wire by one end of diode cathode.It is connected between the output end of three end integrated circuits and earth terminal with one end that resistance is inclined resistance on three ends, OR gate input block is made up of several diodes, the negative pole of several diodes links together, output end as OR gate, the positive cascade of diode connects the output that level is voltage input, the output end of OR gate is connected to first input of Auxiliary Power Units, Auxiliary Power Units have been connected respectively after a resistance by two output ends of door, then the circuit that a head and the tail are connected with each other mutually is constituted, the input of wherein accessory power supply first is the first input end of Auxiliary Power Units, the input of second door is the second input of Auxiliary Power Units, the output end that accessory power supply is second is the output end of Auxiliary Power Units.The output end of Auxiliary Power Units is connected to two-way, and the first via is connected to the power end of the counter in time quantum.The output of second tunnel is connected to a positive pole for differential circuit, the negative pole of differential capacitance is two-way, the diode for wherein connecting all the way is the positive pole of isolating diode, the negative pole of isolating diode, it is connected to the clear terminal of counter, second tunnel is to be connected to discharge diode to ground wire, and time quantum is collectively constituted by the circuit that counter and peripheral element are constituted：N output end of counter is connected to two-way,The wherein first via has been connected a diode i.e. positive pole of the first isolating diode,The negative pole of the first isolating diode is connected to the first input end in logic unit,A second road resistance of having connected decodes one end of resistance,The other end for decoding resistance is connected to the positive pole that a diode decodes diode,The negative pole for decoding diode is connected in the anteposition output end of N output end of counter,The positive pole for decoding diode is the output of decoding circuit,The output of decoding circuit is connected to two-way,The input that the 3rd isolating diode connects accessory power supply second is connected through all the way,Another road connects the input of logic first by the second isolating diode,Logic unit is that two output ends of door have been connected after a resistance respectively,Then the circuit that a head and the tail are connected with each other mutually is constituted,The input of wherein logic first is the first input end of logic unit,The input of second door is the second input of logic unit,The output end that logic is second is the output end of logic unit,The output end of one three end integrated circuits of termination of logic initial differential capacitance,The other end of logic initial differential capacitance is two-way,Initial discharge diode to ground wire is connect all the way,Another road connects initial isolating diode to the input of logic first.
The meaning of above measure is explained further as follows：
First, as described in technical background, because the purpose of the present invention is, after supporting with polylith decoding, as with the function of just having output after repeatedly decoding, so the meaning of multiple programs of the invention is, the first program is that have power supply to all decoding integrated circuits in new unit to keep receiving the signal decoding that transmitting comes under normal conditions.Second program is after first piece of decoding integrated circuit receives signal, start the time delay of very first time constant, one purpose is to ensure that all of decoding integrated circuit can receive signal in time delay, there is the time to be synthesized secondly purpose is the output signal for ensureing all decoding integrated circuits, because the method for synthesizing is a lot, some time is slightly longer, but better performance can be produced, some synthesis do not need the time, but performance is more weaker, but the circuit of the time delay of present invention design very first time constant is directed to various situations and is all considered, there is wide applicability.3rd program is, after after the decoded signal synthesis of all integrated circuits, to close power supply, allows all decoding integrated circuits to eliminate memory i.e. implementation and resets, and the purpose of the second time constant is set with here is, this time be able to can reset to all types of decoding integrated circuits.4th program is, after the closing of the second time constant respectively decodes and reset finish completely, is then turned on power supply, allows all decoding integrated circuits to prepare the reception and decoding of next signals, so all measures of the invention are serviced for above-mentioned purpose.
2nd, the operation principle of multiple programs is formed.
Its principle assumes that load for polylith decoding integrated circuit, so connection mode of the invention is, with the power end for exporting and being connected to polylith decoding integrated circuit of the invention, the input of voltage regulation unit of the invention is connected to power supply, the diode cathode that every piece of other point of output end of decoding integrated circuit is connected in OR circuit of the invention.So the output end of polylith decoding integrated circuit（Such as 2.1,2.2,2.3,2.4 in Fig. 2）Become the voltage input started in the present invention again.Its output unit is formed in parallel by door, and the door after parallel connection has relatively high power, and because load is decoding integrated circuit, this integrated circuit power consumptive province can be competent at, and power amplifier composition door can be made up of with apparent load more doors or expander.
During energization, with the line description of Fig. 2, three end integrated voltage-stabilized out-put supplies, by initial differential capacitance（5.11 in Fig. 2）；Initial discharge diode（5.12 in Fig. 2）, 5.13, initial isolating diode（5.13 in Fig. 2）Effect, also because logic isolation resistance（5.2 in Fig. 2）Effect, so logic unit logic first（5.1 in Fig. 2）Input is a high position, so power amplifier composite door（6.2 in Fig. 2）Output end is a high position, and electric current is provided to load decoding integrated circuit.
When one of multiple voltage inputs have input signal, accessory power supply first（3.1 in Fig. 2）Input is have high signal, so accessory power supply second（3.2 in Fig. 2）Output end there is high signal to export, it is to provide power supply to counter to produce two kinds of effects one, allows counter works.Two is to allow counter O reset.By after certain hour, N output end of counter integrated circuit（4.8 in Fig. 2）There is output, make logic second（5.3 in Fig. 2）Input is height, low so as to cause power amplifier composite door to be output as, thus can not provide power supply to load.By after another fixing time, by the decoding circuit of counter（Collectively constituted with decoding diode by decoding resistance in Fig. 2, principle is described below）, high signal is exported, two kinds of effects are produced, one is to cause to make logic first（5.1 in Fig. 2）Input is a high position, so that logic second（5.3 in Fig. 2）Output end is again a high position, recovers to provide power supply to load, while accessory power supply second（3.2 in Fig. 2）It is a high position to be input into, and output end is low level, and counter is stopped.So the present invention realizes three kinds of working procedures.
Here it should be noted that 3.4 Diode series branch road in Fig. 2 is the isolating diode of name the 3rd, that is, buffer action has been played, door has been played again.Second isolating diode（4.92 in Fig. 2）Diode also play isolation and door double action, but due to the threshold value of the threshold value higher than the 3rd isolating diode of the 3rd isolating diode, so when counter decoding circuit has output, must be that logic unit two is first acted, acted followed by accessory power supply door, counter dead electricity, so ensure that the logically true of overall circuit.
3rd, the meaning and feature of first and second time constant unit.
Because the meaning of very first time constant is that the time is infinity to first piece of decoding integrated time for receiving signal under normality, and extends to all decoding integrated circuits and receive signal for this.Second time constant since first piece of decoding is integrated receive signal all receive signal jointly to other decoding integrated circuits, and the synthesis of each decoded signal time, because the method for synthesizing is a lot, the time is long the need for having, but effect is good.It is short the time required to some methods, but effect relative mistake, so the second time is critically important, but also be able to must be adjusted flexibly.The numerical value of the second time constant of the invention is also that counter has electricity to start working until counter has the high-order this period for exporting to N output end.Its reason is when counter works, when N output end is without high position output, so logic two is maintained the statusquo, power amplifier composite door is a high position, when by after certain hour, N output end has high-order output, gate overturns, and power amplifier composite door is low level, does not provide power supply to load.
Its feature one is that the time constant adjustable point is more, so be easy to the desirable value being tuned into, its reason one is adjustable using the front and rear output end of N, counter, and its reason two is usable frequency electric capacity（4.4 in Fig. 2）Flexibly adjustable, its reason three is frequency resistance（4.5 in Fig. 2）It is flexibly adjustable.
, when meter accessory power supply starts to provide power supply to counter every time, the clear terminal to counter is reset for its feature two, so as to ensure that counter works are in resetting shape, hereby it is ensured that the output of counter is definite value.Clear circuit is by differential capacitance（4.1 in Fig. 2）, discharge diode（4.11 in Fig. 2）, clear terminal isolating diode（4.2 in Fig. 2）, differential resistance（4.3 in Fig. 2）Collectively constitute.One for should illustrating is, zeropoint resistance（4.3 in Fig. 2）There is double function, one is, when clear terminal no-voltage, because there is the presence of the resistance, to make the end i.e. clear terminal（4.31 in Fig. 2）Become low level, so that counter normal work, when there is a high position, makes the end i.e. clear terminal become a high position, so that counter is in cleared condition.Two is the discharge diode when by the conventional differential circuit of textbook（4.11 in Fig. 2）Differential resistance is should be, but the function of differential resistance can be turned into because of zeropoint resistance, in addition clear terminal isolating diode（4.2 in Fig. 2）Presence, carried out by be designed as discharge diode after, greatly improve the speed that differential capacitance electric discharge recovers because discharge diode internal resistance is minimum, far smaller than resistance, the discharge loop of electric capacity now is by accessory power supply two from the positive pole of differential capacitance（3.2 in Fig. 2）Output end（It is low level during electric discharge）To ground, then by discharge diode（4.11 in Fig. 2）Return to the negative pole of electric capacity.
Its feature three is if delay capacitor as shown in figure 3, the leakage coefficient of electric capacity can be reduced further, improves time normal performance using the electrodeless electric capacity of capacitances in series composition.
4th, the 3rd time constant explanation.
The time of the 3rd time constant is to load decoding integrated circuit to eliminate minimum time of the memory i.e. needed for clearing, is both that can guarantee that the reliable of decoding integrated circuit eliminates the minimum time that memory resets.Because the performance of each adhesive integrated circuit has difference.Required Time Inconsistency, so this time is critically important, and needs can be adjusted flexibly.It is exactly that the time that decoding is exported is played in N output of counter this time that the second time constant is exactly in the present invention.Its reason is that the gate upset when having output for N of counter causes power amplifier composite door to be low level, not outside out-put supply, and when decoding circuit has height output, again lead to gate upset, then cause power amplifier composite door to revert to a high position, be provided out power supply.
Decoding circuit route decoding resistance（4.9 in Fig. 2）With decoding diode（4.91 in Fig. 2）Collectively constitute.The principle of formation is, by the rule of the output of counter, after N, counter is output as a high position, when decoding diode（4.91 in Fig. 2）One end for being connected of negative pole, be also continually changing in ceaselessly high-order low level, if it is low when, the positive pole for decoding diode is clamped, and can only export 0.4 volt, when the output end that negative pole is connect is for a high position, decoding diode is output as a high position, and high-lying well is exported by decoding resistance.So the method one of the second time constant of regulation is, the negative pole for decoding diode can be connected on first or second or other positions to select, two be can also regulating frequency electric capacity (4.4 in Fig. 2), or the numerical value of frequency resistance (4.5 in Fig. 2) solves.
To reduce the electric leakage of electric capacity, measure of the invention is to become for two frequency electric capacity by one, as shown in 4.4 in Fig. 3 and 4.41, can greatly promote capacitive property, so that vibration is more stable.
5th, the meaning and feature of voltage-stabilized power supply.
The part is the source of all working power supply, and some integrated circuit requirements are high,（The magnitude of voltage of the decoding integrated circuit for example having requires very accurate）So there is specific requirement to power supply, and this unit one is that to employ three ends integrated, so this is the first feature excellent performance, second feature can be to be adjusted according in formation, the circuit for being formed is the diode of the series connection shown in 1.3 in Fig. 2, because a diode is 0.7 volt, the number of diode can be determined according to required adjustment voltage, the debugging of this method is simple precisely, is easy to production.3rd feature is that, with ditty, the circuit is formed with 1.4 i.e. voltage stabilizing ditty by Fig. 2 1.2 with partial pressure partially in voltage stabilizing.Using partial shape on voltage stabilizing ditty and voltage stabilizing into partial pressure, less than 0.7 volt of voltage can be adjusted.Due to above-mentioned, the adaptive surface of this measure is wide, goes for the load of demand difference voltage.
6th, the cooperation feature explanation of power amplifier unit and front and back stages.
Power amplifier unit has played dual-use function, and one is power amplifier effect, for successive load provides power.Two is to become a kind of excellent interface effect in front and back stages, and this structure has good Following effect to prime not gate, two be multi-door parallel connection than simple gate output power, three is this door identical with prime not gate model, is easy to produce, and circuit is simplified.
The present invention has the advantages that following prominent after implementing：
1st, when it and polylith decoding integrated circuit coordinate, a kind of new reception decoding unit can be produced, and this new decoding unit has the characteristics that：
（1）, when the decoding integrated circuit in new reception decoding unit is common fixed code,（Such as 2272）Its cryptographic levels will be greatly promoted, contain more than two pieces of decoding integrated circuit due to this unit, so the digital value of code will and greatly be improved, it is important that the output for decoding is become into encoded signal more than twice, so by now traditional signal of decoding, can not possibly crack, the possibility for cracking will be prevented in theory.During due to common fixed code,（Such as 2272）Have a cheap advantage, and it is supporting with the present invention after with High Security Level the characteristics of, so meaning is big.
（2）, the present invention can also be supporting with signal decoding integrated circuit, such effect, i.e., the institute with signal decoding piece is advantageous, and the characteristics of with decoding more than secondary, so forming a kind of superpower decoding unit, criminal is difficult to crack with any method.
（3）, in this measure because employing OR gate input block, it is possible to realize two pieces of decoding sets in groups into secondary reception, it is also possible to realize three decoding sets in groups into three receptions, and more reception space.Become a kind of important research direction for improving level of confidentiality, this important research direction, the direction with rolling code code class forms two important two aspects, although rolling code code is more and converts, but deficiency is that have the probability for cracking in theory, and this deficiency can exactly be made up by this measure.
2nd, with the performance that multiple spot is excellent.
（1）, this measure and receive the combination of achievement and have the advantages that series is prominent, one is that decoding is integrated with receiving sensitivity very high, is that, when carrier signal is weaker, can solve signal.This is difficult to other methods.Two can be integrated with the decoding of any integrated circuit supporting.Three is circuit reliability, and trigger sensitivity is high, and decoding is integrated with output, can reliably trigger.
（2）, the second time constant can adjust very wide, and stable performance because this is using the distinctive advantage of counter time delay, making the time with capacitance-resistance at this 2 points can not possibly often accomplish.
(3), voltage adaptation face is more wide, and its reason integrated circuit of the invention has selected CMS classes, and the voltage of the adhesive integrated circuit is 3---18 volts, so voltage-stabilized power supply may be adjusted to 3---18 volts, so the adaptive surface to loading is wide.
（4）, can easily adjust second and the 3rd time constant, can be adjusted using the front and back end of output end, it is also possible to adjust frequency electric capacity with the numerical value of frequency resistance to realize.
（5）, voltage-stabilized power supply voltage it is flexibly adjustable, with big tune, middle tune, three kinds of modes of ditty, so be adapted to all kinds of decoding integrated circuit voltages, thus all types of decoding integrated circuits of adaptive load.
（6）, switching characteristic it is good.Not only through and off reliability.It is important that the transit time for opening through and off pass is short.Its reason is logic unit, employ feedback circuit, the output end of counter also has excellent performance, thus the change of switch is precipitous, and its benefit is, when the process of multi-code is received, time is most valuable, and switching characteristic can avoid rapidly the loss of signal, while when disconnecting during power supply, power amplifier combination gate output terminal is low level, the need for fully meeting elimination memory.
（7）, the present invention be provided without relay, so itself is power-saving, be very suitable for electronic circuit.
3rd, circuit is simple, easy to adjust, it is easy to produce in batches.
4th, it is suitable for the application in other vast radiotechnics circuits.
Brief description of the drawings
Fig. 1 is a kind of particular power source scheme block diagram of attribute.
In figure：1st, voltage regulation unit；2nd, OR gate input block；3rd, accessory power supply；4th, time quantum；5th, logic unit；6th, power amplifier unit；7th, the load decoding integrated circuit of institute's band；9th, the integrated circuit of gate circuit；9.1st, the power supply termination of the integrated circuit of gate circuit.
Fig. 2 is a kind of particular power source scheme part drawing of attribute.
In figure：1.1st, three end integrated circuit；1.4th, in voltage stabilizing partially；Adjusted in 1.3 voltage stabilizings；1.2nd, voltage stabilizing ditty；2.1st, an input of OR gate input block；2.2nd, the second input of OR gate input block；2.3rd, the 3rd input of OR gate input block；2.4th, the 4th input of OR gate input block；3.1st, accessory power supply first；3.2nd, accessory power supply second；3.3rd, accessory power supply isolation resistance；3.4th, the 3rd isolating diode；4.1st, differential capacitance；4.11st, discharge diode；4.2nd, clear terminal isolating diode；4.3rd, zeropoint resistance；4.31st, counter O reset end；4.4th, frequency electric capacity；4.5th, frequency resistance；4.6th, protective resistance；4.7th, counter integrated circuit；4.8th, N output end of counter integrated circuit；4.81st, the first isolating diode；4.9th, resistance is decoded；4.91st, diode is decoded；4.92nd, the second isolating diode；5.1st, logic first；5.11st, initial differential capacitance；5.12nd, initial discharge diode, 5.13, initial isolating diode；5.2nd, logic isolation resistance；5.3rd, logic second；6.2nd, power amplifier composite door；7th, the load decoding integrated circuit of institute's band；9th, the integrated circuit of gate circuit；9.1st, the power supply termination of the integrated circuit of gate circuit.
Fig. 3 is the electrodeless electric capacity of frequency adjustment and decodes single-row figure.
In figure；3.1st, accessory power supply first；3.2nd, accessory power supply second；3.3rd, accessory power supply isolation resistance；4.1st, differential capacitance；4.11st, discharge diode；4.2nd, clear terminal isolating diode；4.3rd, zeropoint resistance；4.4th, frequency electric capacity；4.41st, newly-increased frequency electric capacity two；4.5th, frequency resistance；4.6th, protective resistance；4.7th, counter integrated circuit；4.71st, counter ic power input；4.72nd, first output of counter integrated circuit；4.73rd, counter integrated circuit second output；4.8th, N output end of counter integrated circuit；4.9th, resistance is decoded；4.91st, diode is decoded.
Specific embodiment
Fig. 1,2,3 describe a kind of example that a kind of transient state formula closes circuit jointly.It is assumed herein that the present invention only has two pieces of decoding integrated circuits.
First, option：OR gate input block, from diode composition；Gate circuit selects 4069；Counter selects 4060；Three end integrated stable voltage circuits are from 78 series；All diodes select face bonded type diode, and, from the small species of leakage coefficient, resistor is without particular/special requirement for electric capacity.
2nd, weld.
Mode such as Fig. 1 and Fig. 2 or Fig. 3 is welded.In this embodiment, only with two pieces of decoding integrated circuits.
3rd, detection and adjustment.
Two pieces the one of decoding integrated circuit is exported on wherein two positive poles of diode being connected in the OR gate being constituted by a diode.
1st, three kinds of logics of program are checked.
The output tested with the black meter pen ground wire of universal meter, red test pencil, in not actuated coded excitation, power amplifier composite door（6.2 in Fig. 2）It is a high position.
After coded excitation is started, power amplifier composite door（6.2 in Fig. 2）, be a high position.It is changed into low level after certain hour, after low level is certain hour.It is again followed by a high position.
If be powered when power amplifier composite door if be zero, then be initial differential capacitance,（5.11 in Fig. 2）Initial discharge diode（5.12 in Fig. 2）, initial isolating diode sealing-off or weldering are wrong.
It is the first isolating diode if be not zero after power amplifier combination gate delay（4.81 in Fig. 2）Weldering mistake or sealing-off.
If being zero after power amplifier combination gate delay, but it is no longer a high position, then is the second isolating diode（4.92 in Fig. 2）Weldering mistake or sealing-off.
2nd, output voltage is adjusted.
Power amplifier composite door is connect with voltmeter red test pencil to export, black meter pen ground connection.
The fundamental voltage of three end integrated stable voltage circuits is determined first.Voltage stabilizing is set to be output as required magnitude of voltage, if the integrated output in three ends meets load request,（Now as circuit of three-terminal voltage-stabilizing integrated is output as 5 volts, load decoding integrated circuit also only needs to 5 volts）.Then cancel tune and ditty in voltage stabilizing.Specific method is not weld in voltage stabilizing partially（In Fig. 2,1.4）, and directly by the earth terminal shorted to earth of three end integrated circuits.
If undesirable, on the basis of three end integrated stable voltage circuits, adjusted in adjustment voltage stabilizing（1.3 in Fig. 2）With voltage stabilizing ditty（1.2 in Fig. 2）, method is that the diode every of middle tune is 0.7 volt, increases then 0.7 volt of an output voltage increase, and bigger the exported voltage of resistance value of voltage stabilizing ditty is higher, otherwise lower, and less than 0.7 volt of voltage can be adjusted with voltage stabilizing ditty.
9.5 volts of needs are such as loaded, is then determined voltage stabilizing first and is adjusted to 7808 greatly, be output as 8 volts, then two diodes are adjusted in voltage stabilizing（Voltage is 1.4 volts）, voltage stabilizing ditty is approximately adjusted to 0.1 volt or so.
3rd, adjustment time constant.
The constant is mainly the generated time of all decoding integrated circuit output signals, widely different because the method for synthesizing is a lot, so needing debugging.
（1）, the second time constant of adjustment be the delay time for adjusting power amplifier composite door when being zero.
A, the output that power amplifier composite door is connect with voltmeter positive pole, negative pole ground connection.It is powered, and allows the OR gate to have input, the time for not determining that power amplifier composite door is zero with stopwatch now, if the time is too short, method one is to move N output end of counter integrated circuit（4.8 in Fig. 2）Position.To rear class movement, then the time is elongated, otherwise to shorten.Method two, adjusts frequency electric capacity（4.4 in Fig. 2）Or frequency resistance（4.5 in Fig. 2）Numerical value, its rule is to be worth bigger, and the time is more long, otherwise shorter.
（2）, adjustment the 3rd time constant.
The constant is mainly the time for determining that decoding integrated circuit is eliminated needed for memory resets, and the time is too short, and it is unreliable that some integrated circuits reset, the reception of long influence next time.
The method one of debugging is to adjust frequency electric capacity（4.4 in Fig. 2）Or frequency resistance（4.5 in Fig. 2）Numerical value, its rule is to be worth bigger, and the time is more long, otherwise shorter；Method two is the position of adjustment decoding diode cathode linkage counter output end, and to reach, then the time is shorter, otherwise more long.
Claims (2)
1. the particular power source scheme of a kind of attribute, it is characterized in that：By voltage regulation unit；OR gate input block；Accessory power supply；Time quantum；Logic unit；Power amplifier unit is collectively constituted；
Wherein：Voltage regulation unit is a mu balanced circuit；
OR gate input block is that an input is the OR circuit of multidigit；
The circuit that Auxiliary Power Units are connected with each other by the head and the tail that two gate circuits are constituted, the input of wherein first door is the first input end of Auxiliary Power Units, the input of second door has two inputs, one is first output end of door, another one is the second input of logic unit, and the output end of second door is the output end of Auxiliary Power Units；
The circuit that time quantum is made up of counter and peripheral element；
Logic unit is the circuit being in series by two not circuits, wherein the output end of first not gate is connected to second input of not gate, the output end of second not gate is connected to first input of not gate；The input of wherein first door is the first input end of logic unit, and the input of second door is the second input of logic unit, and the output end of second door is the output end of logic unit；
Power amplifier unit is formed in parallel by multiple doors, and the input of parallel gate is the input of power amplifier unit, and output end in parallel is the output end of power amplifier unit, is also last output end of the invention；
Its mutual connected mode of each unit is, system power supply is connected to the input of voltage regulation unit, the output end of voltage regulation unit is connected to the power end of integrated circuit in the present invention, the multidigit control output end of prime voltage input is connected to the multidigit input of OR circuit, the output end of OR gate is connected to the first input end of Auxiliary Power Units, the output end of Auxiliary Power Units is connected to two-way, and the first via is connected to the power end of time quantum Counter；The output of second tunnel is connected to an input for the differential circuit of time quantum Counter, and the output end of differential circuit triggers the clear terminal of counter；An output end in counter triggers the first input end of logic unit；
Decoding circuit is constituted with output end before an output end in the counter in time quantum and counter, its decoding circuit has two-way to export, and the first via triggers the second input in logic unit；Second tunnel triggers the input of Auxiliary Power Units second；
The input of power amplifier composite door is connected to the output end of logic unit, the output end of power amplifier composite door is output end of the invention.
2. the particular power source scheme of a kind of attribute according to claim 1, it is characterized in that：A kind of a kind of connected mode of the particular power source scheme of attribute is, voltage regulation unit is by three end integrated circuits and ground connection branch road, inclined resistance is collectively constituted on three ends, the mode of connection is that the input of three end integrated circuits is connected on the power end of system, the output end of three end integrated circuits is connected on the electric power incoming line termination of all integrated circuits, the earth terminal connection of three end integrated circuits is grounded branch road to ground, the circuit that ground connection branch road is made up of resistance and Diode series, ground connection branch road is connected on the earth terminal of three end integrated circuits by one end of diode cathode, ground connection branch road is connected on ground wire by one end of diode cathode；It is connected between the output end of three end integrated circuits and earth terminal with one end that resistance is inclined resistance on three ends, OR gate input block is made up of several diodes, the negative pole of several diodes links together, output end as OR gate, the positive cascade of diode connects the output that level is voltage input, the output end of OR gate is connected to first input of Auxiliary Power Units, Auxiliary Power Units have been connected respectively after a resistance by two output ends of door, then the circuit that a head and the tail are connected with each other mutually is constituted, the input of wherein accessory power supply first is the first input end of Auxiliary Power Units, the input of second door is the second input of Auxiliary Power Units, the output end that accessory power supply is second is the output end of Auxiliary Power Units；The output end of Auxiliary Power Units is connected to two-way, and the first via is connected to the power end of the counter in time quantum；The output of second tunnel is connected to a positive pole for differential circuit, the negative pole of differential capacitance is two-way, the diode for wherein connecting all the way is the positive pole of isolating diode, the negative pole of isolating diode, it is connected to the clear terminal of counter, second tunnel is to be connected to discharge diode to ground wire, and time quantum is collectively constituted by the circuit that counter and peripheral element are constituted：N output end of counter is connected to two-way,The wherein first via has been connected a diode i.e. positive pole of the first isolating diode,The negative pole of the first isolating diode is connected to the first input end in logic unit,A second road resistance of having connected decodes one end of resistance,The other end for decoding resistance is connected to the positive pole that a diode decodes diode,The negative pole for decoding diode is connected in the anteposition output end of N output end of counter,The positive pole for decoding diode is the output of decoding circuit,The output of decoding circuit is connected to two-way,The input that the 3rd isolating diode connects accessory power supply second is connected through all the way,Another road connects the input of logic first by the second isolating diode,Logic unit is that two output ends of door have been connected after a resistance respectively,Then the circuit that a head and the tail are connected with each other mutually is constituted,The input of wherein logic first is the first input end of logic unit,The input of second door is the second input of logic unit,The output end that logic is second is the output end of logic unit,The output end of one three end integrated circuits of termination of logic initial differential capacitance,The other end of logic initial differential capacitance is two-way,Initial discharge diode to ground wire is connect all the way,Another road connects initial isolating diode to the input of logic first.
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| US5510971A (en) * | 1993-05-06 | 1996-04-23 | Matra Transport | Safety control device and process with analog power output |
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