CN106896592A - Liquid crystal display panel and display device - Google Patents
Liquid crystal display panel and display device Download PDFInfo
- Publication number
- CN106896592A CN106896592A CN201710078600.3A CN201710078600A CN106896592A CN 106896592 A CN106896592 A CN 106896592A CN 201710078600 A CN201710078600 A CN 201710078600A CN 106896592 A CN106896592 A CN 106896592A
- Authority
- CN
- China
- Prior art keywords
- cabling
- liquid crystal
- crystal display
- fanned out
- array base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 50
- 239000000758 substrate Substances 0.000 claims abstract description 58
- 239000012528 membrane Substances 0.000 claims abstract description 13
- 230000009286 beneficial effect Effects 0.000 abstract description 3
- 239000010408 film Substances 0.000 description 23
- 238000010586 diagram Methods 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 101100117236 Drosophila melanogaster speck gene Proteins 0.000 description 1
- 238000013499 data model Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal (AREA)
- Geometry (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
Abstract
The present invention provides a kind of liquid crystal display panel, including array base palte and color membrane substrates, there is substrate cabling and multiple gate pole chip on film on the array base palte, the color membrane substrates surface is provided with common electrode layer, the region that the common electrode layer is covered in substrate cabling has engraved structure, and then the area that the common electrode layer is incident upon the array base palte fringe region is reduced, to adjust the capacitance between the common electrode layer and the substrate cabling；Have the beneficial effect that：Liquid crystal display panel of the invention, by the engraved structure on the public electrode, change the capacitance between common electrode layer and substrate cabling, counteract resistance value difference, solve because resistance value difference causes the voltage for being input to panel itself variant, and then cause the technical problem of the bad display phenomenon of horizontal block.
Description
Technical field
The present invention relates to technical field of liquid crystal display, more particularly to a kind of liquid crystal display panel and with the liquid crystal display
The display device of panel.
Background technology
With the development of Display Technique, liquid crystal display has become most commonly seen panel display apparatus.In liquid crystal
In showing device, by grid line crisscross on substrate and data line traffic control each pixel, to realize the display of image.
At present, in order to cost-effective, often by gate driving circuit and data circuit production in same printed circuit board
On, substrate cabling (Wire On Array, abbreviation WOA) is recycled by the circuit board and the door for transmitting gate drive signal
Pole chip on film (Gate Chip On Film, abbreviation G-COF) is connected.At least two are generally included in liquid crystal display is used for
The COF of gate drive signal is transmitted, is connected also by WOA between two adjacent COF.Each COF respectively with substrate on one
Group is fanned out to cabling (fanout) and is connected, and is connected to each bar grid line by fanout.
Because WOA has certain resistance, so the resistance of the grid line being connected with latter COF, can than with previous COF
The resistance of connected grid line is big so that the waveform of the gate drive signal on this two grid lines produces difference.In two friendships of COF
At boundary, that is, the raster data model on first grid line being connected with latter COF of the last item grid line of previous COF connections
The different wave shape of signal can seem particularly evident.Especially by the hot and humid test of reliability after, thin film transistor (TFT) can be made
(Thin Film Transistor, abbreviation TFT) characteristic curve offsets, and leakage current increase or charging become not enough, make the waveform
Difference is more obvious, causes liquid crystal display the speck of wire or blackening (mura), that is, level occur in the intersection of COF
Block is bad (H-block).
In sum, existing liquid crystal display panel, resistance difference due to the substrate cabling of panel and between being fanned out to cabling, makes
The signal delay of panel various location is different, causes the voltage for being input to panel itself variant, and then cause horizontal block
Bad phenomenon, have impact on the display effect of liquid crystal display.
The content of the invention
The present invention provides a kind of liquid crystal display panel, is covered on array base palte by changing public electrode fringe region
Area, so as to adjust substrate cabling and be fanned out to the capacitance of cabling, to offset resistance value difference, solves because resistance value difference is led
The voltage that cause is input to panel itself is variant, and then causes the bad display phenomenon of horizontal block.
To solve the above problems, the technical scheme that the present invention is provided is as follows：
The present invention provides a kind of liquid crystal display panel, including：
Color membrane substrates, prepared by its surface have common electrode layer；
Array base palte, positioned at the opposite side of the color membrane substrates；
Array base palte fringe region includes：
One drive circuit plate, positioned at array base palte upside, includes gate driving circuit and data circuit；
Multiple gate pole chip on film, positioned at the left and right sides of the array base palte, positioned at the gate pole chip on film of the top
The drive circuit board is connected to by substrate cabling, the substrate is passed through between the adjacent gate pole chip on film of the same side
Cabling connects；
Multigroup to be fanned out to cabling, the input that cabling is fanned out to described in every group connects a gate pole chip on film, described to be fanned out to cabling
Output end be connected to scan line；
The substrate cabling is fanned out to the outside arrangement of cabling described in；
Wherein, the common electrode layer both sides are formed with some engraved structures, and then reduce the common electrode layer projection
In the area of the array base palte fringe region, to adjust the capacitance between the common electrode layer and the substrate cabling.
According to one preferred embodiment of the present invention, the engraved structure includes being covered in the portion of all substrate routing regions
Point.
According to one preferred embodiment of the present invention, the engraved structure also include correspond to each group described in be fanned out to routing region
Part.
According to one preferred embodiment of the present invention, the engraved structure is stayed by the cutouts electrode on the public electrode
Under hole, described hole forms some electrode patterns on the public electrode, and the electrode pattern shape is approximate by 90
Spend the isosceles triangle of rotation.
According to one preferred embodiment of the present invention, electrode pattern described in be fanned out to cabling described in corresponding one group and overlap,
Wherein, the electrode pattern is covered in the area for being fanned out to the upper and lower both sides cabling of cabling, and cabling is fanned out to described in the group in institute
State location on array base palte related.
According to one preferred embodiment of the present invention, cabling is fanned out to described in some groups on the array base palte, with respect to position
In the electrode pattern being fanned out to described in later group corresponding to cabling, area is more than the electrode being fanned out to described in previous group corresponding to cabling
Pattern.
According to one preferred embodiment of the present invention, the electrode pattern positioned at the common electrode layer left and right sides is symmetrical arranged.
According to the above-mentioned purpose of invention, there is provided a kind of liquid crystal display device, including：
Liquid crystal display panel；
Backlight module, positioned at the liquid crystal display panel opposite；
The liquid crystal display panel includes：
Color membrane substrates, prepared by its surface have common electrode layer；
Array base palte, positioned at the opposite side of the color membrane substrates；
Array base palte fringe region includes：
One drive circuit plate, positioned at array base palte upside, includes gate driving circuit and data circuit；
Multiple gate pole chip on film, positioned at the left and right sides of the array base palte, positioned at the gate pole chip on film of the top
The drive circuit board is connected to by substrate cabling, the substrate is passed through between the adjacent gate pole chip on film of the same side
Cabling connects；
Multigroup to be fanned out to cabling, the input that cabling is fanned out to described in every group connects a gate pole chip on film, described to be fanned out to cabling
Output end be connected to scan line；
The substrate cabling is fanned out to the outside arrangement of cabling described in；
Wherein, the common electrode layer both sides are formed with some engraved structures, and then reduce the common electrode layer projection
In the area of the array base palte fringe region, to adjust the capacitance between the common electrode layer and the substrate cabling.
According to one preferred embodiment of the present invention, the engraved structure includes being covered in the portion of all substrate routing regions
Point.
According to one preferred embodiment of the present invention, the engraved structure also include correspond to each group described in be fanned out to routing region
Part.
According to one preferred embodiment of the present invention, the engraved structure is stayed by the cutouts electrode on the public electrode
Under hole, described hole forms some electrode patterns on the public electrode, and the electrode pattern shape is approximate by 90
Spend the isosceles triangle of rotation.
According to one preferred embodiment of the present invention, electrode pattern described in be fanned out to cabling described in corresponding one group and overlap,
Wherein, the electrode pattern is covered in the area for being fanned out to the upper and lower both sides cabling of cabling, and cabling is fanned out to described in the group in institute
State location on array base palte related.
According to one preferred embodiment of the present invention, cabling is fanned out to described in some groups on the array base palte, with respect to position
In the electrode pattern being fanned out to described in later group corresponding to cabling, area is more than the electrode being fanned out to described in previous group corresponding to cabling
Pattern.
According to one preferred embodiment of the present invention, the electrode pattern positioned at the common electrode layer left and right sides is symmetrical arranged.
Beneficial effects of the present invention are：Compared to the liquid crystal display panel of prior art, liquid crystal display panel of the invention,
Its common electrode layer both sides is formed with some engraved structures, is incident upon on array base palte by reducing common electrode layer fringe region
Area, change common electrode layer and substrate cabling and with the capacitance being fanned out between cabling, counteract resistance value difference, solve
Determine because resistance value difference causes the voltage for being input to panel itself variant, and then caused the bad display of horizontal block to show
As.
Brief description of the drawings
In order to illustrate more clearly of embodiment or technical scheme of the prior art, below will be to embodiment or prior art
The accompanying drawing to be used needed for description is briefly described, it should be apparent that, drawings in the following description are only some of invention
Embodiment, for those of ordinary skill in the art, on the premise of not paying creative work, can also be attached according to these
Figure obtains other accompanying drawings.
Fig. 1 is a kind of existing array base-plate structure schematic diagram；
Fig. 2 is the structural representation of the common electrode layer of liquid crystal display panel of the present invention；
Fig. 3 a, 3b are the single electrode patterning schematic diagram of liquid crystal display panel of the present invention.
Specific embodiment
The explanation of following embodiment is, with reference to additional diagram, to be used to illustrate the particular implementation that the present invention may be used to implement
Example.The direction term that the present invention is previously mentioned, such as [on], [under], [preceding], [afterwards], [left side], [right side], [interior], [outward], [side]
Deng being only the direction with reference to annexed drawings.Therefore, the direction term for using is to illustrate and understand the present invention, and is not used to
The limitation present invention.In figure, the similar unit of structure is represented to identical label.
The present invention is directed to existing liquid crystal display panel, resistance difference due to the substrate cabling of panel and between being fanned out to cabling,
Make the signal delay of panel various location different, cause the voltage for being input to panel itself variant, and then cause horizontal zone
Block bad phenomenon, the present embodiment can solve the problem that the defect.
Signal delay (RC delay) is a most basic phenomenon in circuitry, when circuit is made up of resistance capacitance,
If the current potential moment of A points is changed into V2 from V1, due to the effect of resistance (R) electric capacity (C) in circuit, the potential change of B points is to postpone
, its voltage changes over time relation and exponential type change is presented, and specific formula is：VB=V2- (V2-V1) exp [- t/ (RC)],
As can be seen that the product of R and C is the voltage change factor from formula, for causing the waveform of delay because resistance R changes, can
It is compensated for by the change to C.In other words, when the waveform of input, because resistance R increases and causes waveform different in circuit
Often, can recover its waveform by the electric capacity C reduced in circuit, the liquid crystal display panel of the embodiment of the present invention, with above-mentioned
Principle is solving prior art problem.
Fig. 1 is existing array base-plate structure schematic diagram.
As shown in figure 1, array base palte 101 includes viewing area 102, and positioned at the periphery in the outside of the viewing area 102
Area 103；The external zones 103 includes：One drive circuit plate 104, positioned at the upside of the array base palte 101, includes grid drive
Dynamic circuit and data circuit；Multiple source electrode chip on film, positioned at the upside of the array base palte 101, are connected to LCD
The data wire of plate；Multiple gate pole chip on film 105, positioned at the left and right sides of the array base palte 101, positioned at the gate pole of the top
Chip on film 105 is connected to the drive circuit board 104 by substrate cabling, positioned at the adjacent gate pole chip on film of the same side
Connected by the substrate cabling 106 between 105；Multigroup to be fanned out to cabling 108, the input that cabling 108 is fanned out to described in every group connects
A gate pole chip on film 105 is connect, the output end for being fanned out to cabling 108 is connected to scan line；The substrate cabling 106 is along described
It is fanned out to the outside arrangement of cabling 108.
Fig. 2 is the structural representation of the common electrode layer of liquid crystal display panel of the present invention.
As shown in Fig. 2 including common electrode layer 201, the common electrode layer 201 is prepared in color membrane substrates relative to described
The side of array base palte；The both sides of the common electrode layer 201 are formed with some engraved structures, and then reduce the common electrode layer
201 areas for being incident upon the array base palte fringe region, to adjust the electricity between the common electrode layer 201 and substrate cabling
Capacitance, and the common electrode layer 201 and the capacitance that is fanned out between cabling.
The engraved structure is to open up hole in the common electrode layer 201, with corresponding site cutouts electrode；
Wherein, the engraved structure includes the first hollow-out parts 202 and the second hollow-out parts 203；The correspondence of first hollow-out parts 202 is located at
The common electrode layer 201 covers the region of the substrate cabling, and then reduces the substrate routing region and common electrode layer
Capacitance between 201, reduces the interference that the substrate cabling is produced to signal；Second hollow-out parts 203 are interspersed in described
In first hollow-out parts 202, second hollow-out parts 203 are formed with some electrode patterns 204 in the common electrode layer 201,
Each electrode pattern 204 is fanned out to cabling corresponding to one group, and each electrode pattern 204 is by two the second symmetrical hollow-out parts
203 are formed；By changing the form and dimension of the electrode pattern 204, adjustable each electrode pattern 204 is fanned out to corresponding
Capacitance between cabling.
Signal, when driving, is from top to bottom progressive scan or interlacing scan, by substrate cabling successively by signal
Be transferred to each gate pole chip on film from top to bottom, because substrate cabling has a resistance, signal in transmission downwards intensity by
Gradually successively decrease, so as to need the cabling group that is fanned out to connected to the gate pole chip on film of corresponding line level to match different size of electrode figure
Case 204；Specifically, make some electrode patterns 204 that second hollow-out parts 203 are formed, positioned at the electrode pattern 204 of upper end
The area of electrode pattern 204 for being extremely located at lower end is incremented by successively, and single electrode pattern 204 is no more than described in one group and is fanned out to cabling
Area.
Fig. 3 a, 3b are the single electrode patterning schematic diagram of liquid crystal display panel of the present invention.
Electrode pattern 301 described in the correspondence of cabling 302 one is fanned out to described in each group, the input for being fanned out to cabling 302 connects
Be connected to the gate pole chip on film, it is described be fanned out to cabling 302 need to be launched into from after gate pole chip on film extraction it is wider
Width, so that, the cabling that can be formed positioned at upper/lower terminal is gradually shortened to middle track lengths are located at, when line width is constant,
Length trace resistances more long are larger, conversely, it is then minimum positioned at middle trace resistances, therefore the electrode pattern 301 is set
Be calculated as it is subtriangular by solve the above problems.
As shown in Figure 3 a, be position it is more top one described in electrode pattern 301, the electrode pattern 301 be located at one group of institute
State and be fanned out to the top of cabling 302, electric capacity is formed with the cabling 302 that is fanned out to；The electrode pattern 301 is relative to latter electrode pattern
301 areas are smaller, and be covered in be fanned out to the upper and lower both sides of cabling 302 cabling area it is less, therefore reduce and upper and lower two sidle
Capacitance between line and public click, to increase the resistance of upper and lower both sides cabling, each bar cabling resistance of same group of balance.
As shown in Figure 3 b, be position more on the lower one described in electrode pattern 301, the electrode pattern 301 be located at one group of institute
State and be fanned out to the top of cabling 302, electric capacity is formed with the cabling 302 that is fanned out to；The relatively previous electrode pattern of the electrode pattern 301
301 areas are larger, and be covered in be fanned out to the upper and lower both sides of cabling 302 cabling area it is more, lift upper and lower both sides cabling
The capacitance between public electrode, to reduce the resistance of upper and lower both sides cabling, each bar cabling resistance of same group of balance.
Finally, the common electrode layer for being formed by the engraved structure so that the letters for being fanned out to the reception of cabling 302 at different levels
Number intensity equalization, and each bar is connected to the signal equalization for being fanned out to the transmission of cabling 302 of grid line, the voltage of input to panel itself without
Difference, so as to solve the problems, such as that liquid crystal display panel shows the bad picture of horizontal block.
According to foregoing invention purpose, a kind of liquid crystal display device is proposed, including：Liquid crystal display panel；Backlight module, is located at
The liquid crystal display panel opposite；The liquid crystal display panel includes：Color membrane substrates, prepared by its surface have common electrode layer；
Array base palte, positioned at the opposite side of the color membrane substrates；Array base palte fringe region includes：One drive circuit plate, positioned at described
Array base palte upside, includes gate driving circuit and data circuit；Multiple gate pole chip on film, positioned at the array base palte
The left and right sides, the gate pole chip on film positioned at the top is connected to the drive circuit board by substrate cabling, positioned at the same side
Adjacent gate pole chip on film between connected by the substrate cabling；It is multigroup to be fanned out to cabling, the defeated of cabling is fanned out to described in every group
Enter one gate pole chip on film of end connection, the output end for being fanned out to cabling is connected to scan line；The substrate cabling is along the fan
Go out the outside arrangement of cabling；Wherein, the common electrode layer both sides are formed with some engraved structures, and then reduce the common electrical
Pole layer is incident upon the area of the array base palte fringe region, to adjust between the common electrode layer and the substrate cabling
Capacitance.
The operation principle of the liquid crystal display device of this preferred embodiment is with the liquid crystal display panel of above preferred embodiment
Operation principle is consistent, specifically refers to the operation principle of the liquid crystal display panel of above preferred embodiment, no longer repeats herein.
Beneficial effects of the present invention are：Compared to the liquid crystal display panel of prior art, liquid crystal display panel of the invention,
Its common electrode layer both sides is formed with some engraved structures, is incident upon on array base palte by reducing common electrode layer fringe region
Area, change common electrode layer and substrate cabling and with the capacitance being fanned out between cabling, counteract resistance value difference, solve
Determine because resistance value difference causes the voltage for being input to panel itself variant, and then caused the bad display of horizontal block to show
As.
In sum, although the present invention it is disclosed above with preferred embodiment, but above preferred embodiment and be not used to limit
The system present invention, one of ordinary skill in the art without departing from the spirit and scope of the present invention, can make various changes and profit
Adorn, therefore protection scope of the present invention is defined by the scope that claim is defined.
Claims (10)
1. a kind of liquid crystal display panel, it is characterised in that including：
Color membrane substrates, prepared by its surface have common electrode layer；
Array base palte, positioned at the opposite side of the color membrane substrates；
Array base palte fringe region includes：
One drive circuit plate, positioned at array base palte upside, includes gate driving circuit and data circuit；
Multiple gate pole chip on film, positioned at the left and right sides of the array base palte, the gate pole chip on film positioned at the top passes through
Substrate cabling is connected to the drive circuit board, and the substrate cabling is passed through between the adjacent gate pole chip on film of the same side
Connect；
Multigroup to be fanned out to cabling, the input that cabling is fanned out to described in every group connects a gate pole chip on film, described to be fanned out to the defeated of cabling
Go out end and be connected to scan line；
The substrate cabling is fanned out to the outside arrangement of cabling described in；
Wherein, the common electrode layer both sides are formed with some engraved structures, and then the diminution common electrode layer is incident upon institute
The area of array base palte fringe region is stated, to adjust the capacitance between the common electrode layer and the substrate cabling.
2. liquid crystal display panel according to claim 1, it is characterised in that the engraved structure includes being covered in whole institutes
State the part of substrate routing region.
3. liquid crystal display panel according to claim 2, it is characterised in that the engraved structure also includes corresponding to each group
The part for being fanned out to routing region.
4. liquid crystal display panel according to claim 3, it is characterised in that the engraved structure is in the public electrode
Hole left by upper cutouts electrode, described hole forms some electrode patterns, the electrode on the public electrode
Pattern form is approximate by 90 degree of isosceles triangles of rotation.
5. liquid crystal display panel according to claim 4, it is characterised in that electrode pattern described in one and corresponding one group of institute
State and be fanned out to cabling and overlap, wherein, the electrode pattern is covered in the area for being fanned out to the upper and lower both sides cabling of cabling, with this
Cabling location on the array base palte is fanned out to described in group related.
6. liquid crystal display panel according to claim 5, it is characterised in that some groups of institutes on the array base palte
State and be fanned out to cabling, be located relatively at the electrode pattern being fanned out to corresponding to cabling of later group, area is fanned more than described in previous group
Go out the electrode pattern corresponding to cabling.
7. liquid crystal display panel according to claim 6, it is characterised in that positioned at the common electrode layer left and right sides
Electrode pattern is symmetrical arranged.
8. a kind of liquid crystal display device, it is characterised in that including：
Liquid crystal display panel；
Backlight module, positioned at the liquid crystal display panel opposite；
The liquid crystal display panel includes：
Color membrane substrates, prepared by its surface have common electrode layer；
Array base palte, positioned at the opposite side of the color membrane substrates；
Array base palte fringe region includes：
One drive circuit plate, positioned at array base palte upside, includes gate driving circuit and data circuit；
Multiple gate pole chip on film, positioned at the left and right sides of the array base palte, the gate pole chip on film positioned at the top passes through
Substrate cabling is connected to the drive circuit board, and the substrate cabling is passed through between the adjacent gate pole chip on film of the same side
Connect；
Multigroup to be fanned out to cabling, the input that cabling is fanned out to described in every group connects a gate pole chip on film, described to be fanned out to the defeated of cabling
Go out end and be connected to scan line；
The substrate cabling is fanned out to the outside arrangement of cabling described in；
Wherein, the common electrode layer both sides are formed with some engraved structures, and then the diminution common electrode layer is incident upon institute
The area of array base palte fringe region is stated, to adjust the capacitance between the common electrode layer and the substrate cabling.
9. liquid crystal display device according to claim 8, it is characterised in that the engraved structure includes being covered in whole institutes
State the part of substrate routing region.
10. liquid crystal display device according to claim 9, it is characterised in that the engraved structure also includes corresponding to each
The part of routing region is fanned out to described in group.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710078600.3A CN106896592B (en) | 2017-02-14 | 2017-02-14 | Liquid crystal display panel and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710078600.3A CN106896592B (en) | 2017-02-14 | 2017-02-14 | Liquid crystal display panel and display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106896592A true CN106896592A (en) | 2017-06-27 |
| CN106896592B CN106896592B (en) | 2020-05-22 |
Family
ID=59198779
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710078600.3A Active CN106896592B (en) | 2017-02-14 | 2017-02-14 | Liquid crystal display panel and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106896592B (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109658891A (en) * | 2019-01-30 | 2019-04-19 | 惠科股份有限公司 | Drive circuit, display panel and display device |
| CN110133929A (en) * | 2019-06-28 | 2019-08-16 | 京东方科技集团股份有限公司 | Array substrate and its manufacturing method, display panel and display module |
| CN110147013A (en) * | 2019-05-07 | 2019-08-20 | 深圳市华星光电半导体显示技术有限公司 | Color membrane substrates and liquid crystal display panel |
| CN113419385A (en) * | 2021-05-31 | 2021-09-21 | 北海惠科光电技术有限公司 | Display panel, preparation method thereof and display device |
| CN114171571A (en) * | 2021-12-08 | 2022-03-11 | 武汉华星光电半导体显示技术有限公司 | Display panel and mobile terminal |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090279037A1 (en) * | 2008-05-09 | 2009-11-12 | Funai Electric Co., Ltd. | Liquid Crystal Display Apparatus and Method for Manufacturing Liquid Crystal Display Apparatus |
| CN103293808A (en) * | 2013-05-28 | 2013-09-11 | 深圳市华星光电技术有限公司 | Display device and manufacturing method thereof |
| CN104267546A (en) * | 2014-09-19 | 2015-01-07 | 京东方科技集团股份有限公司 | Array substrate and display device |
-
2017
- 2017-02-14 CN CN201710078600.3A patent/CN106896592B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090279037A1 (en) * | 2008-05-09 | 2009-11-12 | Funai Electric Co., Ltd. | Liquid Crystal Display Apparatus and Method for Manufacturing Liquid Crystal Display Apparatus |
| CN103293808A (en) * | 2013-05-28 | 2013-09-11 | 深圳市华星光电技术有限公司 | Display device and manufacturing method thereof |
| CN104267546A (en) * | 2014-09-19 | 2015-01-07 | 京东方科技集团股份有限公司 | Array substrate and display device |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109658891A (en) * | 2019-01-30 | 2019-04-19 | 惠科股份有限公司 | Drive circuit, display panel and display device |
| CN109658891B (en) * | 2019-01-30 | 2020-08-18 | 惠科股份有限公司 | Drive circuit, display panel and display device |
| CN110147013A (en) * | 2019-05-07 | 2019-08-20 | 深圳市华星光电半导体显示技术有限公司 | Color membrane substrates and liquid crystal display panel |
| CN110133929A (en) * | 2019-06-28 | 2019-08-16 | 京东方科技集团股份有限公司 | Array substrate and its manufacturing method, display panel and display module |
| CN113419385A (en) * | 2021-05-31 | 2021-09-21 | 北海惠科光电技术有限公司 | Display panel, preparation method thereof and display device |
| CN114171571A (en) * | 2021-12-08 | 2022-03-11 | 武汉华星光电半导体显示技术有限公司 | Display panel and mobile terminal |
| CN114171571B (en) * | 2021-12-08 | 2023-12-01 | 武汉华星光电半导体显示技术有限公司 | Display panel and mobile terminal |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106896592B (en) | 2020-05-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106896592A (en) | Liquid crystal display panel and display device | |
| KR100679521B1 (en) | Method for fabricating liquid crystal display device | |
| KR102173356B1 (en) | Display Panel having the Curved Panel | |
| KR102129336B1 (en) | Display apparatus and multi panel display apparatus | |
| KR20240023414A (en) | Display apparatus and manufacturing method thereof | |
| JP4566075B2 (en) | Liquid crystal display device and driving method thereof | |
| KR100661826B1 (en) | liquid crystal display device | |
| EP2390718B1 (en) | Active matrix substrate, liquid crystal display panel, liquid crystal display device, method for manufacturing active matrix substrate, method for manufacturing liquid crystal display panel and method for driving liquid crystal display panel | |
| KR101641958B1 (en) | Liquid crsytal display | |
| KR101592015B1 (en) | Liquid crystal display | |
| CN106292090A (en) | Touch display panel and driving method thereof | |
| KR19990025571A (en) | LCD Display | |
| US20120154699A1 (en) | Displays with minimized crosstalk | |
| KR101582947B1 (en) | Liquid crystal display | |
| CN102929054A (en) | Array substrate and driving method of pixels | |
| KR100825093B1 (en) | Liquid crystal device | |
| CN104280963A (en) | Array substrate, manufacturing method of array substrate, and display device | |
| KR101628200B1 (en) | Display apparatus | |
| KR102608434B1 (en) | Display device | |
| CN102890380A (en) | TFT (thin film transistor) array base plate, manufacture method thereof and liquid crystal display device | |
| CN100555395C (en) | Liquid crystal indicator and driving method thereof | |
| CN107230443B (en) | In-cell touch panel tests circuit | |
| KR20080002336A (en) | A liquid crystal display device | |
| KR20060106322A (en) | Liquid crystal display device | |
| KR101802998B1 (en) | Liquid crsytal display |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Patentee after: TCL China Star Optoelectronics Technology Co.,Ltd. Address before: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Patentee before: Shenzhen China Star Optoelectronics Technology Co.,Ltd. |
|
| CP01 | Change in the name or title of a patent holder |