CN106886644A - A kind of programmable delay circuit based on memristor element - Google Patents
A kind of programmable delay circuit based on memristor element Download PDFInfo
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- CN106886644A CN106886644A CN201710089828.2A CN201710089828A CN106886644A CN 106886644 A CN106886644 A CN 106886644A CN 201710089828 A CN201710089828 A CN 201710089828A CN 106886644 A CN106886644 A CN 106886644A
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- memristor element
- delay circuit
- phase inverter
- memristor
- programmable delay
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
- G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
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Abstract
The embodiment of the invention discloses a kind of programmable delay circuit based on memristor element, it is applied to integrated circuit fields, by using memristor element in programmable delay circuit, there is the characteristics of resistance holding and threshold property using memristor element, solve the problems, such as in the prior art due to realizing that delay feature needs extremely complex circuit design and very big electric resistance array area using variable resistor array, and efficiently solve input vector and postpone into the shortcoming of nonmonotonicity so that circuit has the accurate programmable characteristic of delay.
Description
Technical field
The present invention relates to technical field of integrated circuits, more particularly to a kind of programmable delay circuit based on memristor element.
Background technology
In integrated circuit design, conventional programmable delay circuit is by being programmed to realization to different resistance
's.By the way that substantial amounts of metal-oxide-semiconductor to be stacked on the pullup or pulldown path of delay circuit in design, to obtain different equivalent conductings
Resistance, so as to obtain different delayed time.The variable resistor array of stacking contains the metal-oxide-semiconductor of different breadth length ratios (W/L), according to difference
Input vector open the metal-oxide-semiconductor of varying number in array and be obtained with required time delay.
Although introducing electric resistance array can obtain programmable delay unit, influenceed by parasitic parameter, this structure
Time delay predictability it is poor, conducting resistance and time delay are difficult to keep linear relationship, lead to not obtain input vector with time delay
Dull sexual intercourse.Shown in accompanying drawing 1, one is simply stacked two NMOS tubes and is received as the numerical control delay unit of variable resistor
The influence of metal-oxide-semiconductor charge share is controlled, the time delay after Mn1 closures should be bigger than the time delay after Mn0 closures, actual is but a kind of opposite
Situation, shown in accompanying drawing 2, Mn1 closure after time delay than Mn0 closure after time delay it is small.The method for generally improving is carefully design
The breadth length ratio (W/L) of each metal-oxide-semiconductor in electric resistance array, and give Voltage Feedback compensation in appropriate node.In input vector ratio
In the case of less, foregoing circuit problem encountered can be solved by this method.But on the one hand this method makes in itself
Obtaining circuit design becomes complex, on the other hand very many in input vector, when variable resistor array area is very big, to determine
The size of each metal-oxide-semiconductor is hardly possible, while big area can increase quiescent dissipation again.
The content of the invention
In view of this, the embodiment of the present invention provides a kind of programmable delay circuit based on memristor element, solves integrated electricity
Due to using variable resistor array to cause the technical problem of complex circuit designs in road.
The present invention provides a kind of programmable delay circuit based on memristor element and may include：
First phase inverter, the second phase inverter, threshold value pipe, memristor element and control logic unit,
First phase inverter and the second inverter series are connected, and the drain electrode of the NMOS tube of first phase inverter is connected to
The source electrode of the threshold value pipe, the drain electrode connection signal ground of the NMOS tube of second phase inverter,
One end of the drain electrode connection memristor element of the threshold value pipe, the grid connection control of the threshold value pipe is patrolled
The first end of unit is collected,
The other end connection signal ground of the memristor element,
Second end of the control logic unit connects one end of the memristor element, the 3rd of the control logic unit the
The other end of the end connection memristor element, the 4th end connection input vector of the control logic unit,
The input of first phase inverter is the input of the programmable delay circuit, second phase inverter it is defeated
It is the output end of the programmable delay circuit to go out end.
In the first possible implementation, the memristor element is used in programming mode, the threshold value pipe shut-off,
The input vector is adjusted in a fixed value resistance of the memristor element by the control logic unit.
In second possible implementation, the memristor element (104) in mode of operation, the threshold value pipe
(103) close, the memristor element (104) is operated in below threshold voltage, resistance keeps constant, the programmable delay circuit
Complete low level to the upset of high level.
In the third possible implementation, the resistance regulation of the memristor element is by using pulse signal or straight
Stream level is realized.
As can be seen from the above technical solutions, the embodiment of the present invention has advantages below：
In the embodiment of the present invention, by using memristor element in programmable delay circuit, there is resistance using memristor element
The characteristics of value holding and threshold property, solve non-due to realizing that delay feature needs using variable resistor array in the prior art
Often complicated circuit design and the problem of very big electric resistance array area, and efficiently solve input vector with postpone into it is non-
The shortcoming of monotonicity so that circuit has the accurate programmable characteristic of delay.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
The accompanying drawing to be used needed for having technology description is briefly described, it should be apparent that, drawings in the following description are this hairs
Some bright embodiments, for those of ordinary skill in the art, on the premise of not paying creative work, can be with root
Other circuit structures are obtained according to these accompanying drawings.
Fig. 1 is have two variable resistor delay circuit structure charts of NMOS tube in the prior art；
Fig. 2 is the comparative result figure of delay circuit shown in Fig. 1；
Fig. 3 is a kind of programmable delay circuit structure chart based on memristor element in the embodiment of the present invention；
Fig. 4 is the comparative result figure of programmable delay circuit shown in Fig. 3.
Specific embodiment
The embodiment of the invention provides a kind of programmable delay circuit based on memristor element, solve in integrated circuit due to
Use variable resistor array to cause the technical problem of complex circuit designs, and efficiently solve input vector with postpone into it is non-monotonic
Property shortcoming so that circuit has and postpones accurate programmable characteristic.
In order that those skilled in the art more fully understand the present invention program, below in conjunction with the embodiment of the present invention
Accompanying drawing, is clearly and completely described to the technical scheme in the embodiment of the present invention, it is clear that described embodiment is only
The embodiment of a part of the invention, rather than whole embodiments.Based on the embodiment in the present invention, ordinary skill people
All other embodiment that member is obtained under the premise of creative work is not made, should all belong to the model of present invention protection
Enclose.
First, on the concept of memristor element, memristor element is used as the 4th kind of end of Passive Nonlinear two being found recently
Element (other three kinds is resistance, electric capacity and inductance) has resistance holding, nano level size, rapid translating and CMOS technology
Compatible the characteristics of.Its basic model is as follows：
M (t)=Ronx(t)+Roff(1-x(t)) (1)
Wherein D is the length of memristor element, and w (t) represents the width of the doped region of element；M (t) refers to the memristor of t
Value；RoffFor element whole undoped p when, i.e., w (t)=0 when memristor value；When Ron is that element all adulterates, i.e. during w (t)=D
Memristor value；I (t) is the electric current for flowing through memristor；K=μvRon/D2, μνIon transfer constant is represented, x (t) represents that doped region is accounted for
The ratio of element total length.Research shows, when the voltage for being applied to memristor element two ends is less than a certain threshold voltage, μνAlmost
It is 0, now memristor value keeps constant；When the voltage for being applied to memristor element two ends is higher than this threshold voltage, memristor value is
Into nonlinear change.
It is a kind of circuit structure diagram of the programmable delay circuit based on memristor element with reference to shown in Fig. 3, as shown in Figure 3,
A kind of programmable delay circuit embodiment 1 based on memristor element that the present invention is provided, the programmable delay circuit can be wrapped
The first phase inverter 101, the second phase inverter 102, threshold value pipe 103, memristor element 104 and control logic unit 105 are included, wherein described
First phase inverter 101 and the second phase inverter 102 are connected in series, and the drain electrode of the NMOS tube of first phase inverter 101 is connected to institute
State the source electrode of threshold value pipe 103, the drain electrode connection signal ground of the NMOS tube of second phase inverter 102, the leakage of the threshold value pipe 103
Pole connects one end of the memristor element 104, and the grid of the threshold value pipe 103 connects the first of the control logic unit 105
End, the other end connection signal ground of the memristor element 104, the second end of the control logic unit 105 connects the memristor
One end of element 104, the other end of memristor element 104, the control described in the three-terminal link of the control logic unit 105
The 4th end connection input vector of logic unit 105, the input of first phase inverter 101 is the programmable delay circuit
Input, the output end of second phase inverter 102 is the output end of the programmable delay circuit.
It should be noted that first phase inverter and the second phase inverter are used to be overturn signal level, the threshold
Value pipe is realized for fitting through the memristor element that turns on and off of the threshold value pipe with memristor element in memristor element manipulation
Different mode of operations, the memristor element is used to obtain required memristor value, and the regulation of monotonicity is carried out to time delay, described
Control logic unit is used to realize resistance holding and the PLC technology of threshold value of memristor element.
A kind of programmable delay circuit based on memristor element that the present invention is provided is protected by using the resistance of memristor element
Hold and threshold property, substituted the electric resistance array in former delay circuit, required memristor value is accurately obtained by input vector, and
And extra load is not introduced into, and the monotonicity regulation of time delay is realized, the area of delay circuit is greatly reduced, effectively reduce
The overall power of circuit.
In order to better illustrate a kind of operation principle of the programmable delay circuit based on memristor element, the invention provides
Embodiment 2, with reference also to shown in accompanying drawing 3, a kind of programmable delay circuit based on memristor element can include：First phase inverter
101st, the second phase inverter 102, threshold value pipe 103, memristor element 104 and control logic unit 105, wherein first phase inverter
101 and second phase inverter 102 be connected in series, the drain electrode of the NMOS tube of first phase inverter 101 is connected to the threshold value pipe 103
Source electrode, the drain electrode connection signal ground of the NMOS tube of second phase inverter 102, the drain electrode connection of the threshold value pipe 103 is described
One end of memristor element 104, the grid of the threshold value pipe 103 connects the first end of the control logic unit 105, the memristor
The other end connection signal ground of element 104, the second end of the control logic unit 105 connects the one of the memristor element 104
End, the other end of memristor element 104 described in the three-terminal link of the control logic unit 105, the control logic unit 105
The 4th end connection input vector, the input of first phase inverter 101 is the input of the programmable delay circuit, institute
The output end for stating the second phase inverter 102 is the output end of the programmable delay circuit.
It should be noted that first phase inverter and the second phase inverter are used to be overturn signal level, the threshold
Value pipe is realized for fitting through the memristor element that turns on and off of the threshold value pipe with memristor element in memristor element manipulation
Different mode of operations, the memristor element is used to obtain required memristor value, and the regulation of monotonicity is carried out to time delay, described
Control logic unit is used to realize resistance holding and the PLC technology of threshold value of memristor element.
Also, it should be noted that the memristor element 104 is used in programming mode, the threshold value pipe 103 is turned off, described
Input vector is then adjusted in a fixed value resistance of the memristor element 104 by the control logic unit 105.It is described
Memristor element 104 be used in mode of operation, the threshold value pipe 103 is closed, the memristor element 104 be operated in threshold voltage with
Under, and resistance keeps constant, the FPGA delay circuit completes low level to the upset of high level.Wherein, it is described to recall
The regulation of resistance element 104 is realized by using pulse signal or DC level.
What Fig. 4 was given is the actual effect of the programmable delay circuit that the use memristor element that the present invention is provided builds, and is led to
When the resistance for crossing the memristor element that configuration vector is realized is respectively 100,4100,8100,12100 and 16100 ohm, input arteries and veins
Punching is by the carryover effects curve after delay circuit.It will be apparent that under different configurations, due to the change of memristor element resistance,
The carryover effects of delay circuit are presented dull variation tendency.
A kind of programmable delay circuit based on memristor element that the present invention is provided, makes by programmable delay circuit
Memristor element is used, there is the characteristics of resistance holding and threshold property using memristor element, solved in the prior art due to using
Variable resistor array realizes the problem of the extremely complex circuit design of delay feature needs and very big electric resistance array area,
And efficiently solve input vector and postpone into the shortcoming of nonmonotonicity so that circuit has the accurate programmable characteristic of delay.
The above, the above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations；Although with reference to preceding
Embodiment is stated to be described in detail the present invention, it will be understood by those within the art that：It still can be to preceding
State the technical scheme described in each embodiment to modify, or equivalent is carried out to which part technical characteristic；And these
Modification is replaced, and does not make the spirit and scope of the essence disengaging various embodiments of the present invention technical scheme of appropriate technical solution.
Claims (4)
1. a kind of programmable delay circuit based on memristor element, it is characterised in that including：
First phase inverter (101), the second phase inverter (102), threshold value pipe (103), memristor element (104) and control logic unit
(105),
First phase inverter (101) and the second phase inverter (102) are connected in series, the NMOS tube of first phase inverter (101)
Drain electrode be connected to the source electrode of the threshold value pipe (103), the drain electrode connection signal of the NMOS tube of second phase inverter (102)
Ground,
The drain electrode of the threshold value pipe (103) connects one end of the memristor element (104), and the grid of the threshold value pipe (103) connects
The first end of the control logic unit (105) is connect,
The other end connection signal ground of the memristor element (104),
Second end of the control logic unit (105) connects one end of the memristor element (104), the control logic unit
(105) other end of memristor element (104) described in three-terminal link, the 4th end connection of the control logic unit (105)
Input vector,
The input of first phase inverter (101) is the input of the programmable delay circuit, second phase inverter
(102) output end is the output end of the programmable delay circuit.
2. programmable delay circuit according to claim 1, it is characterised in that the memristor element (104) is for compiling
During journey pattern, the threshold value pipe (103) shut-off, the input vector is by the control logic unit (105) by the memristor
The resistance of element (104) is adjusted in a fixed value.
3. programmable delay circuit according to claim 1, it is characterised in that the memristor element (104) is in work
During operation mode, threshold value pipe (103) closure, the memristor element (104) is operated in below threshold voltage, and resistance keeps not
Become, the programmable delay circuit completes low level to the upset of high level.
4. programmable delay circuit according to claim 2, it is characterised in that the resistance of the memristor element (104) is adjusted
Section is realized by using pulse signal or DC level.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710089828.2A CN106886644A (en) | 2017-02-20 | 2017-02-20 | A kind of programmable delay circuit based on memristor element |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710089828.2A CN106886644A (en) | 2017-02-20 | 2017-02-20 | A kind of programmable delay circuit based on memristor element |
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| CN106886644A true CN106886644A (en) | 2017-06-23 |
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| CN201710089828.2A Pending CN106886644A (en) | 2017-02-20 | 2017-02-20 | A kind of programmable delay circuit based on memristor element |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102568582A (en) * | 2010-12-24 | 2012-07-11 | 三星电子株式会社 | Variable resistance device, semiconductor device including the variable resistance device, and method of operating the semiconductor device |
| CN105304116A (en) * | 2015-09-16 | 2016-02-03 | 宁波时代全芯科技有限公司 | Memory driving circuit |
| CN205354662U (en) * | 2016-02-01 | 2016-06-29 | 福州大学 | Circuit able to programme based on memristorMOSFET |
| CN105897269A (en) * | 2016-05-17 | 2016-08-24 | 福州大学 | Analog-to-digital conversion circuit based on memristor and conversion method |
| WO2016175770A1 (en) * | 2015-04-28 | 2016-11-03 | Hewlett Packard Enterprise Development Lp | Memristor apparatus with variable transmission delay |
-
2017
- 2017-02-20 CN CN201710089828.2A patent/CN106886644A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102568582A (en) * | 2010-12-24 | 2012-07-11 | 三星电子株式会社 | Variable resistance device, semiconductor device including the variable resistance device, and method of operating the semiconductor device |
| WO2016175770A1 (en) * | 2015-04-28 | 2016-11-03 | Hewlett Packard Enterprise Development Lp | Memristor apparatus with variable transmission delay |
| CN105304116A (en) * | 2015-09-16 | 2016-02-03 | 宁波时代全芯科技有限公司 | Memory driving circuit |
| CN205354662U (en) * | 2016-02-01 | 2016-06-29 | 福州大学 | Circuit able to programme based on memristorMOSFET |
| CN105897269A (en) * | 2016-05-17 | 2016-08-24 | 福州大学 | Analog-to-digital conversion circuit based on memristor and conversion method |
Non-Patent Citations (1)
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Application publication date: 20170623 |