CN106876261B - Flexible conductive wire, and preparation method and application thereof - Google Patents

Flexible conductive wire, and preparation method and application thereof Download PDF

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CN106876261B
CN106876261B CN201510917796.1A CN201510917796A CN106876261B CN 106876261 B CN106876261 B CN 106876261B CN 201510917796 A CN201510917796 A CN 201510917796A CN 106876261 B CN106876261 B CN 106876261B
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layer
microspheres
flexible conductive
conductive wire
flexible
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CN106876261A (en
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袁波
刘玉成
高胜
赵长征
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Chengdu Vistar Optoelectronics Co Ltd
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Kunshan New Flat Panel Display Technology Center Co Ltd
Kunshan Govisionox Optoelectronics Co Ltd
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
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    • H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
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    • H01L2021/775—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate comprising a plurality of TFTs on a non-semiconducting substrate, e.g. driving circuits for AMLCDs

Abstract

The invention relates to a preparation method of a flexible conductive wire, which comprises the following steps: s11: preparing microsphere dispersion, adding microspheres into a solvent, and uniformly dispersing to obtain microsphere dispersion; s12: preparing a microsphere template array, coating microsphere dispersion liquid on a substrate, and drying to remove a solvent to obtain the microsphere template array; s13: depositing metal wires, depositing a metal layer on the microsphere template, and forming a metal film with a net structure on the surface of the microspheres and the metal layer filled in the gaps among the microspheres; and S14, forming a flexible conductive wire, removing the substrate and the microspheres, and etching the metal film with the net structure into the flexible conductive wire with a preset shape. The resistivity of the flexible conductive wire provided by the invention can be kept stable in the bending process, and the service life of the flexible backboard is prolonged.

Description

Flexible conductive wire, and preparation method and application thereof
Technical Field
The invention relates to the field of flexible display devices, in particular to a flexible conductive wire suitable for a flexible display device and a preparation method thereof, and a flexible back plate with the flexible conductive wire and a preparation method thereof.
Background
With the continuous development of display technology, the OLED (organic light emitting diode) is becoming a hot point of international research increasingly due to its advantages of high brightness, rich color, low-voltage dc driving, simple preparation process, etc. The OLED has wider visual field range, can be made into products with larger size, and can meet the requirements of users on different sizes. The outstanding advantages described above determine that OLEDs will become the mainstream of next generation display technologies. With the development of material technology, display screens have been made in a flexible form. Devices that use flexible displays have many advantages, such as being portable, bendable, and optionally deformable. However, the resistance of the metal wires inside the flexible backplane is easy to change greatly and even break in a bending state, thereby affecting the service life of the screen body.
To solve the problem of wire breakage, CN203025453U discloses an array substrate and a display device as shown in fig. 1, wherein a metal layer 1 is provided with a zigzag shape at the metal wire overlapping part to prevent the metal layer 2 from breaking when climbing a slope. This patent only solved the fracture problem when the wire climbed, but the wire still can have the fracture problem when carrying out the repeated bending.
Disclosure of Invention
Therefore, the present invention provides a flexible conductive wire, which solves the problem that the resistance of a metal wire inside a flexible backplane in the prior art is prone to be greatly changed or even broken in a bending state. The resistivity of the flexible conductive wire can be kept stable in the bending process, and the service life of the flexible backboard is prolonged.
In order to solve the technical problems, the invention adopts the following technical scheme:
a method of making a flexible conductive wire comprising the steps of:
s11: preparation of microsphere Dispersion
Adding the microspheres into a solvent, and uniformly dispersing to obtain a microsphere dispersion liquid;
s12: preparation of microsphere template arrays
Coating the microsphere dispersion liquid on a substrate, and drying to remove the solvent to obtain a microsphere template array;
s13: depositing metal lines
Depositing a metal layer on the microsphere template, wherein the metal layer filled in the surface of the microspheres and gaps among the microspheres forms a metal film with a net structure;
s14, forming a flexible conductive wire
And after the substrate and the microspheres are removed, etching the metal film with the net structure into the flexible conductive wire with a preset shape.
The step S11 is: adding the microspheres into water or an organic solution, adding a surfactant, and uniformly distributing the microspheres in the solution by ultrasonic oscillation to form a microsphere dispersion solution.
The diameter of the microsphere is 12nm-3 um.
The concentration of the microspheres is 0.01-0.15 wt%.
The microspheres are polystyrene microspheres or silicon dioxide microspheres.
The step S14 is: and ultrasonically oscillating or annealing at high temperature in the solution, removing the microspheres, carrying out vacuum annealing treatment to obtain a metal film with a net structure, and etching the metal film with the net structure into a flexible conductive wire with a preset shape.
The metal layer in step S3 is one or a combination of copper, aluminum, molybdenum, or titanium.
A flexible conductive wire prepared by the preparation method of the flexible conductive wire.
A flexible backplane comprising a flexible substrate and a bottom-gate TFT formed on the flexible substrate, wherein the TFT comprises a gate layer, a gate insulating layer, a polysilicon semiconductor layer, an interlayer insulating layer and a source/drain electrode layer formed on the flexible substrate, and the gate layer and/or the source/drain electrode layer is the flexible conductive line according to any one of claims 1 to 6.
The preparation method of the flexible back plate comprises the following steps:
s21 preparation of gate layer
Preparing a flexible conductive wire as a gate layer according to the method of any one of claims 1-6;
s22, preparing a gate insulating layer, a polysilicon semiconductor layer and an interlayer insulating layer
Depositing a gate insulating layer, a polycrystalline silicon semiconductor layer and an interlayer insulating layer on the gate electrode layer prepared in the step S21, and etching the interlayer insulating layer to form a contact hole so that the polycrystalline silicon semiconductor layer is exposed;
s22, preparing a source drain layer
And preparing a flexible conductive wire as a source electrode and a drain electrode according to the contact hole formed by etching in the step S21 of the method.
A flexible backplane comprising a flexible substrate and a top-gate TFT formed on the flexible substrate, the TFT comprising an active layer, a gate insulating layer, an interlayer insulating layer, a gate layer and a source/drain electrode layer formed on the flexible substrate, the gate layer and/or the source/drain electrode layer being the flexible conductive line according to any one of claims 1 to 6.
The preparation method of the flexible back plate comprises the following steps:
s31, preparing an active layer and a gate insulating layer
Depositing an active layer and a gate insulating layer on a flexible substrate;
s32 preparation of gate layer
Forming a flexible conductive line on said gate insulating layer as a gate layer according to the method of any of claims 1-6;
s33, preparing an interlayer insulating layer
Depositing an interlayer insulating layer on the basis of the step S32, and etching the interlayer insulating layer and the gate insulating layer to form a contact hole so as to expose the active layer;
s34, preparing a source drain layer
And preparing a flexible conductive wire as a source electrode and a drain electrode through the contact hole formed in the step S34 by etching according to the method.
Compared with the prior art, the technical scheme of the invention has the following advantages:
the preparation method of the flexible conductive wire provided by the invention comprises the steps of mixing Polystyrene (PS) microspheres or silicon dioxide (SiO)2) Making array with microsphere, depositing metal layer on the array, removing the microsphere to leave metal film with netted structure, and etching to form metal filmThe film is fabricated into a metal wire. When the flexible back plate is bent, the stress released by the metal wire in repeated bending can be effectively released by adopting the meshed metal wire, so that the service life of the metal wire is prolonged, the bending performance of the flexible back plate is greatly improved, and the service life of the flexible screen body is prolonged.
The invention can control the density of the array arrangement by controlling the concentration of the microspheres, thereby preparing the metal film with the needed shape and the net structure, and then further preparing the metal film into the metal wire by etching.
When the flexible conductive wire is adopted in the flexible backboard provided by the invention, the conductive wire resistance of the TFT cannot be increased violently or broken when the flexible substrate is bent, so that the reliability of the device is improved.
Drawings
FIG. 1 is a schematic diagram of a prior art conductive line structure;
FIG. 2 is a schematic illustration of a microsphere array template;
FIG. 3 is a schematic diagram of a PS polystyrene microsphere array template for preparing a flexible conductive wire;
FIG. 4 is a schematic diagram of a silica microsphere array template for making flexible conductive wires;
FIG. 5 is a schematic view of a bottom gate type TFT structure;
FIG. 6 is a schematic diagram of a top gate TFT structure;
the reference numbers in the figures denote: the structure comprises a flexible substrate 1, a gate layer 2, a gate insulating layer 3, a polycrystalline silicon semiconductor layer 4, an interlayer insulating layer 5, a source drain layer 6, an active layer 7, a metal layer 11, a microsphere 12 and a glass substrate 13.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
This invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concept of the invention to those skilled in the art, and the present invention will only be defined by the appended claims.
Example 1
The preparation method of the flexible conductive wire in the embodiment comprises the following steps:
s11: preparation of microsphere Dispersion
Adding polystyrene microspheres into an organic solvent acetone or directly using deionized water, adding a surfactant Sodium Dodecyl Sulfate (SDS), and then uniformly distributing the microspheres in a solution through ultrasonic oscillation to form a microsphere dispersion solution, wherein the diameter of the microspheres is 10nm-3um, and the concentration of the microspheres in the microsphere dispersion solution is 0.15 wt%;
s12: preparation of microsphere template arrays
Coating the microsphere dispersion liquid on a glass substrate 13 to form a microsphere template array shown in fig. 2, distributing microspheres 12 arranged in an array on the glass substrate 13, and drying to remove a solvent to obtain the microsphere template array; the preparation of flexible conductive wires by PS microsphere template array is shown in fig. 3, and microspheres 12 with different diameters are selected according to the thickness of the metal layer to be produced. The selection rule is as follows: the radius of the PS microspheres is larger than the thickness of the metal layer 11, so that it can be ensured that no metal lines connected together are formed during the deposition of the metal layer 11, as shown in fig. 3, the metal layer 11 formed between the microspheres and the metal layer 11 above the microspheres are disconnected, and thus it is convenient to form metal lines in a grid shape after removing the microspheres. In this example, a 250nm thick metal layer is deposited, and the diameter of the PS microspheres is selected to be 600nm, so that the metal layer deposited on the microspheres and the metal layer deposited between the microspheres during deposition do not form a coherent metal line.
S13: depositing metal lines
Depositing an aluminum metal layer on the microsphere template, wherein the metal layer filled in the surface of the microspheres and gaps among the microspheres forms a metal film with a net structure;
s14, forming a flexible conductive wire
Removing the microspheres by ultrasonic oscillation or high-temperature annealing in a dichloromethane solution, performing vacuum annealing treatment to obtain a metal film with a net structure as shown in figure 4, and etching the metal film with the net structure into a flexible conductive wire with a preset shape. When the flexible conductive wire prepared by the embodiment is applied to the flexible substrate, the conductive wire resistance of the TFT cannot be severely increased or broken when the flexible substrate is bent, and the reliability of the device is improved.
Example 2
The preparation method of the flexible conductive wire in the embodiment comprises the following steps:
s11: preparation of microsphere Dispersion
Adding silicon dioxide microspheres into water or an organic solution, adding a surfactant sodium dodecyl sulfate, and then uniformly distributing the microspheres in the solution through ultrasonic oscillation to form a microsphere dispersion solution, wherein the diameter of the microspheres is 10nm-2um, and the concentration of the microspheres in the microsphere dispersion solution is 0.01 wt%;
s12: preparation of microsphere template arrays
Coating the microsphere dispersion liquid on a glass substrate 13 to form a microsphere template array shown in fig. 2, distributing microspheres 12 arranged in an array on the glass substrate 13, and drying to remove a solvent to obtain the microsphere template array; fig. 4 shows that the flexible conductive wires are prepared by using the silica microsphere template array, silica microspheres with different diameters are selected according to the thickness of a metal layer to be prepared, the diameter of the microsphere 12 can be larger than the thickness of the metal layer 11 or smaller than the thickness of the metal layer 11, for example, the diameter of the silica microsphere in fig. 4 is 150nm, and the thickness of the metal layer is 250 nm.
S13: depositing metal lines
Depositing a copper metal layer on the microsphere template, wherein the metal layer filled in the surface of the microspheres and gaps among the microspheres forms a metal film with a net structure;
s14, forming a flexible conductive wire
A vacuum annealing process is performed on the basis of step S13 to obtain a metal film having a net structure as shown in fig. 4, and the metal film having a net structure is etched into a flexible conductive line having a predetermined shape.
As other embodiments, the deposited metal layer may also be a molybdenum or titanium metal layer, or a combination of several of copper, aluminum, molybdenum, or titanium. When the flexible conductive wire prepared by the embodiment is applied to the flexible substrate, the conductive wire resistance of the TFT cannot be severely increased or broken when the flexible substrate is bent, and the reliability of the device is improved.
Application example 1
As shown in fig. 5, the flexible backplane comprises a flexible substrate 1 and a bottom gate TFT formed on the flexible substrate 1, wherein the TFT comprises a gate layer 2, a gate insulating layer 3, a polysilicon semiconductor layer 4 and a source/drain electrode layer 6 formed on the flexible substrate, and the gate layer 2 and the source/drain electrode layer 6 are the flexible conductive lines. As another embodiment, the TFT may be: the gate layer 2 adopts the flexible conductive line structure prepared in example 1 or example 2, and the source/drain electrode layer 6 adopts a common existing structure; alternatively, the source/drain electrode layer 6 is formed using the flexible conductive line prepared in example 1 or example 2, and the gate electrode layer 2 is formed using a conventional structure.
The gate insulating layer 3 is a stacked structure layer of one or more materials selected from, but not limited to, silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, and titanium oxide, and a silicon oxide layer is preferred in this embodiment; the thickness of the gate insulating layer 3 in this embodiment is
Figure GDA0002000152000000071
As another embodiment of the present invention, the thickness of the gate insulating layer 3 may be set as
Figure GDA0002000152000000072
Can achieve the aim of the invention and belongs to the protection scope of the invention.
The polysilicon semiconductor layer 4 is easily damaged during the patterning of the source/drain electrode layer 6, and for this reason, an interlayer insulating layer 5 is further disposed on the polysilicon semiconductor layer 4 to cover the surface and the side surface of the polysilicon semiconductor layer 4 away from the substrate 1. The interlayer insulating layer is a stacked structure layer of one or more materials selected from but not limited to silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide and titanium oxide, which can achieve the purpose of the invention and belong to the protection of the inventionAnd (3) a range. In this embodiment, the interlayer insulating layer 5 is preferably an etching barrier layer, and the etching barrier layer is preferably a silicon oxide layer with a thickness of
Figure GDA0002000152000000073
In the thin film transistor TFT, the source electrode and the drain electrode are generally formed in the same layer using the same raw material, and for this reason, the layer in which the source electrode and the drain electrode are located is generally referred to as a source/drain layer 6 for convenience of description. The source/drain layer 6 is connected to the source and drain regions of the polycrystalline silicon semiconductor layer 4 through via holes in the interlayer insulating layer 5. In all the drawings of the invention, the positions of the source electrode and the drain electrode can be interchanged.
The preparation method of the flexible backboard comprises the following steps:
s21 preparation of gate layer
Preparing a flexible conductive line as a gate layer according to the method of example 1 or example 2;
s22, preparing a gate insulating layer, a polysilicon semiconductor layer and an interlayer insulating layer
Depositing a gate insulating layer, a polycrystalline silicon semiconductor layer and an interlayer insulating layer on the gate electrode layer prepared in the step S21, and etching the interlayer insulating layer to form a contact hole so that the polycrystalline silicon semiconductor layer is exposed;
s22, preparing a source drain layer
And preparing a flexible conductive line as a source electrode and a drain electrode through the contact hole formed in the step S22 by the method of embodiment 1 or embodiment 2. The glass substrate described in example 1 or example 2 corresponds to the hole wall of the contact hole in this step.
When the flexible substrate prepared by the embodiment is bent, the conductive line resistance of the TFT cannot be increased violently or broken, and the reliability of the device is improved.
Application example 2
As shown in fig. 6, a flexible backplane comprises a flexible substrate 1 and a top gate TFT formed on the flexible substrate 1, wherein the TFT comprises an active layer 7, a gate insulating layer 3, an interlayer insulating layer 5, a gate layer 2 and a source/drain electrode layer 6 formed on the flexible substrate, and the gate layer 2 and/or the source/drain electrode layer 6 are/is the flexible conductive line. As another embodiment, the TFT may be: the gate layer 2 adopts the flexible conductive line structure prepared in example 1 or example 2, and the source/drain electrode layer 6 adopts a common existing structure; alternatively, the source/drain electrode layer 6 is formed using the flexible conductive line prepared in example 1 or example 2, and the gate electrode layer 2 is formed using a conventional structure.
The preparation method of the flexible backboard comprises the following steps:
s31, preparing an active layer and a gate insulating layer
Depositing an active layer and a gate insulating layer on a flexible substrate;
s32 preparation of gate layer
Preparing a flexible conductive line on the gate insulating layer as a gate layer according to the method of embodiment 1 or embodiment 2; the glass substrate described in embodiment 1 or embodiment 2 should be a gate insulating layer in this step;
s33, preparing an interlayer insulating layer
Depositing an interlayer insulating layer on the basis of the step S32, and etching the interlayer insulating layer and the gate insulating layer to form a contact hole so as to expose the active layer
S34, preparing a source drain layer
And preparing a flexible conductive wire as a source and a drain by using the contact hole formed by etching in the step S33 according to the method described in embodiment 1 or embodiment 2. The glass substrate described in example 1 or example 2 corresponds to the hole wall of the contact hole in this step.
When the flexible substrate prepared by the embodiment is bent, the conductive line resistance of the TFT cannot be increased violently or broken, and the reliability of the device is improved.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are within the scope of the invention.

Claims (9)

1. A method for preparing a flexible conductive wire is characterized by comprising the following steps:
s11: preparation of microsphere Dispersion
Adding the microspheres into water or an organic solution, adding a surfactant, and uniformly distributing the microspheres in the solution by ultrasonic oscillation to form a microsphere dispersion solution;
s12: preparation of microsphere template arrays
Coating the microsphere dispersion liquid on a substrate, and drying to remove the solvent to obtain a microsphere template array;
s13: depositing metal lines
Depositing a metal layer on the microsphere template, wherein the metal layer filled in the gaps between the upper surface of the microspheres and the microspheres forms a metal film with a net structure;
s14, forming a flexible conductive wire
And after the substrate and the microspheres are removed, etching the metal film with the net structure into the flexible conductive wire with a preset shape.
2. The method of making a flexible conductive wire according to claim 1, wherein the microspheres have a diameter of 12nm to 3 um.
3. The method of manufacturing a flexible conductive wire according to claim 1 or 2, wherein the concentration of said microspheres is 0.01-0.15 wt%, and said microspheres are polystyrene microspheres or silica microspheres.
4. The method for preparing a flexible conductive wire according to claim 1 or 2, wherein the step S14 is:
and ultrasonically oscillating or annealing at high temperature in the solution, removing the microspheres, carrying out vacuum annealing treatment to obtain a metal film with a net structure, and etching the metal film with the net structure into a flexible conductive wire with a preset shape.
5. The method as claimed in claim 4, wherein the metal layer in step S13 is one or more of Cu, Al, Mo and Ti.
6. A flexible conductive wire produced by the method of any one of claims 1 to 5.
7. A flexible backplane comprising a flexible substrate and a TFT formed on the flexible substrate, wherein the gate layer and/or the source/drain electrode layer of the TFT are flexible conductive lines as claimed in any one of claims 1 to 5.
8. A preparation method of a flexible back plate is characterized by comprising the following steps:
s21 preparation of gate layer
Preparing a flexible conductive wire as a gate layer according to the method of any one of claims 1 to 5;
s22, preparing a gate insulating layer, a polysilicon semiconductor layer and an interlayer insulating layer
Depositing a gate insulating layer, a polycrystalline silicon semiconductor layer and an interlayer insulating layer on the gate electrode layer prepared in the step S21, and etching the interlayer insulating layer to form a contact hole so that the polycrystalline silicon semiconductor layer is exposed;
s22, preparing a source drain layer
Preparing a flexible conductive wire as a source electrode and a drain electrode through a contact hole formed in the step S21 by etching according to the method of any one of claims 1 to 5.
9. A preparation method of a flexible back plate is characterized by comprising the following steps:
s31, preparing an active layer and a gate insulating layer
Depositing an active layer and a gate insulating layer on a flexible substrate;
s32 preparation of gate layer
Forming a flexible conductive line on said gate insulating layer as a gate layer according to the method of any of claims 1-5;
s33, preparing an interlayer insulating layer
Depositing an interlayer insulating layer on the basis of the step S32, and etching the interlayer insulating layer and the gate insulating layer to form a contact hole so as to expose the active layer;
s34, preparing a source drain layer
Preparing a flexible conductive wire as a source electrode and a drain electrode through a contact hole formed in the step S34 by etching according to the method of any one of claims 1 to 5.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1588236A (en) * 2004-10-13 2005-03-02 清华大学 Method for preparing nano dot array of controllable unit size using nano ball template
CN101993032A (en) * 2009-08-14 2011-03-30 京东方科技集团股份有限公司 Method for manufacturing microstructural film pattern and TFT-LCD array substrate
CN102082186A (en) * 2010-10-29 2011-06-01 华南师范大学 Electrode and manufacturing method thereof
CN103180988A (en) * 2010-06-30 2013-06-26 华威大学 Transparent electrodes for semiconductor thin film devices

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102543690A (en) * 2012-01-09 2012-07-04 复旦大学 Method for optimizing metal half contact structure by level de-pinning on local surface of N-type semi-conductor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1588236A (en) * 2004-10-13 2005-03-02 清华大学 Method for preparing nano dot array of controllable unit size using nano ball template
CN101993032A (en) * 2009-08-14 2011-03-30 京东方科技集团股份有限公司 Method for manufacturing microstructural film pattern and TFT-LCD array substrate
CN103180988A (en) * 2010-06-30 2013-06-26 华威大学 Transparent electrodes for semiconductor thin film devices
CN102082186A (en) * 2010-10-29 2011-06-01 华南师范大学 Electrode and manufacturing method thereof

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