CN106873691B - Voltage stabilizer - Google Patents

Voltage stabilizer Download PDF

Info

Publication number
CN106873691B
CN106873691B CN201610857489.3A CN201610857489A CN106873691B CN 106873691 B CN106873691 B CN 106873691B CN 201610857489 A CN201610857489 A CN 201610857489A CN 106873691 B CN106873691 B CN 106873691B
Authority
CN
China
Prior art keywords
voltage
terminal
circuit
reference voltage
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201610857489.3A
Other languages
Chinese (zh)
Other versions
CN106873691A (en
Inventor
小林裕二
中下贵雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ablic Inc
Original Assignee
Ablic Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ablic Inc filed Critical Ablic Inc
Publication of CN106873691A publication Critical patent/CN106873691A/en
Application granted granted Critical
Publication of CN106873691B publication Critical patent/CN106873691B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/561—Voltage to current converters
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/468—Regulating voltage or current wherein the variable actually regulated by the final control device is dc characterised by reference voltage circuitry, e.g. soft start, remote shutdown
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/001—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection limiting speed of change of electric quantities, e.g. soft switching on or off
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • H03K17/163—Soft switching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Power Engineering (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)
  • Electronic Switches (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

The object is to provide a voltage regulator which does not cause a difference between the voltage of an inverting input terminal of an error amplifier circuit and a reference voltage outputted from a reference voltage circuit even when an analog switching transistor for controlling a soft start time is used. The solution is that: a reference voltage circuit that feeds back a reference voltage as a feedback voltage to output the reference voltage; a soft start circuit for outputting a control signal for controlling the reference voltage to linearly increase when the power supply is started; a voltage divider circuit outputting a divided voltage; an error amplification circuit for amplifying and outputting the difference between the reference voltage and the divided voltage; and an output transistor controlled by the output voltage of the error amplification circuit, wherein the reference voltage circuit has an analog switching transistor whose gate is controlled by a control signal, and the output voltage of the analog switching transistor is a feedback voltage.

Description

Voltage stabilizer
Technical Field
The present invention relates to a regulator including a soft start (soft start) circuit.
Background
A conventional voltage regulator including a soft start circuit will be described. Fig. 3 is a circuit diagram showing a conventional voltage regulator 300.
The regulator 300 includes a reference voltage circuit 301, a soft start circuit 302, an error amplification circuit 303, a voltage division circuit 304, an output transistor 305, a ground terminal 306, a power supply terminal 307, and an output terminal 308.
The reference voltage circuit 301 is configured by the constant current circuit 31, NMOS transistors 32 and 33, and a resistor 34, and operates as follows to output a reference voltage VREF.
Since the NMOS transistor 32 is turned OFF immediately after the start-up, the gate voltage of the NMOS transistor 33 is increased by the constant current circuit 31, and the NMOS transistor 33 is turned ON. A current flows through the NMOS transistor 33, thereby generating a voltage at the resistor 34, and the gate voltage of the NMOS transistor 32 is controlled. By feeding back the current from the source terminal of the NMOS transistor 33 to the gate terminal of the NMOS transistor 32, the drain current of the NMOS transistor 33 is adjusted so that the current flowing from the constant current circuit 31 and the drain current of the NMOS transistor 32 become equal to each other, and VREF is generated by the resistor 34.
The soft start circuit 302 is composed of the analog switching transistor 35, the constant current circuits 36 and 37, and the capacitor 38, and operates as follows to output a reference voltage VREF _ SS for soft start.
The constant current circuit 36 charges the capacitor 38, and the voltage of the capacitor 38 rises linearly, thereby controlling the gate voltage of the switching transistor 35. The constant current circuit 37 continues to flow current, and the switching transistor 35 operates as a source follower circuit. Therefore, the reference voltage VREF output from the reference voltage circuit 301 is output from the switching transistor 35 as the soft start reference voltage VREF _ SS which gradually rises from the start-up.
The error amplifier circuit 303 compares VREF _ SS output from the soft start circuit 302 with the divided voltage of the voltage divider circuit 304, and controls the gate voltage of the output transistor 305 so that VREF _ SS and the divided voltage are the same voltage.
In this way, soft start of the regulator can be achieved (see, for example, patent documents 1 and 2).
[ Prior art documents ]
[ patent document ]
Patent document 1: japanese patent laid-open publication No. 2011-152023;
patent document 2: japanese patent laid-open No. 2005-327027.
Disclosure of Invention
[ problem to be solved by the invention ]
However, in the conventional regulator 300, the constant current circuit 37 causes a current of the current value Is to flow through the analog switching transistor 35, and an ON resistance (resistance value Is Ron) Is generated in the switching transistor 35, so that the reference voltage VREF _ SS Is reduced from the reference voltage VREF by a voltage of the component of Is × Ron. That is, if the switching transistor 35 for controlling the soft start time is used between the output of the reference voltage circuit 301 and the error amplification circuit 303, there is a problem that a difference occurs between the inverted input terminal voltage VREF _ SS of the error amplification circuit 303 and the reference voltage VREF due to the ON resistance of the switching transistor 35.
Further, in order to reduce the voltage drop by the switching transistor 35, the ON resistance is reduced by increasing the W length of the switching transistor 35, but the drain-gate capacitance is increased, and when the capacitor 38 is connected from the outside, malfunction due to external noise is likely to occur. When the current value Is of the constant current circuit 37 Is reduced, the node between the error amplifier circuit 303 and the switching transistor 35 becomes Hi-Z, which causes a problem that malfunction due to external noise Is likely to occur.
In view of the above, the present invention provides a voltage regulator that does not cause a difference between the voltage at the inverting input terminal of the error amplifier circuit and the reference voltage output by the reference voltage circuit, even when an analog switching transistor that controls the soft-start time is used.
[ MEANS FOR solving PROBLEMS ] A method for solving the problems
In order to solve the conventional problem, a regulator according to the present invention includes: a power supply terminal for supplying an external power supply voltage; an output terminal that outputs a voltage generated by adjusting the external power supply voltage; a reference voltage circuit configured to feed back a reference voltage as a feedback voltage and output the reference voltage; a soft start circuit for outputting a control signal for controlling the reference voltage to linearly increase when the power supply is started; a voltage dividing circuit that divides a voltage of the output terminal to generate a divided voltage; an error amplification circuit for amplifying and outputting a difference between the reference voltage and the divided voltage; and an output transistor having a gate controlled by the output voltage of the error amplifier circuit and a drain connected to the output terminal, wherein the reference voltage circuit includes an analog switching transistor having a gate controlled by the control signal, and an output voltage of the analog switching transistor is the feedback voltage.
[ Effect of the invention ]
According to the regulator of the present invention, since the analog switching transistor is not provided between the output of the reference voltage circuit and the inverting input terminal of the error amplifying circuit, a difference is not generated between the reference voltage output from the reference voltage circuit and the voltage at the inverting input terminal of the error amplifying circuit, and both can be set to the same potential. Therefore, malfunction due to external noise can be prevented.
Drawings
Fig. 1 is a circuit diagram showing a voltage regulator according to a first embodiment of the present invention.
Fig. 2 is a circuit diagram showing a voltage regulator according to a second embodiment of the present invention.
Fig. 3 is a circuit diagram showing a conventional voltage regulator.
Detailed Description
[ first embodiment ]
Fig. 1 is a circuit diagram of a voltage regulator 100 according to an embodiment of the present invention. The regulator 100 includes: a reference voltage circuit 101; a soft start circuit 102; an error amplification circuit 103; a voltage dividing circuit 104; an output transistor 105; a ground terminal 106 to which a ground voltage is supplied; a power supply terminal 107 to which an external power supply voltage is supplied; and an output terminal 108.
The reference voltage circuit 101 includes a constant current circuit 11, NMOS transistors 12 and 13, an analog switch transistor 15, and a resistor 14.
The soft start circuit 102 includes constant current circuits 16 and 17 and a capacitor 18.
The constant current circuit 11 of the reference voltage circuit 101 is connected between the power supply terminal 107 and the gate terminal of the NMOS transistor 13. The NMOS transistor 12 has a source terminal connected to the ground terminal 106, a drain terminal connected to the gate terminal of the NMOS transistor 13, and a gate terminal connected to the source terminal of the analog switch transistor 15, the constant current circuit 17, and the inverting input terminal of the error amplifier circuit 103. The NMOS transistor 13 has a drain terminal connected to the power supply terminal 107 and a source terminal connected to the ground terminal 106 via the resistor 14. The source terminal of the NMOS transistor 13 is also connected to the drain terminal of the analog switch transistor 15.
The capacitor 18 of the soft start circuit 102 has one end connected to the power supply terminal 107 via the constant current circuit 16 and the other end connected to the ground terminal 106. One end of the capacitor 18 is an output of the soft start circuit 102, and is connected to a gate terminal of the analog switching transistor 15.
The error amplifier circuit 103 has an output connected to the gate terminal of the output transistor 105, and a non-inverting input terminal receiving the divided voltage divided by the resistance of the voltage divider circuit 104. The output transistor 15 has a source terminal connected to the power supply terminal 107 and a drain terminal connected to the ground terminal 106 via the voltage divider circuit 104. The connection point between the output transistor 15 and the voltage divider circuit 104 is connected to the output terminal 108.
Next, the operation of the regulator 100 of the present embodiment will be described.
Immediately after the power supply is started, the NMOS transistor 12 of the reference voltage circuit 101 is in the OFF state, and therefore the gate voltage of the NMOS transistor 13 is in the ON state by the current rise of the constant current circuit 11, but the analog switch transistor 15 is in the OFF state, and therefore feedback is not given to the gate terminal of the NMOS transistor 12, and the gate voltage of the NMOS transistor 12 cannot be controlled.
The analog switching transistor 15 controls a gate voltage by the control voltage CONT generated at the connection point between the constant current circuit 16 and the capacitor 18, which is the output of the soft start circuit 102, and operates as a source follower circuit by flowing a drain current when the gate voltage exceeds a threshold voltage. As a result, the reference voltage VREF generated at the source terminal of the analog switching transistor 15 is fed back to the gate terminal of the NMOS transistor 12 as the feedback voltage VFB. The NMOS transistor 12 is turned ON by the rise of the feedback voltage VFB. That is, the NMOS transistor 12 is fed back at the gate terminal with a voltage added to the ON resistance of the analog switching transistor 15. Then, the reference voltage VREF is generated at the source terminal of the analog switching transistor 15 so that the current flowing from the constant current circuit 11 and the drain current of the NMOS transistor 12 become equal to each other.
In this manner, the reference voltage VREF, which is the output of the reference voltage circuit 101, can be input to the inverting input terminal of the error amplifier circuit 103 as it is. Since the analog switching transistor 15 operates as a source follower circuit, the reference voltage VREF gradually rises at a soft start time determined by the constant current circuit 16 and the capacitor 18.
Further, since there is no problem even if the ON resistance of the analog switching transistor 15 is large, the dimension of the W length can be reduced, and the area can be reduced.
As described above, in the voltage regulator 100 of the present embodiment, since no switching transistor is provided between the output of the reference voltage circuit 101 and the inverting input terminal of the error amplifier circuit 103, the reference voltage VREF output by the reference voltage circuit 103 is input to the inverting input terminal of the error amplifier circuit as it is. That is, the output voltage of the reference voltage circuit 101 and the voltage of the inverting input terminal of the error amplifier circuit do not differ from each other, and both can be set to the same potential.
[ second embodiment ]
Fig. 2 is a circuit diagram showing a voltage regulator 200 according to a second embodiment of the present invention.
In contrast to the regulator 100 shown in fig. 1, the regulator 200 includes a reference voltage circuit 201 instead of the reference voltage circuit 101, and includes a soft start circuit 202 instead of the soft start circuit 102. The other points are the same as those of the regulator 100 shown in fig. 1, and the components in the reference voltage circuit 201 and the soft start circuit 202 are partially the same as those in the reference voltage circuit 101 and the soft start circuit 102 shown in fig. 1, so the same components are denoted by the same reference numerals, and redundant description is omitted as appropriate.
First, the reference voltage circuit 201 includes an analog switch transistor 25 connected between the source terminal of the NMOS transistor 13 and the resistor 14, instead of the analog switch transistor 15 in the reference voltage circuit 101 of fig. 1.
The soft start circuit 202 is configured by removing the constant current circuit 17 from the soft start circuit 102 in fig. 1.
Next, the operation of the voltage regulator 200 according to the second embodiment will be described.
Immediately after the power supply is started, the gate voltage of the NMOS transistor 13 of the reference voltage circuit 201 rises to the ON state as in fig. 1, but since the analog switch transistor 25 is in the OFF state, no current flows through the resistor 14, and no feedback is given to the gate terminal of the NMOS transistor 12. The analog switching transistor 25 controls the gate voltage using the control voltage CONT generated at the connection point between the constant current circuit 16 and the capacitor 18, and operates as a source follower circuit in which a drain current flows when the gate voltage exceeds a threshold voltage. As a result, a current flows through the resistor 14, and the reference voltage VREF generated at the source terminal of the analog switching transistor 25 is fed back to the gate terminal of the NMOS transistor 12 as the feedback voltage VFB. Since the feedback voltage VFB rises, the NMOS transistor 12 is turned ON. Then, the NMOS transistor 13 discharges a drain current that adds to the ON resistance of the analog switch transistor 25 so that the current flowing from the constant current circuit 11 and the drain current of the NMOS transistor 12 become equal to each other. Thus, the reference voltage VREF is generated at the source terminal of the analog switch transistor 25 by the resistor 14 and the drain current of the NMOS transistor 13. In this manner, the reference voltage VREF, which is the output of the reference voltage circuit 201, can be input to the inverting input terminal of the error amplifier circuit 103 as it is.
As described above, in the regulator 200 of the present embodiment, as in the first embodiment, since there is no switching transistor between the output of the reference voltage circuit 201 and the inverting input terminal of the error amplifier circuit 103, it is possible to prevent a difference from occurring between the output voltage of the reference voltage circuit 201 and the voltage of the inverting input terminal of the error amplifier circuit. Further, according to the present embodiment, since the drain current of the NMOS transistor 13 always flows through the analog switching transistor 25, the constant current circuit 17 in the soft start circuit 102 provided to ensure the source follower operation in the regulator 100 of fig. 1 can be omitted, and the area can be reduced compared to the regulator 100.
Although the embodiments of the present invention have been described above, the present invention is not limited to the above embodiments, and it is needless to describe that various modifications can be made without departing from the scope of the present invention.
For example, the NMOS transistor 13 in the above embodiment may be a depletion NMOS transistor, and the resistor 14 may be a saturation-connected MOS transistor, a diode, or another impedance element. In the above-described embodiment, NMOS transistors are used as the analog switching transistors 15 and 25, but PMOS transistors may be used depending on the configuration of the soft start circuit. The soft- start circuits 102 and 202 are not limited to the configuration of the above-described embodiment as long as they can linearly increase the voltage of the gate terminals of the analog switching transistors 15 and 25.
Description of the reference symbols
100. 200, 300 voltage regulators; 101. 201, 301 reference voltage circuit; 102. 202, 302 soft start circuit; 103. 303 an error amplifying circuit; 104. 304 voltage divider circuit; 105. 305 an output transistor; 106. 306 a ground terminal; 107. 307 a power supply terminal; 108. 308 output terminal.

Claims (4)

1. A voltage regulator is characterized by comprising:
a power supply terminal for supplying an external power supply voltage;
an output terminal that outputs a voltage generated by adjusting the external power supply voltage;
a reference voltage circuit configured to feed back a reference voltage as a feedback voltage and output the reference voltage;
a soft start circuit for outputting a control signal for controlling the reference voltage to linearly increase when the power supply is started;
a voltage dividing circuit that divides a voltage of the output terminal to generate a divided voltage;
an error amplification circuit for amplifying and outputting a difference between the reference voltage and the divided voltage; and
an output transistor having a gate controlled by the output voltage of the error amplifier circuit and a drain connected to the output terminal,
the reference voltage circuit has an analog switching transistor whose gate is controlled by the control signal, an output voltage of the analog switching transistor being the feedback voltage,
the reference voltage circuit further includes:
a 1 st NMOS transistor having a drain terminal connected to the power supply terminal via a 1 st constant current circuit, and a source terminal connected to a ground terminal; and
a 2 nd NMOS transistor having a drain terminal connected to the power supply terminal, a gate terminal connected to the drain terminal of the 1 st NMOS transistor, and a source terminal connected to a ground terminal via an impedance element,
the drain terminal of the analog switching transistor is connected to the source terminal of the 2 nd NMOS transistor, the source terminal is connected to the gate terminal of the 1 st NMOS transistor, and the voltage of the source terminal is the reference voltage.
2. The voltage regulator of claim 1,
the soft start circuit includes:
a capacitor having one end connected to the power supply terminal via a 2 nd constant current circuit and the other end connected to the ground terminal; and
a 3 rd constant current circuit connected between the source terminal of the analog switching transistor and the ground terminal,
the control signal is a signal generated at the one end of the capacitor.
3. A voltage regulator is characterized by comprising:
a power supply terminal for supplying an external power supply voltage;
an output terminal that outputs a voltage generated by adjusting the external power supply voltage;
a reference voltage circuit configured to feed back a reference voltage as a feedback voltage and output the reference voltage;
a soft start circuit for outputting a control signal for controlling the reference voltage to linearly increase when the power supply is started;
a voltage dividing circuit that divides a voltage of the output terminal to generate a divided voltage;
an error amplification circuit for amplifying and outputting a difference between the reference voltage and the divided voltage; and
an output transistor having a gate controlled by the output voltage of the error amplifier circuit and a drain connected to the output terminal,
the reference voltage circuit has an analog switching transistor whose gate is controlled by the control signal, an output voltage of the analog switching transistor being the feedback voltage,
the reference voltage circuit further includes:
a 1 st NMOS transistor having a drain terminal connected to the power supply terminal via a 1 st constant current circuit, and a source terminal connected to a ground terminal;
a 2 nd NMOS transistor having a drain terminal connected to the power supply terminal and a gate terminal connected to a drain terminal of the 1 st NMOS transistor; and
an impedance element connected between the gate terminal of the 1 st NMOS transistor and the ground terminal,
the drain terminal of the analog switching transistor is connected to the source terminal of the 2 nd NMOS transistor, the source terminal is connected to the impedance element, and the voltage of the source terminal is the reference voltage.
4. The voltage regulator of claim 3,
the soft start circuit includes:
a capacitor having one end connected to the power supply terminal via a 2 nd constant current circuit and the other end connected to the ground terminal,
the control signal is a signal generated at the one end of the capacitor.
CN201610857489.3A 2015-09-29 2016-09-28 Voltage stabilizer Expired - Fee Related CN106873691B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015-191875 2015-09-29
JP2015191875A JP6549008B2 (en) 2015-09-29 2015-09-29 Voltage regulator

Publications (2)

Publication Number Publication Date
CN106873691A CN106873691A (en) 2017-06-20
CN106873691B true CN106873691B (en) 2020-10-16

Family

ID=58409098

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610857489.3A Expired - Fee Related CN106873691B (en) 2015-09-29 2016-09-28 Voltage stabilizer

Country Status (5)

Country Link
US (1) US10114393B2 (en)
JP (1) JP6549008B2 (en)
KR (1) KR20170038158A (en)
CN (1) CN106873691B (en)
TW (1) TWI681277B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7206630B2 (en) * 2018-05-08 2023-01-18 株式会社デンソー suppression circuit
JP2020135372A (en) * 2019-02-19 2020-08-31 ローム株式会社 Power supply circuit

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005327027A (en) * 2004-05-13 2005-11-24 Seiko Instruments Inc Overshoot control circuit for voltage regulator
JP5684987B2 (en) 2010-01-25 2015-03-18 セイコーインスツル株式会社 Switching regulator
JP5695392B2 (en) * 2010-03-23 2015-04-01 セイコーインスツル株式会社 Reference voltage circuit
JP5581921B2 (en) * 2010-09-09 2014-09-03 ミツミ電機株式会社 Regulator and DC / DC converter
EP3002659B8 (en) * 2013-10-07 2023-06-28 Renesas Design Germany GmbH Circuits and method for controlling transient fault conditions in a low dropout voltage regulator
CN103901934B (en) * 2014-02-27 2016-01-06 开曼群岛威睿电通股份有限公司 Reference voltage generating device
US9190988B1 (en) * 2014-07-31 2015-11-17 Freescale Semiconductor, Inc. Power management system for integrated circuit
TWI535166B (en) * 2014-10-23 2016-05-21 智原科技股份有限公司 Voltage regulator with soft-start circuit

Also Published As

Publication number Publication date
KR20170038158A (en) 2017-04-06
JP2017068472A (en) 2017-04-06
TW201721324A (en) 2017-06-16
CN106873691A (en) 2017-06-20
JP6549008B2 (en) 2019-07-24
US20170090496A1 (en) 2017-03-30
US10114393B2 (en) 2018-10-30
TWI681277B (en) 2020-01-01

Similar Documents

Publication Publication Date Title
KR102247122B1 (en) Voltage regulator and electronic apparatus
US20140253076A1 (en) Voltage regulator
US20130113454A1 (en) Signal generating circuit
KR102255543B1 (en) Voltage regulator
JP6785736B2 (en) An electronic circuit that reduces undershoot of the output of the voltage regulator
US10061334B2 (en) Voltage regulator
US20060132240A1 (en) Source follower and current feedback circuit thereof
JP6354720B2 (en) Regulator circuit with protection circuit
US20170220059A1 (en) Regulator circuit
US10331152B2 (en) Quiescent current control in voltage regulators
US9323262B2 (en) Voltage regulator
TWI672572B (en) Voltage Regulator
CN106873691B (en) Voltage stabilizer
US20140253068A1 (en) Voltage regulator
US10078343B2 (en) Output circuit
CN111585552B (en) Output driver circuit
CN110297515B (en) Voltage regulator
JP2017041968A (en) Power supply apparatus and control method for the same
EP2806329A2 (en) Circuit for voltage regulation
CN106716833B (en) Starting circuit
US20160224044A1 (en) Voltage dropping circuit and integrated circuit
US10355648B2 (en) Regulator amplifier circuit for outputting a fixed output voltage independent of a load current
US11507123B2 (en) Constant voltage circuit
US20230095863A1 (en) Power supply circuit
US20230095062A1 (en) Power supply circuit

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
CB02 Change of applicant information
CB02 Change of applicant information

Address after: Chiba County, Japan

Applicant after: ABLIC Inc.

Address before: Chiba County, Japan

Applicant before: DynaFine Semiconductor Co.,Ltd.

SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20201016