CN106872872B - Chip test vector conversion method - Google Patents

Abstract

The invention discloses a method for converting PATTERN of T2000 test system into PATTERN of J750 test system, which adopts special file processing technology to greatly shorten conversion time and avoid spending a large amount of time to modify PATTERN format in platform transplanting process.

Description

Chip test vector conversion method

Technical Field

The invention relates to a PATTERN conversion method for chip testing, belonging to the technical field of semiconductor testing.

Background

The current test of the very large scale integrated circuit chip is an important link in the manufacturing process of the integrated circuit; the structure of the used test system is complex and expensive, before the chip is tested, the model of the test system is firstly determined according to the logic function and performance technical index of the chip, then the test program is developed and the PATTERN (test vector) is converted and tested based on the test system, and meanwhile, the hardware design and manufacture are also carried out; in the process of testing the mass production of chips, the chips are often tested on test systems of different models according to the requirements of capacity, cost and different test items; a chip uses different models of test systems to correspond to different test programs, but the used test PATTERN logic and time sequence are the same, and the PATTERN format and command description are different only due to the difference of the test systems. The PATTERN format is artificially modified, the efficiency is low, the accuracy cannot be guaranteed, the conventional chip test PATTERN file is huge, and the manual operation cannot be realized; the invention aims to provide a simple and efficient method for converting an Edwarden T2000 (a large-scale test system model) test PATTERN into a Tyndax J750 (a large-scale test system model) test PATTERN. The method is suitable for all chips, saves a large amount of manpower, and ensures the correctness of the original PATTERN.

Disclosure of Invention

The invention relates to a PATTERN conversion method for chip testing; the method comprises the following steps:

step one, creating a J750 test system pattern file;

reading a PATTERN header file of the T2000 test system;

step three, converting the header file of the T2000 into a J750 header file format and storing the J750PATTERN file;

reading T2000PATTERN information and commands;

step five, the PATTERN content can be rearranged according to the name of the chip pins or the attributes (input, output and bidirectional) of the pins while the number of the chip pins is determined;

step five, optimizing PATTERN (combining multiple lines into a cycle) when determining each line command, and compressing the file;

step six, storing the information into J750PATTERN after the conversion is finished;

step seven, naming the PATTERN file of J750 according to the PATTERN file of T2000;

step eight, finishing the conversion, and saving the J750PATTERN file;

and finally, after the writing is finished, the file is checked with the converted source file.

The method has the advantages that PATTERN can be optimized (multi-row combination is circulation) when commands of all rows are determined, PATTERN files are compressed, and the PATTERN files and source files are corrected after writing is completed; the method is suitable for conversion of all chips.

Drawings

The following further description is made with reference to the accompanying drawings and specific embodiments:

FIG. 1 is a flow chart of a conversion method

Detailed Description

The invention will be described in more detail below with reference to the accompanying drawings: the flow chart is shown in figure 1:

creating a J750 test system pattern file;

reading a PATTERN header file of a T2000 test system;

converting the header file of T2000 into J750 header file format and storing the header file into J750PATTERN file;

for the different requirements of T2000 and J750 for the patern header file to be converted, the format of the T2000 patern header file:

j750 patern header file format:

the PATTERN subject matter is converted to read T2000PATTERN information and commands, the first is to convert for different command writing methods of the same function in PATTERN for T2000 and J750. Such as "NOP" in T2000 for "tset _ tmld" in J750, etc., are examples of different command writing methods of the same function.

The second is to convert different command formats for the same function in PATTERN for T2000 and J750.

Example 1:

the T2000PATTERN format is as follows:

and the J750PATTERN format is as follows:

example 2:

the T2000PATTERN format is as follows:

the J750PATTERN format is as follows:

the PATTERN content can be rearranged according to the chip pin name or the pin attribute (input, output and bidirectional) while the number of the chip pins is determined;

the PATTERN can be optimized (multiple rows are combined into a cycle) when each row command is determined, and the file size is compressed;

running a conversion program

After the conversion is finished, storing the data into J750 PATTERN;

naming the PATTERN file of J750 according to the PATTERN file format rule of T2000;

after the conversion is finished, saving the J750PATTERN file;

and finally, after the writing is finished, the file is checked with the converted source file.

The method has the bright points that PATTERN can be optimized (multi-row combination is circulation) when commands of all rows are determined, PATTERN files are compressed, and the PATTERN files are corrected with source files after writing is finished. The PATTERN file of the current chip is hundreds of megabytes or even G in size, semiconductor testing is an industry for racing with time, and time overhead reduction is an important highlight of the method. In the invention, only the PATTERN conversion is carried out, and other conversion methods such as time sequence and the like are provided.

Claims (2)

1. A method for converting a chip PATTERN is characterized by comprising the following specific steps:

step one, creating a PATTERN file of a J750 test system;

reading a PATTERN header file of the T2000 test system;

step three, converting the header file of the T2000 into a J750 header file format and storing the J750PATTERN file;

reading T2000PATTERN information and commands;

step five, the PATTERN content can be rearranged according to the name or the attribute of the chip pins while the number of the chip pins is determined;

sixthly, when determining each row of commands, carrying out optimization of combining multiple rows into a cycle on the PATTERN, and compressing the file;

step seven, storing the converted data in J750 PATTERN;

step eight, naming the PATTERN file of J750 according to the PATTERN file format rule of T2000;

step nine, finishing the conversion, and saving the J750PATTERN file.

2. The method for patern conversion on a chip of claim 1, wherein the patern conversion is performed in a collated manner with the source conversion file.

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