CN106872872A

CN106872872A - A kind of chip testing vector conversion method

Info

Publication number: CN106872872A
Application number: CN201510917219.2A
Authority: CN
Inventors: 何超; 孙昕; 石志刚
Original assignee: Beijing Chip Advanced Science And Technology Co Ltd
Current assignee: Zhejiang Quean Technology Co ltd
Priority date: 2015-12-14
Filing date: 2015-12-14
Publication date: 2017-06-20
Anticipated expiration: 2035-12-14
Also published as: CN106872872B

Abstract

The invention discloses a kind of method that PATTERN by T2000 test systems is converted into J750 test systems PATTERN, the process employs special file processing technology, so that conversion time is reduced significantly, it is to avoid devote a tremendous amount of time the form of modification PATTERN during platform transplantation.

Description

A kind of chip testing vector conversion method

Technical field

The present invention relates to a kind of chip testing PATTERN conversion methods, belong to semiconductor test technical field.

Background technology

Current great scale integrated circuit chip testing is an important link in integrated circuit fabrication process；Survey used Test system complex structure and it is expensive, before chip testing, the logic function, performance technologies index first according to chip are true Location survey test system model, then again based on test system exploitation test program, conversion testing PATTERN (test vector), while Also hardware design making etc.；Some chips are often required to according to production capacity, cost, different tests in chip volume production test process The demand of item, selection is tested in different model test system；A kind of chip will using the test system of different model The different test programs of correspondence, but test PATTERN logics used, sequential are identicals, simply because of test system difference PATTERN forms, command description are different.The form of artificial modification PATTERN, efficiency is low, and accuracy cannot also ensure, at present Chip testing PATTERN files it is huge, by hand cannot also realize；What the present invention was solved is exactly that Advantest T2000 is (a kind of big Scale test system model) test PATTERN be converted to Teradyne J750 (a kind of large scale test system model) test A kind of method of the simple efficiency high of PATTERN.The method is applied to all chips, saves a large amount of manpowers, it is ensured that original The correctness of PATTERN.

The content of the invention

The present invention relates to a kind of chip testing PATTERN conversion methods；Step is as follows：

Step one, establishment J750 test system pattern files；

Step 2, reading T2000 test system PATTERN header files；

Step 3, the header file of T2000 is converted into J750 header file formats and is saved in J750PATTERN files；

Step 4, reading T2000 PATTERN information and order；

Step 5, can be by PATTERN contents by chip pin title or pin attribute while determine chip pin quantity (input, output, two-way) is rearranged；

Step 5, (multirow merges into circulation), compressed file can be optimized to PATTERN when determining each line command；

It is saved in J750PATTERN after step 6, EOC；

Step 7, by T2000 pattern file designations J750 PATTERN files；

Step 8, EOC, preserve J750PATTERN files；

Proofreaded with Convert File after the completion of being ultimately written.

The bright spot of the inventive method can optimize (multirow merges into circulation) when being to determine each line command to PATTERN, Proofreaded with source file after the completion of compression PATTERN files, write-in, the method should on IC chip test line With meeting testing requirement, the effect for achieving；The method is applied to the conversion of all chips.

Brief description of the drawings

It is described further with specific embodiment below in conjunction with the accompanying drawings：

Fig. 1 conversion method flow charts

Specific embodiment

The present invention is further detailed in conjunction with the accompanying drawings below：Schematic flow sheet is as shown in Figure 1：

Create J750 test system pattern files；

Read T2000 test system PATTERN header files；

The header file of T2000 is converted into J750 header file formats and is saved in J750PATTERN files；

Different requirements for T2000 from J750 to PATTERN header files are changed, T2000PATTERN header file lattice Formula：

J750PATTERN header file formats：

Conversion PATTERN subject contents, read T2000PATTERN information and order, the first be directed to T2000 with J750 is changed to the different command literary style of identical function in PATTERN.As in T2000 " NOP " in correspondence J750 " tset_ Tmld ", etc., is the example of identical function different command literary style.

It is directed to T2000 and J750 for second to the different command form of identical function in PATTERN, is changed.

Example 1：

T2000PATTERN forms are as follows：

And J750PATTERN forms are as follows：

Example 2：

T2000PATTERN forms are as follows：

J750PATTERN forms are as follows：

Can be (input, defeated by chip pin title or pin attribute by PATTERN contents while determining chip pin quantity Go out, it is two-way) rearranged；

(multirow merges into circulation), compressed file size can be optimized when determining each line command to PATTERN；

Operation conversion program

It is saved in J750PATTERN after EOC；

By the PATTERN files of the PATTERN file formats rule name J750 of T2000；

EOC, preserves J750PATTERN files；

Proofreaded with Convert File after the completion of being ultimately written.

The bright spot of the inventive method can optimize (multirow merges into circulation) when being to determine each line command to PATTERN, Proofreaded with source file after the completion of compression PATTERN files, write-in.The PATTERN files of current chip are all hundreds of million very The size of supreme G, semiconductor test is the industry raced with the time, and time overhead reduction is the important bright spot of this method. Only PATTERN is changed in the present invention, separately has conversion method as sequential etc..

Claims

1. a kind of chip PATTERN conversion methods, it is characterised in that concretely comprise the following steps：

Step one, establishment J750 test system PATTERN files.

Step 2, reading T2000 test system PATTERN header files.

Step 3, the header file of T2000 is converted into J750 header file formats and is saved in J750 PATTERN files.

Step 4, reading T2000PATTERN information and order.

Step 5, PATTERN contents can be carried out by chip pin title or pin attribute while determine chip pin quantity Rearrange.

Step 5, PATTERN can be optimized when determining each line command, compressed file.

It is saved in J750PATTERN after step 6, EOC.

Step 7, by T2000 PATTERN file designations J750 PATTERN files.

Step 8, EOC, preserve J750PATTERN files.

2. a kind of chip PATTERN conversion methods according to claim 1, it is characterised in that after PATTERN is converted Proofreaded with Convert File.