CN106844270B - A kind of circuit and method of automatic identification and configuration I2C interface circuit logic level - Google Patents
A kind of circuit and method of automatic identification and configuration I2C interface circuit logic level Download PDFInfo
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- CN106844270B CN106844270B CN201710120112.4A CN201710120112A CN106844270B CN 106844270 B CN106844270 B CN 106844270B CN 201710120112 A CN201710120112 A CN 201710120112A CN 106844270 B CN106844270 B CN 106844270B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
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Abstract
The invention discloses the circuits and method of a kind of automatic identification and configuration I2C interface circuit logic level.Logic level variable interface circuit in the present invention, default work in the logic level of main control chip, can be according to configuration work in Different Logic level standard；Automatic comparison module is triggered, default is the built-in comparator module of main control chip, can be automatically performed the logic level standard determination of I2C interface according to the triggering enable signal that MCU is sent；Whether MCU master control core logic, control I2C automatic identification and configuration logic work.The present invention reduces system costs, improve flexibility and ease of use.
Description
Technical field
The invention belongs to integrated circuit I2C interface technical field, in particular to a kind of Different Logic level integrated circuit I2C
The logic level adaptive configuration circuit and method of interface.
Background technique
With the development of integrated circuit technique, the performance of electronic product especially mobile phone is more and more stronger, and power consumption is increasing,
In order to reduce power consumption, performance is improved, chip manufacturing uses the advanced process such as 10nm/16nm, and the logic level of I/O interface
It is lower and lower, current universal LVCOMS 1.8V.
In complete machine application system, other than application primary processor AP, there are also some peripheral hardware main control MCUs, such as battery metering,
Detection, management IC etc., because of reasons such as its die area are small, performance requirement is not high, cost performance is worse instead on advanced process,
Compare and be suitble to produce in the technique of 180nm or so line width, I/O interface voltage standard is generally in LVCMOS 3.3V.
In complete machine application system, usually passes through I2C bus using primary processor AP and peripheral hardware main control MCU communicates, main process task
Device AP and the interface logic level standard of peripheral hardware main control MCU are different, there are problems that level conversion.
Presently disclosed method has between the different interface of both logic levels using logic level transition chip
Or simple electric resistance partial pressure logic realizes level conversion, for example uses the TXS0108E of TI, as shown in Figure 1, still system in this way
System needs additionally to increase a chip, improves cost；It is adopted in the i.MX6SL similar to Freescale still an alternative is that using
Method, general purpose I/O power supply have the two POWER GROUP of NVCC33_IO and NVCC18_IO, and the two POWER
GROUP needs to power on hardware, is then determined by configuration register using that POWER GROUP, to select phase
The interface logic level standard answered, this method needs two external power supplies, while the selection of logic level is not adaptive.
Summary of the invention
It is an object of the present invention to inconsistent in order to solve the I/O logic level of I2C communication bus between different chips
Problem, the invention proposes the circuits and method of a kind of I2C interface logic level automatic identification and configuration, pass through the circuit and side
Method, application system can be increased without logic level transition chip or the supply of additional multiple power supplies, reduce system cost, mention
Height be using flexibility and convenience.
To achieve the goals above, technical scheme is as follows:
A kind of circuit of automatic identification and configuration I2C interface circuit logic level, which includes:
Logic level variable interface circuit, default work in the logic level of MCU main control chip, can be according to configuration work
Make in Different Logic level standard, built-in Different Logic level generation module.
Automatic comparison module is triggered, the built-in comparator module as main control chip is defaulted, can be sent according to MCU
Enable signal is triggered, the logic level standard determination of I2C interface is automatically performed.
Whether MCU master control core logic module, control I2C automatic identification and configuration logic work.
After MCU electrification reset, logic level variable interface circuit defaults work in chip operating voltage VDD33, i.e. work
Make in LVCMOS 3.3V interface logic level standard, and defaults as input pin.
Enabling pulse is triggered when MCU master control is sent to the automatic comparison module of triggering, then triggers automatic comparison module and meets I2C
Mouthful (SCL or SDA) signal and several level at built-in reference end successively compared with, latch comparison result, determine I2C interface and believe
Logic level standard used by number, and export configuration signal and logic level variable interface circuit is made to work in application system
The logic level of I2C interface.
A kind of method of automatic identification and configuration I2C interface circuit logic level, comprising the following steps:
Step 1, triggering are compared: after MCU is powered on, I2C interface SCL and SDA are defaulted as inputting, according to real-life program need
It wants, issues triggering enabling pulse signal to automatic comparison module is triggered.
Step 2, automatic identification: automatic trigger comparison module gradually selects the sequence according to reference level from low to high
Internal several reference levels latch final comparison result compared with I2C interface signal level, determine I2C interface signal and patrol
Collect level；The result of locking can remain unchanged in chip operation, and after only system resets again, being again started up triggering can just be weighed
New identification decision locking.
Step 3 automatically configures: logic level variable interface circuit will be according to the I2C interface signal logic level determined
As a result, configuration interface circuit level logic standard, so that I2C interface logic level one used in interface circuit and system
It causes.
Beneficial effects of the present invention: the present invention completes the automatic identification and configuration of I2C interface level, reduce system at
This, improves flexibility and ease of use.
Detailed description of the invention
Fig. 1 is the structural schematic diagram that the prior art uses logic level transition chip to be implemented；
Fig. 2 is the structural schematic diagram that the present invention is implemented；
Fig. 3 is the automatic comparison schematic diagram of triggering that the present invention is implemented；
Fig. 4 is the flow chart of automatic identification and method that the present invention is implemented.
Specific embodiment
Below in conjunction with drawings and examples, the invention will be further described.
In order to make the purpose of the present invention, technical solution and advantage are more clearly understood, below in conjunction with attached drawing and embodiment,
The present invention is further described in detail.It should be appreciated that specific embodiment described herein is only used to explain this hair
It is bright, it is not intended to limit the present invention.
As shown in Fig. 2, the circuit in the present invention includes logic level variable interface circuit, trigger automatic comparison module and
MCU master control core logic module.
The logic level variable interface circuit, logic built level-variable IO level shift circuit, matches
It sets interface signal and is connected with the judgement latch result for triggering automatic comparison module, different configuration correspondences works in LVCMOS
One of the two interface logic level standards of 3.3V or LVCMOS 1.8V, default work in the logic level of MCU main control chip
LVCMOS 3.3V。
The automatic comparison module of the triggering, as shown in figure 3, common built-in comparator mould of its default as main control chip
Block uses, and with triggering enable signal interface and determines that result latches interface, triggers in enable signal interface and MCU master control
Core logic hair control signal connects, and determines that result latch signal exports and gives MCU master control core logic, while also logic level is variable
Interface circuit is connected.Its built-in bleeder circuit, as the reference source compared with SCL or SDA interface signal.
Whether MCU main control chip core logic module, control I2C interface automatic identification and configuration logic work.
A kind of method of automatic identification and configuration I2C interface circuit logic level, as shown in Figure 4, comprising the following steps:
Step 1, triggering are compared: after MCU is powered on, default I2C interface SCL and SDA are input, according to real-life program need
It wants, issues triggering enabling pulse signal to automatic comparison module is triggered.
Step 2, automatic identification: automatic trigger comparison module receives the triggering enabling pulse letter that MCU master control kernel is sent
Number, gradually select internal two reference levels compared with I2C interface signal level, if interface level but is below higher than 1.5V
2.1V is then determined as that LVCOMS 1.8V level standard, interface level are higher than 2.1V, are then determined as LVCOMS 3.3V level mark
Standard, and final comparison result is latched, determine I2C interface signal logic level；The result of locking can be kept in chip operation
Constant, after only system resets again, judgement locking can just be re-recognized by being again started up triggering.
Step 3 automatically configures: it is variable to be connected to logic level for the judgement consequential signal that automatic trigger comparison module latches
The configuration input terminal of interface circuit, logic level variable interface circuit control internal variable IO level according to configuration signal
Shift circuit works in selected interface circuit level logic standard, so that interface circuit connects with I2C used in system
Mouth logic level is consistent.
It normally starts to work in system, SCL and SDA interface direction can be configured to input according to actual needs or export.
To sum up, the logic level variable interface circuit in the present invention, default work in the logic level of main control chip, can be with
According to configuration work in Different Logic level standard；Automatic comparison module is triggered, default is the built-in comparator mould of main control chip
Block can be automatically performed the logic level standard determination of I2C interface according to the triggering enable signal that MCU is sent.In MCU master control
Whether core logic, control I2C automatic identification and configuration logic work；After MCU electrification reset, logic level variable interface circuit
Default works in chip operating voltage VDD33, that is, works in LVCMOS 3.3V interface logic level standard, and default conduct
Input pin.Enabling pulse is triggered when MCU master control is sent to the automatic comparison module of triggering, then triggers automatic comparison module for I2C
Interface (SCL or SDA) signal and several level at built-in reference end successively compared with, latch comparison result, determine I2C interface
Logic level standard used by signal, and export configuration signal and logic level variable interface circuit is made to work in application system
The logic level of I2C interface.
The above be preferred embodiments of the invention, be not intended to limit the invention, it is all the present invention spirit with
Any modifications, equivalent replacements, and improvements done within principle etc. should all be included in the protection scope of the present invention.
Claims (5)
1. the circuit of a kind of automatic identification and configuration I2C interface circuit logic level, it is characterised in that the circuit includes:
Logic level variable interface circuit, configuration interface signal and the judgement latch result interface phase for triggering automatic comparison module
Even, logic level variable interface circuit defaults work in the logic level of MCU main control chip, according to configuration work in Different Logic
Level standard, built-in Different Logic level generation module；
Automatic comparison module is triggered, defaults and is used as the built-in comparator module of MCU main control chip, and there is triggering to make
It can signaling interface and judgement result latch interface, the control signal of triggering enable signal interface and MCU master control core logic module
End connects, and determines that result latch signal interface is connected with MCU main control chip core logic module；Trigger automatic comparison module according to
The triggering enable signal that MCU main control chip is sent is automatically performed the logic level standard determination of I2C interface；
Whether MCU main control chip core logic module, control I2C interface automatic identification and configuration logic work；
After MCU main control chip electrification reset, logic level variable interface circuit defaults work in main control chip operating voltage
VDD33, and default as input pin；
Enabling pulse is triggered when MCU main control chip is sent to the automatic comparison module of triggering, then triggers automatic comparison module and meets I2C
Message number and several level at built-in reference end successively compared with, latch comparison result, determine and patrolled used by I2C interface signal
Level standard is collected, and exports the logic that configuration signal makes logic level variable interface circuit work in application system I2C interface
Level.
2. circuit as described in claim 1, it is characterised in that: logic level interface adjusted circuit can according to configuration information,
LVCMOS 3.3V, LVCMOS 2.5V and LVCMOS 1.8V interface logic level standard are worked in respectively.
3. circuit as described in claim 1, it is characterised in that: triggering automatic comparison module includes triggering control, compares control,
As a result latch and automatically configure function；Its default does not enable, and is triggered and is enabled by MCU main control chip, and entirely compares after triggering
Identification configuration process is automatically performed, and does not need MCU main control chip intervention；After the completion of triggering, MCU master control core can still act as
The general comparator that piece is internally integrated uses.
4. a kind of method of automatic identification and configuration I2C interface circuit logic level, it is characterised in that this method includes following step
It is rapid:
Step 1, triggering are compared: after MCU main control chip powers on, according to real-life program needs, to the automatic comparison module of triggering
Issue triggering enabling pulse signal；
Step 2, automatic identification: automatic trigger comparison module is by the sequence according to reference level from low to high, and gradually selection is internal
Several reference levels latch final comparison result compared with I2C interface signal level, determine I2C interface logic power signal
It is flat；
Step 3 automatically configures: the I2C interface signal logic level result that logic level variable interface circuit determines foundation,
Interface circuit level logic standard is configured, so that interface circuit is consistent with I2C interface logic level used in system.
5. the method for automatic identification as claimed in claim 4 and configuration I2C interface circuit logic level, it is characterised in that: open
Dynamic primary triggering identification and with postponing, as a result, locking, after only system resets again, it can just trigger again, it is heavy
New configuration.
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| CN108132902B (en) * | 2018-01-11 | 2020-10-23 | 苏州浪潮智能科技有限公司 | UART-to-USB system and method capable of self-adapting to voltage |
| CN112782569B (en) * | 2019-11-11 | 2023-09-05 | 圣邦微电子（北京）股份有限公司 | Threshold value testing device and method for digital chip pin logic level |
| CN111596960A (en) * | 2020-04-13 | 2020-08-28 | 江苏讯展智能科技有限公司 | Distribution scheme for automatically realizing battery bin address |
| CN114115501B (en) * | 2021-11-01 | 2024-04-02 | 佛山市顺德区美的电子科技有限公司 | Interface voltage control circuit, method, electronic device, and storage medium |
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| CN102629241A (en) * | 2012-03-13 | 2012-08-08 | 华为技术有限公司 | Isolation circuit of inter-integrated circuit (I2C) bus and I2C bus system |
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| CN104915303A (en) * | 2015-06-23 | 2015-09-16 | 北京工业大学 | High-speed digital I/O system based on PXIe bus |
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| CN2859659Y (en) * | 2005-06-14 | 2007-01-17 | 浙江中控电气技术有限公司 | IC interface and main apparatus realizing IC device plug-in and pull-out |
| CN102629241A (en) * | 2012-03-13 | 2012-08-08 | 华为技术有限公司 | Isolation circuit of inter-integrated circuit (I2C) bus and I2C bus system |
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Denomination of invention: A circuit and method for automatically identifying and configuring the logic level of I2C interface circuit Effective date of registration: 20210119 Granted publication date: 20190726 Pledgee: Bank of Hangzhou Limited by Share Ltd. science and Technology Branch Pledgor: HANGZHOU LINGXIN ELECTRONICS Co.,Ltd. Registration number: Y2021330000053 |
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Address after: Room 405, block a, building 1, No. 57, jianger Road, Changhe street, Binjiang District, Hangzhou City, Zhejiang Province Patentee after: Hangzhou Lingxin Microelectronics Co.,Ltd. Address before: 310018 B209, No.2, No.3 street, Hangzhou Economic and Technological Development Zone, Zhejiang Province Patentee before: HANGZHOU LINGXIN ELECTRONICS Co.,Ltd. |