CN106844248B - The method and system of data transmission - Google Patents
The method and system of data transmission Download PDFInfo
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- CN106844248B CN106844248B CN201710082710.7A CN201710082710A CN106844248B CN 106844248 B CN106844248 B CN 106844248B CN 201710082710 A CN201710082710 A CN 201710082710A CN 106844248 B CN106844248 B CN 106844248B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0615—Address space extension
- G06F12/063—Address space extension for I/O modules, e.g. memory mapped I/O
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0646—Configuration or reconfiguration
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Abstract
The invention discloses a kind of data transmission method and systems, send data to host by DMA applied to I/O equipment.This method comprises: calculating index quantity S/P according to preset cache size S and average data packet length P, size I=(S/P) × U of index memory block is then calculated according to the size U of indexing units, and index memory block according to this size application；Quantity N=the S/M for needing the datarams block distributed is calculated according to the size of memory block M according to preset cache size S and every block number, and according to preset data block size M application N block number according to memory block；The size of the start physical address for indexing memory block, the start physical address of length and all datarams blocks and data memory block is written to I/O equipment；It controls I/O equipment and passes through DMA transfer upstream data；Host reads index information and obtains upstream data packet content according to the record of indexing units.The present invention can be improved the success rate of the memory source application of host system and can efficiently use lesser contiguous memory block, to provide more host memory resources for I/O equipment.
Description
Technical field
The present invention relates to field of data transmission, and in particular to the Data Transmission Controlling towards the I/O equipment such as PCIE, mainly
The method and system of memory source distribution management and data transmission are provided for the DMA transfer of the I/O equipment such as PCIE.
Background technique
I/O equipment is when carrying out data transmission, generally using direct memory access (Direct Memory Access, letter
Claim DMA) data in technical transmission I/O equipment, to be achieved independently of the backstage bulk data transfer of CPU.In dma operation
In, host is that dma operation distributes DMA memory address space, and I/O equipment carries out data reading directly on DMA memory address space
It writes, to complete the transmission of dma mode data.Dma operation realizes that I/O equipment sends DMA message to host by DMA message,
It include DMA address in DMA message, DMA address is located on the DMA memory address space that host is distributed by dma operation.Pass through
DMA address in DMA message, I/O equipment can the data on the DMA memory address space directly to host be written and read, have
Body, for example, DMA message is the text of reading the newspaper to memory when host carries out write operation to I/O equipment, data pass through to the reading
One or more order packets of completing that message is responded carry, on from memory copying to I/O equipment；When host to I/O equipment into
When row read operation, the size of data copied as needed, the DMA message that I/O equipment generates is that one or more writes message, is reported
Text carries the data of copy, writes the DMA memory address space that message reaches destination host, the data load in message is copied to
In corresponding memory headroom.Since in dma operation, the process of data transmission is participated in without host CPU, to realize I/
O device is to the independent high-speed read-write of host data.
With the continuous development of computer technology, bandwidth needed for various computer PCI E equipment is also increasing, corresponding
PCIE device is also required to distribute bigger uplink and downlink data buffer storage in host.And previous host is in distribution uplink DMA caching
When be usually that one piece or two pieces biggish contiguous memory of application carries out data buffer storage, but as required caching is increasing,
Conventional method the drawbacks of be also more and more obvious:
Drawback 1: biggish contiguous memory application chance of success is low, once system can not provide expected contiguous memory money
Source is usually unable to get expected cache size then can only reduce size continuation application until applying successfully in this way；
Drawback 2: host system memory source is underutilized, since it is desired that the contiguous memory that application is relatively large, institute
It can not be used, may cause in this way even if there is enough memory sources in system with the lesser contiguous memory block in system,
But also a portion can only be used by corresponding PCIE device.
Summary of the invention
In view of above-mentioned deficiencies of the prior art, the invention proposes one kind for carrying out between I/O equipment and host equipment
The method and data transmission system of DMA data transfer, to improve the success rate of the memory source application of host system and can have
Effect provides more host memory resources using lesser contiguous memory block for I/O equipment.
According to an aspect of the invention, there is provided a kind of data transmission method, the method is applied to I/O equipment and passes through
DMA sends data to host, which comprises
Index quantity S/P is calculated according to preset cache size S and average data packet length P, then according to Index List
The size U of member calculates size I=(S/P) × U of index memory block, and indexes memory block according to this size application；
The datarams block for needing to distribute is calculated according to the size of memory block M according to preset cache size S and every block number
Quantity N=S/M, and according to preset data block size M application N block number according to memory block；
The start physical address of memory block, the start physical address and data of length and all datarams blocks will be indexed
The size of memory block is written to I/O equipment；
It controls I/O equipment and passes through DMA transfer upstream data；
Host reads index information and obtains upstream data packet content according to the record of indexing units.
It include datarams block serial number, data packet initial position where data packet length, data packet in the indexing units
Offset address, indexing units significant notation, indexing units finish the information such as label, wherein
Data packet length is used to record the length information of the corresponding data packet of current indexing units；
Datarams block serial number where data packet, for recording which number is the corresponding data packet of current indexing units be located at
According in memory block；
The offset address of data packet initial position exists for recording the initial position of the corresponding data packet of current indexing units
The byte number that the start address of its datarams block stored deviates backward；
Indexing units significant notation, for indicating whether current indexing units are effective；
Indexing units finish label, for indicating whether the indexing units of next data packet will be retrieved from the beginning；
It, will be current after the host obtains current indexing units corresponding data packet in a kind of possible design
Indexing units significant notation is set in vain, when the I/O equipment is stored in new data packet into datarams block, will currently be indexed
Unit significant notation is set to effectively.
In a kind of possible design, when the significant notation that host checks indexing units to be read is asserted
When, i.e., existed according to the offset address that datarams block serial number and data where the data packet recorded in indexing units package beginning position
The position of corresponding data packet is found in datarams block, and upper line number is then obtained according to the data packet length of indexing units record
According to packet.
In a kind of possible design, after the host obtains data packet, the label that finishes of indexing units is also checked for, if
It finishes and marks effectively, then the label that will finish is set in vain, while the indexing units position of host record checked being changed
For first indexing units；If finishing marked invalid, the indexing units position of host record checked then is changed
For next indexing units.
According to another aspect of the present invention, provide a kind of data transmission system, the system comprises host and with master
The I/O equipment of machine connection, the I/O equipment send data to host by DMA, and the host includes:
Memory application unit is indexed, for calculating index quantity according to preset cache size S and average data packet length P
Then S/P calculates size I=(S/P) × U of index memory block according to the size U of indexing units, and big according to this
Small application indexes memory block；
Datarams application unit, for being calculated according to preset cache size S and every block number according to the size of memory block M
Quantity N=S/the M for the datarams block for needing to distribute, and according to preset data block size M application N block number according to memory block；
Memory Allocation information transmitting unit, for start physical address, length and all data of memory block will to be indexed
The start physical address of memory block and the size of data memory block are written to I/O equipment；
Upstream data reading unit, for reading index information and being obtained in upstream data packet according to the record of indexing units
Hold.
The present invention is not because have to once apply for relatively large continuous physical memory, in so every piece of continuous physical of host application
The successful probability of counterfoil will greatly increase, and the drawbacks of so as to preferably solve the prior art, improve the memory money of host system
The success rate of source application simultaneously can efficiently use lesser contiguous memory block, to be the various I/ including such as PCIE device
O device provides more host memory resources.
Detailed description of the invention
Fig. 1 shows host memory resource map of the invention.
Fig. 2 shows upstream data packets of the invention to fill flow chart.
Fig. 3 shows host data packet of the invention and receives flow chart.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those skilled in the art's every other implementation obtained without creative efforts
Example, shall fall within the protection scope of the present invention.
Since the present invention is applied to carry out uplink DMA data transfer between I/O equipment and host equipment, for convenience to this
The understanding of invention is briefly described the process of DMA write operation in the prior art.DMA write operation may be implemented data
From the DMA memory address that I/O equipment copies destination host to, DMA write operation includes the following steps:
1, according to the dma operation starting request received, it includes DMA that I/O device driver software, which generates an I/O command packet,
Copy command information of the data in I/O equipment to memory, source data address and target memory DMA address on I/O device；
2, I/O device receives the order packet, and the size of data copied as needed generates one or more DMA write report
Text, the destination address of message are memory DMA address, and message carries the data of copy；
3, DMA write message is sent to corresponding channel (generally PCIE link)；
4, DMA write message reaches the physical memory space of host, and the data load in message is copied to corresponding target
On memory DMA address.
Uplink DMA transfer is controlled by I/O equipment in the present invention, host needs to apply two kinds of physical memory blocks: 1) being used to deposit
Store up a fritter continuous physical memory (hereinafter will be simply referred to as index memory block) for data packet description information；2) muti-piece is used to store
Multiple isometric continuous physical memory block messages (hereinafter will be simply referred to as datarams block) of upstream data packet.
The every block size of these memory blocks is all little, and it is 1MB or 2MB that every block number, which recommends size according to memory block,；Index memory
Block size can be calculated according to the average data packet length and data memory block total size of setting, under normal conditions will not be too
Greatly.Because do not have to once apply for relatively large continuous physical memory, so every piece of continuous physical memory block of host application at
The probability of function will greatly increase, and the total size for being used to the data storage area of storing data is in datarams number of blocks × data
Counterfoil size.
After memory source application, need to index the start physical address and length of memory block and all datarams blocks
Degree informs I/O equipment.It, can be suitable according to the transmission of location information of the record of itself when I/O equipment needs to transmit uplink DMA data
Sequence will need the data packet DMA uploaded into some datarams block, and fill out in the index record of newest index memory block
Write relevant information.
Host by read significant notation in index memory block be know the packet information being newly written, and according to
The location information and length information of each latest data packet recorded in index memory block obtain the packet content being newly written.It is main
The memory application situation of machine is as shown in Figure 1.
Embodiment 1:
The present embodiment describes the workflow of data transmission method of the invention in detail, by I/O equipment (such as PCIE hardware
Equipment) control uplink DMA transfer, when host load driver, start-up operation in accordance with the following steps:
Step 1 calculates index quantity according to preset cache size S and average data packet length P, then according to Index List
The size U of member calculates size I(I=(S/P) × U of index memory block), and apply indexing memory first according to this size
Block.
Datarams block serial number, data packet start bit where needing data packet length, data packet in each indexing units
Finish information, the effects of these information such as label of the offset address set, indexing units significant notation, indexing units is as follows:
Data packet length: the length information of the corresponding data packet of current indexing units is recorded；
Datarams block serial number where data packet: it records the corresponding data packet of current indexing units and is located in which data
In counterfoil；
The offset address of data packet initial position: it records the initial position of the corresponding data packet of current indexing units and deposits at it
The byte number that the start address for the datarams block put deviates backward；
Indexing units significant notation: the label is used to indicate whether current indexing units are effective, when host obtains the rope
After drawing the corresponding data packet of unit, it is invalid that this label is set to；When PCIE device is stored in new data packet into datarams block,
This label is set to effectively；
Indexing units finish label: when the data packet of transmission is all bigger so that datarams block has write last block
End can not be written new data packet again, but index the indexing units in memory block there are also it is vacant when, the last one effective rope
The label that finishes for drawing unit, which is set to, effectively indicates that the indexing units of next data packet will be retrieved from the beginning.
Step 2 calculates the data for needing to distribute according to the size of memory block M according to preset cache size S and every block number
The quantity N of memory block, and according to preset data block size M application N block number according to memory block (N=S/M).
Step 3 will index the start physical address of memory block, the start physical address of length and all datarams blocks
Be written to PCIE hardware device with the size of data memory block, allow hardware device know upstream data by DMA where.
Step 4, control PCIE hardware device start to transmit upstream data.
When needing to carry out transmitting uplink data, PCIE hardware device can since index memory block initial address according to
Sequence using each indexing units and will record currently used which indexing units arrived backward one by one；Similarly for memory
Data block be also from the first BOB(beginning of block) in sequence one by one backward using and record currently used datarams block serial number and
The data length filled.It should be noted that every piece of internal storage data block can fill many data packets, including each data packet
Be also in deposit data block since the initial address of internal storage data block sequence fill backward, only when internal storage data block without
When new data packet is written in method, next internal storage data block can be just enabled；
Whenever having a upstream data packet to need to transmit, PCIE hardware device is first according to the currently used of self record
The data length that the serial number of datarams block and the datarams block had been filled with writes the data packet in datarams block, so
Packet information is filled by newest indexing units according to the indexing units service condition of self record afterwards, finally by the index
The significant notation of unit is set to effectively.
Step 5, host read index information and read upstream data packet content according to the record of indexing units.
Host equally will record the position of the indexing units checked, when host checks indexing units to be read
When significant notation is asserted, i.e., packaged according to datarams block serial number and data where the data packet recorded in indexing units
The offset address of beginning position finds the position of corresponding data packet in datarams block, the data then recorded according to indexing units
Packet length may have access to entire data packet.When processing full number is according to Bao Yihou, host is needed the significant notation of indexing units
It is invalid to be set to；At this point, also needing the label that finishes of inspection indexing units, is marked effectively if finished, also need the label that will finish
It is invalid to be set to, and the indexing units position of host record checked needs to be changed to first indexing units；If finishing mark
Note is invalid, then the indexing units position of host record checked then is changed to next indexing units.
Process is filled referring to Fig. 2 upstream data packet that PCIE hardware device is described in detail:
S201, PCIE hardware device power on；
S202, the length records that currently used datarams block serial number and data block are had been filled with to data are reset；
S203, currently used indexing units serial number is recorded into clearing；
S204, host (i.e. host computer) write-in index block address memory, length and multiple datarams block address, length etc.
Information；
Whether S205, PCIE device waiting, which need to transmit upstream data packet, then enters step to host if necessary to transmit
206, otherwise continue waiting for；
S206, PCIE device have been filled with data according to the currently used datarams block serial number and the data block of record
Data packet DMA to specified physical memory, the destination address of DMA are " current data memory block initial address+current data by length
Block has been filled with data length ", the data length of DMA is that the upstream data packet that needs transmit is long；
S207, the offset address of data packet length, data packet place datarams block serial number, data packet initial position is filled out
It is charged in interim indexing units buffer structure and is set to significant notation effectively；
The currently used datarams block of S208, update has been filled with data length record, has been filled with length and increases upper line number
It is grown according to packet；
S209, judge that datarams block size subtracts whether currently used datarams block has been filled with data length record
Less than maximum packet length, if so, going to step S210, step S215 is otherwise gone to；
S210, the length records that datarams block is had been filled with to data are reset；
S211, judge whether currently used datarams block is last block, if so, going to step S212, otherwise
Go to step S213；
S212, currently used datarams block serial number is reset；
S213, currently used datarams block serial number is added 1；
S214, label that the indexing units of interim indexing units buffer structure finish are set to effectively；
S215, by the physical address of the content DMA of interim indexing units buffer structure to currently used indexing units；
S216, judge whether currently used indexing units record number is the last one indexing units, if so, going to
Otherwise step S217 goes to step S218；
S217, currently used indexing units serial number is recorded into clearing, goes to step 205；
S218, currently used indexing units serial number is added 1, goes to step 205.
The detailed process of host reading DMA data is described in detail referring to Fig. 3:
S301, host preparation start to receive upstream data；
S302, software records the indexing units serial number of current check be assigned a value of obtaining from PCIE hardware device and newest write
Enter indexing units serial number；
S303, host check whether current indexing units significant notation is effective, if it is step S305 is executed, otherwise hold
Row step S304；
S304,1 millisecond of current receiving thread suspend mode, go to step S303；
S305, according to the datarams block serial number recorded in indexing units and offset, data packet length acquisition of information data
Packet content；
The current indexing units of S306, host inspection, which finish, to be marked whether effectively, if it is step S309 is executed, otherwise to hold
Row step S307；
Whether the current indexing units of S307, host inspection are the last one, if it is step S309 is executed, are otherwise executed
Step S308；
S308, software records the indexing units serial number of current check add 1, go to step S303；
S309, software records current check indexing units serial number reset, go to step S303.
Embodiment 2:
The present embodiment describes data transmission system of the invention comprising host and the I/O equipment connecting with host.
Wherein, the host includes:
Memory application unit is indexed, for calculating index quantity according to preset cache size S and average data packet length P
Then S/P calculates size I=(S/P) × U of index memory block according to the size U of indexing units, and big according to this
Small application indexes memory block；
Datarams application unit, for being calculated according to preset cache size S and every block number according to the size of memory block M
Quantity N=S/the M for the datarams block for needing to distribute, and according to preset data block size M application N block number according to memory block；
Memory Allocation information transmitting unit, for start physical address, length and all data of memory block will to be indexed
The start physical address of memory block and the size of data memory block are written to I/O equipment；
Upstream data reading unit, for reading index information and being obtained in upstream data packet according to the record of indexing units
Hold.
Data transmission method and system of the invention are described in detail above, those skilled in the art Ying Ming
White, the embodiment of the present invention can provide as method, system or computer program product.Therefore, complete hardware can be used in the present invention
The form of embodiment, complete software embodiment or embodiment combining software and hardware aspects.Moreover, the present invention can be used
One or more wherein includes that (including but not limited to disk is deposited for the computer-usable storage medium of computer usable program code
Reservoir and optical memory etc.) on the form of computer program product implemented.
The present invention be referring to according to the method for the embodiment of the present invention, the process of equipment (system) and computer program product
Figure and/or block diagram describe.It should be understood that every one stream in flowchart and/or the block diagram can be realized by computer program instructions
The combination of process and/or box in journey and/or box and flowchart and/or the block diagram.It can provide these computer programs
Instruct the processor of general purpose computer, special purpose computer, Embedded Processor or other programmable data processing devices to produce
A raw machine, so that being generated by the instruction that computer or the processor of other programmable data processing devices execute for real
The device for the function of being specified in present one or more flows of the flowchart and/or one or more blocks of the block diagram.
These computer program instructions, which may also be stored in, is able to guide computer or other programmable data processing devices with spy
Determine in the computer-readable memory that mode works, so that it includes referring to that instruction stored in the computer readable memory, which generates,
Enable the manufacture of device, the command device realize in one box of one or more flows of the flowchart and/or block diagram or
The function of being specified in multiple boxes.
These computer program instructions also can be loaded onto a computer or other programmable data processing device, so that counting
Series of operation steps are executed on calculation machine or other programmable devices to generate computer implemented processing, thus in computer or
The instruction executed on other programmable devices is provided for realizing in one or more flows of the flowchart and/or block diagram one
The step of function of being specified in a box or multiple boxes.Obviously, those skilled in the art can carry out the present invention various
Modification and variation is without departing from the spirit and scope of the present invention.In this way, if these modifications and changes of the present invention belongs to this hair
Within the scope of bright claim and its equivalent technologies, then the present invention is also intended to include these modifications and variations.
Claims (10)
1. a kind of data transmission method, which is characterized in that the method is applied to I/O equipment and sends data to master by DMA
Machine, which comprises
Index quantity S/P is calculated according to preset cache size S and average data packet length P, then according to indexing units
Size U calculates size I=(S/P) × U of index memory block, and indexes memory block according to this size application；
The number for needing the datarams block distributed is calculated according to the size of memory block M according to preset cache size S and every block number
N=S/M is measured, and according to preset data block size M application N block number according to memory block；
The start physical address of memory block, the start physical address and datarams of length and all datarams blocks will be indexed
The size of block is written to I/O equipment；
It controls I/O equipment and passes through DMA transfer upstream data；
Host reads index information and obtains upstream data packet content according to the record of indexing units；
The control I/O equipment is specific as follows by DMA transfer upstream data:
S201, PCIE hardware device power on；
S202, the length records that currently used datarams block serial number and data block are had been filled with to data are reset；
S203, currently used indexing units serial number is recorded into clearing；
S204, host write-in index block address memory, length and multiple datarams block address, length information；
Whether the waiting of S205, I/O equipment, which needs to transmit upstream data packet, then enters step 206 if necessary to transmit to host,
Otherwise it continues waiting for；
S206, I/O equipment have been filled with the length of data according to the currently used datarams block serial number and the data block of record
By data packet DMA to specified physical memory, the destination address of DMA is that " current data memory block initial address+current data block is
Fill data length ", the data length of DMA is that the upstream data packet that needs transmit is long；
S207, the offset address of data packet length, data packet place datarams block serial number, data packet initial position is filled into
It is set to effectively in interim indexing units buffer structure and by significant notation；
The currently used datarams block of S208, update has been filled with data length record, has been filled with length and increases upstream data packet
Packet length；
S209, judge that datarams block size subtracts currently used datarams block and has been filled with whether data length record is less than
Maximum packet length, if so, going to step S210, otherwise goes to step S215；
S210, the length records that datarams block is had been filled with to data are reset；
S211, judge whether currently used datarams block is otherwise last block is gone to if so, going to step S212
Step S213；
S212, currently used datarams block serial number is reset；
S213, currently used datarams block serial number is added 1；
S214, label that the indexing units of interim indexing units buffer structure finish are set to effectively；
S215, by the physical address of the content DMA of interim indexing units buffer structure to currently used indexing units；
S216, judge whether currently used indexing units record number is the last one indexing units, if so, going to step
Otherwise S217 goes to step S218；
S217, currently used indexing units serial number is recorded into clearing, goes to step 205；
S218, currently used indexing units serial number is added 1, goes to step 205；
The host reading index information is simultaneously specific as follows according to the record of indexing units acquisition upstream data packet content:
S301, host preparation start to receive upstream data；
S302, software records the indexing units serial number of current check be assigned a value of obtaining newest write-in rope from PCIE hardware device
Draw unit number；
S303, host check whether current indexing units significant notation is effective, if it is step S305 is executed, otherwise execute step
Rapid S304；
S304,1 millisecond of current receiving thread suspend mode, go to step S303；
S305, according in the datarams block serial number recorded in indexing units and offset, data packet length acquisition of information data packet
Hold；
The current indexing units of S306, host inspection, which finish, to be marked whether effectively, if it is step S309 is executed, otherwise to execute step
Rapid S307；
Whether the current indexing units of S307, host inspection are the last one, no to then follow the steps if it is execution step S309
S308；
S308, software records the indexing units serial number of current check add 1, go to step S303；
S309, software records current check indexing units serial number reset, go to step S303.
2. data transmission method as described in claim 1, which is characterized in that in the indexing units include data packet length,
Datarams block serial number, the offset address of data packet initial position, indexing units significant notation, indexing units are complete where data packet
The information such as junction mark, wherein
Data packet length is used to record the length information of the corresponding data packet of current indexing units；
Which data are datarams block serial number where data packet, be located in for recording the corresponding data packet of current indexing units
In counterfoil；
The offset address of data packet initial position is deposited for recording the initial position of the corresponding data packet of current indexing units at it
The byte number that the start address for the datarams block put deviates backward；
Indexing units significant notation, for indicating whether current indexing units are effective；
Indexing units finish label, for indicating whether the indexing units of next data packet will be retrieved from the beginning.
3. data transmission method as claimed in claim 2, which is characterized in that when the host obtains current indexing units pair
After the data packet answered, current indexing units significant notation is set in vain, when the I/O equipment is stored in new data packet to data
In memory block, current indexing units significant notation is set to effectively.
4. data transmission method as claimed in claim 2, which is characterized in that the host reads index information and according to index
The record of unit read upstream data packet content specifically,
When the significant notation that host checks indexing units to be read is asserted, i.e., according to being recorded in indexing units
The offset address that datarams block serial number and data where data packet package beginning position finds corresponding data in datarams block
Then the position of packet obtains upstream data packet according to the data packet length of indexing units record.
5. data transmission method as claimed in claim 4, which is characterized in that
After the host obtains data packet, the label that finishes of indexing units is also checked for, is marked effectively if finished, will finish mark
It is invalid that note is set to, while the indexing units position of host record checked is changed to first indexing units；If complete
Junction mark is invalid, then the indexing units position of host record checked then is changed to next indexing units.
6. a kind of data transmission system, which is characterized in that described the system comprises host and the I/O equipment being connect with host
I/O equipment sends data to host by DMA, and the host includes:
Index memory application unit, for according to preset cache size S and average data packet length P calculate index quantity S/
Then P calculates size I=(S/P) × U of index memory block according to the size U of indexing units, and according to this size Shen
It please index memory block；
Datarams application unit, for calculating needs according to the size of memory block M according to preset cache size S and every block number
Quantity N=S/M of the datarams block of distribution, and according to preset data block size M application N block number according to memory block；
Memory Allocation information transmitting unit, for start physical address, length and all datarams of memory block will to be indexed
The start physical address of block and the size of data memory block are written to I/O equipment；
Transmitting uplink data control unit, control I/O equipment pass through DMA transfer upstream data；
Upstream data reading unit, for reading index information and obtaining upstream data packet content according to the record of indexing units；
The control I/O equipment is specific as follows by DMA transfer upstream data:
S201, PCIE hardware device power on；
S202, the length records that currently used datarams block serial number and data block are had been filled with to data are reset；
S203, currently used indexing units serial number is recorded into clearing；
S204, host write-in index block address memory, length and multiple datarams block address, length information；
Whether the waiting of S205, I/O equipment, which needs to transmit upstream data packet, then enters step 206 if necessary to transmit to host,
Otherwise it continues waiting for；
S206, I/O equipment have been filled with the length of data according to the currently used datarams block serial number and the data block of record
By data packet DMA to specified physical memory, the destination address of DMA is that " current data memory block initial address+current data block is
Fill data length ", the data length of DMA is that the upstream data packet that needs transmit is long；
S207, the offset address of data packet length, data packet place datarams block serial number, data packet initial position is filled into
It is set to effectively in interim indexing units buffer structure and by significant notation；
The currently used datarams block of S208, update has been filled with data length record, has been filled with length and increases upstream data packet
Packet length；
S209, judge that datarams block size subtracts currently used datarams block and has been filled with whether data length record is less than
Maximum packet length, if so, going to step S210, otherwise goes to step S215；
S210, the length records that datarams block is had been filled with to data are reset；
S211, judge whether currently used datarams block is otherwise last block is gone to if so, going to step S212
Step S213；
S212, currently used datarams block serial number is reset；
S213, currently used datarams block serial number is added 1；
S214, label that the indexing units of interim indexing units buffer structure finish are set to effectively；
S215, by the physical address of the content DMA of interim indexing units buffer structure to currently used indexing units；
S216, judge whether currently used indexing units record number is the last one indexing units, if so, going to step
Otherwise S217 goes to step S218；
S217, currently used indexing units serial number is recorded into clearing, goes to step 205；
S218, currently used indexing units serial number is added 1, goes to step 205；
The reading index information is simultaneously specific as follows according to the record of indexing units acquisition upstream data packet content:
S301, host preparation start to receive upstream data；
S302, software records the indexing units serial number of current check be assigned a value of obtaining newest write-in rope from PCIE hardware device
Draw unit number；
S303, host check whether current indexing units significant notation is effective, if it is step S305 is executed, otherwise execute step
Rapid S304；
S304,1 millisecond of current receiving thread suspend mode, go to step S303；
S305, according in the datarams block serial number recorded in indexing units and offset, data packet length acquisition of information data packet
Hold；
The current indexing units of S306, host inspection, which finish, to be marked whether effectively, if it is step S309 is executed, otherwise to execute step
Rapid S307；
Whether the current indexing units of S307, host inspection are the last one, no to then follow the steps if it is execution step S309
S308；
S308, software records the indexing units serial number of current check add 1, go to step S303；
S309, software records current check indexing units serial number reset, go to step S303.
7. data transmission system as claimed in claim 6, which is characterized in that in the indexing units include data packet length,
Datarams block serial number, the offset address of data packet initial position, indexing units significant notation, indexing units are complete where data packet
The information such as junction mark, wherein
Data packet length is used to record the length information of the corresponding data packet of current indexing units；
Which data are datarams block serial number where data packet, be located in for recording the corresponding data packet of current indexing units
In counterfoil；
The offset address of data packet initial position is deposited for recording the initial position of the corresponding data packet of current indexing units at it
The byte number that the start address for the datarams block put deviates backward；
Indexing units significant notation, for indicating whether current indexing units are effective；
Indexing units finish label, for indicating whether the indexing units of next data packet will be retrieved from the beginning.
8. data transmission system as claimed in claim 7, which is characterized in that when the host obtains current indexing units pair
After the data packet answered, current indexing units significant notation is set in vain, when the I/O equipment is stored in new data packet to data
In memory block, current indexing units significant notation is set to effectively.
9. data transmission system as claimed in claim 7, which is characterized in that the host reads index information and according to index
The record of unit read upstream data packet content specifically,
When the significant notation that host checks indexing units to be read is asserted, i.e., according to being recorded in indexing units
The offset address that datarams block serial number and data where data packet package beginning position finds corresponding data in datarams block
Then the position of packet obtains upstream data packet according to the data packet length of indexing units record.
10. data transmission system as claimed in claim 9, which is characterized in that
After the host obtains data packet, the label that finishes of indexing units is also checked for, is marked effectively if finished, will finish mark
It is invalid that note is set to, while the indexing units position of host record checked is changed to first indexing units；If complete
Junction mark is invalid, then the indexing units position of host record checked then is changed to next indexing units.
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