CN106817021A - Charge pump circuit - Google Patents
Charge pump circuit Download PDFInfo
- Publication number
- CN106817021A CN106817021A CN201610072649.3A CN201610072649A CN106817021A CN 106817021 A CN106817021 A CN 106817021A CN 201610072649 A CN201610072649 A CN 201610072649A CN 106817021 A CN106817021 A CN 106817021A
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- Prior art keywords
- transistor
- circuit
- stage circuit
- voltage
- diode component
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Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
- H02M3/073—Charge pumps of the Schenkel-type
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
- H02M3/073—Charge pumps of the Schenkel-type
- H02M3/076—Charge pumps of the Schenkel-type the clock signals being boosted to a value being higher than the input voltage value
Abstract
The embodiment provides a kind of charge pump circuit, the charge pump circuit includes sub-circuit, and the sub-circuit is pump stage circuit or output-stage circuit.Sub-circuit includes input, output end, transistor, the first capacitive device, the first diode component and the second diode component.There is transistor the first source/drain (S/D) coupled with input to hold the 2nd S/D ends and gate terminal coupled with output end.First capacitive device has the first end coupled with the gate terminal of transistor and the second end for being configured to receive the first drive signal.First diode component has the negative electrode coupled with the 2nd S/D ends of transistor and the anode coupled with the gate terminal of transistor.Second diode component has the negative electrode coupled with the gate terminal of transistor and the anode coupled with the 2nd S/D ends of transistor.
Description
Technical field
This invention relates generally to technical field of semiconductors, more particularly, to charge pump circuit and its
Operating method.
Background technology
Charge pump circuit is direct current (DC)-(DC) converter, the voltage of the voltage level of its generation
Higher than the voltage level (positive charge pump) of input supply voltage or less than the voltage electricity with reference to ground voltage
Flat (negative charge pump).In some applications, charge pump circuit is included as the electricity of energy storage elements
Container and the transistor as memory transfer element.In some applications, transistor is in response to various
Control signal and on or off, and control signal is subject to input supply voltage and refers to ground voltage
Voltage level limitation.And, by filling for the voltage level on the capacitor to charge pump circuit
Electricity and level shifting operations, each drain/source terminal of transistor have upper shifting or the voltage for moving down.
In some applications, the voltage level of the voltage of each Up/Down is beyond input supply voltage and reference
Voltage range between ground voltage.
The content of the invention
In order to solve the defect in the presence of prior art, according to an aspect of the present invention, there is provided one
Charge pump circuit is planted, including：Sub-circuit, the sub-circuit is pump stage circuit or output-stage circuit, institute
Stating sub-circuit includes：Input；Output end；Transistor, with first coupled with the input
The 2nd S/D ends and gate terminal that source/drain (S/D) end couples with the output end；First
Capacitive device, the first end coupled with the gate terminal with the transistor and be configured to receive
The second end of the first drive signal；First diode component, with the 2nd S/D with the transistor
The anode held the negative electrode of coupling and coupled with the gate terminal of the transistor；And the second diode device
Part, the negative electrode coupled with the gate terminal with the transistor and the 2nd S/D with the transistor
Hold the anode of coupling.
In the charge pump circuit, the sub-circuit is the pump stage circuit, and the sub-circuit also includes：
Second capacitive device, with the first end coupled with the output end and is configured to reception second
The second end of drive signal.
The charge pump circuit also includes：Control circuit, is configured to the first control signal of generation and the second control
Signal processed, wherein, the sub-circuit also includes：First driver, is configured to first control
Signal processed generates first drive signal；And second driver, it is configured to described second
Control signal generates second drive signal.
In the charge pump circuit, first driver be configured to make first drive signal with
Between the corresponding first voltage level of logic-high value and the reference voltage level corresponding with logic low value
Switching；And second driver be configured to make second drive signal with the logic-high value
Cut between corresponding second voltage level and the reference voltage level corresponding with the logic low value
Change, the first voltage level is different from the second voltage level.
In the charge pump circuit, first diode component has forward voltage drop；Described 2nd 2
Pole pipe device has forward voltage drop；And the forward voltage drop of first diode component is more than described the
The forward voltage drop of two diode components.
In the charge pump circuit, first diode component includes being connected as X crystalline substance of diode
Body pipe, X is the positive integer more than zero, and when X is more than 1, the X for being connected as diode
Individual transistor is connected in series；And second diode component includes being connected as Y crystalline substance of diode
Body pipe, Y is the positive integer more than zero and less than X, and when Y is more than 1, it is described to be connected as
Y transistor of diode is connected in series.
In the charge pump circuit, first diode component has forward voltage drop；The transistor
With threshold voltage；And the forward voltage drop of first diode component is more than the threshold of the transistor
Threshold voltage.
In the charge pump circuit, the transistor is N-type transistor.
According to another aspect of the present invention, there is provided a kind of charge pump circuit, including：Input node；
Output node；N number of pump stage circuit, N is the positive integer more than zero, in N number of pump stage circuit
Each pump stage circuit includes：Input；And output end；And output-stage circuit, including input
End and output end；Wherein, the input of the first pump stage circuit in N number of pump stage circuit with it is described
Input node is coupled；N-th output end of pump stage circuit and the N in N number of pump stage circuit
The input coupling of (n+1) the individual pump stage circuit in individual pump stage circuit, n be positive integer and 1≤n≤
(N-1)；The output end and the output stage of the n-th pump stage circuit in N number of pump stage circuit
The input coupling of circuit；The output end of the output-stage circuit is coupled with the output node；And institute
One stated in N number of pump stage circuit also includes：Transistor, the transistor has：First source electrode/
Drain electrode (S/D) end, the input node with N number of pump stage circuit is coupled；2nd S/D
End, the output node with N number of pump stage circuit is coupled；And gate terminal；First electricity
Capacitive device, the first end coupled with the gate terminal with the transistor and is configured to reception
The second end of one drive signal；Second capacitive device, with N number of pump stage circuit in
One output node coupling first end and be configured to receive the second drive signal the second end
Portion；First diode component, the negative electrode coupled with the 2nd S/D ends with the transistor and with
The anode of the gate terminal coupling of the transistor；And second diode component, with the crystal
The negative electrode of the gate terminal coupling of pipe and the anode coupled with the 2nd S/D ends of the transistor.
The charge pump circuit also includes：Control circuit, is configured to generate multiple control signal, wherein,
One in N number of pump stage circuit also includes：First driver, is configured to the multiple control
The first control signal in signal processed generates first drive signal；And second driver, match somebody with somebody
It is set to based on the second control signal in the multiple control signal to generate second drive signal.
In the charge pump circuit, first driver includes the first phase inverter；And described second
Driver includes the second phase inverter.
In the charge pump circuit, first driver be configured to make first drive signal with
Between the corresponding first voltage level of logic-high value and the reference voltage level corresponding with logic low value
Switching；And second driver be configured to make second drive signal with the logic-high value
Cut between corresponding second voltage level and the reference voltage level corresponding with the logic low value
Change, the first voltage level is different from the second voltage level.
In the charge pump circuit, first diode component has forward voltage drop；Described 2nd 2
Pole pipe device has forward voltage drop；And the forward voltage drop of first diode component is more than described the
The forward voltage drop of two diode components.
In the charge pump circuit, first diode component includes being connected as X crystalline substance of diode
Body pipe, X is the positive integer more than zero, and when X is more than 1, the X for being connected as diode
Individual transistor is connected in series；And second diode component includes being connected as Y crystalline substance of diode
Body pipe, Y is the positive integer more than zero and less than X, and when Y is more than 1, it is described to be connected as
Y transistor of diode is connected in series.
In the charge pump circuit, first diode component has forward voltage drop；The transistor
With threshold voltage；And the forward voltage drop of first diode component is more than the threshold of the transistor
Threshold voltage.
In the charge pump circuit, the transistor is N-type transistor.
In the charge pump circuit, the input node is configured to receive reference voltage；And it is described defeated
Egress is configured as output to pump voltage, the electricity of the voltage level less than the reference voltage of the pump voltage
Voltage level.
According to another aspect of the invention, there is provided a kind of pump stage circuit or defeated of operation charge pump circuit
The method for going out grade circuit, methods described includes：In response to the first logical value of control signal, make electric capacity
Voltage level at the first end of property device is from first voltage level transitions to second voltage level；Ring
Second voltage level at the first end of capacitive device described in Ying Yu, makes the capacitive device
Voltage level translation at the second end is to tertiary voltage level, the second end of the capacitive device
Gate terminal with transistor is electrically coupled；And when the transistor turns and the first diode component just
To biasing and when turning on, by first diode component adjust the gate terminal of the transistor with
Source/drain (S/D) end between first voltage it is poor, first diode component with it is described
The anode of the gate terminal coupling of transistor and the negative electrode coupled with the S/D ends of the transistor.
The method also includes：When the transistor cutoff and the second diode component forward bias and
During conducting, by between the S/D ends of second diode component regulation transistor and gate terminal
Second voltage it is poor, second diode component has the sun that is coupled with the S/D ends of the transistor
Pole and the negative electrode coupled with the gate terminal of the transistor.
In the method, first diode component has forward voltage drop；The transistor has threshold
Threshold voltage；And the forward voltage drop of first diode component is more than the threshold voltage of the transistor.
Brief description of the drawings
When reading in conjunction with the accompanying drawings, the present invention may be better understood according to the following detailed description
Various aspects.It is emphasized that the standard practices in industry, various parts are not pressed
Ratio is drawn.In fact, in order to clearly discuss, the size of various parts can be arbitrarily increased or
Reduce.
Fig. 1 is the functional block diagram of the charge pump circuit according to some embodiments.
Fig. 2 is the pump stage (pumping of the charge pump circuit that can be used in Fig. 1 according to some embodiments
Stage) the circuit diagram of circuit.
Fig. 3 is the output-stage circuit of the charge pump circuit that can be used in Fig. 1 according to some embodiments
Circuit diagram.
Fig. 4 is the electricity of the control circuit of the charge pump circuit that can be used in Fig. 1 according to some embodiments
Road schematic diagram.
During Fig. 5 A and Fig. 5 B are pump stage circuit or Fig. 3 for can be used as in Fig. 2 according to some embodiments
Output-stage circuit in diode component two circuit diagrams of exemplary diode device.
Fig. 6 is the electric charge in the Fig. 1 further shown according to combination Fig. 2 to Fig. 4 of some embodiments
The timing diagram of the voltage level on each node of pump circuit.
Fig. 7 is the flow chart of the method for the pump stage circuit in the operation diagram 2 according to some embodiments.
Fig. 8 is the signal generating circuit in the control circuit that can be used for Fig. 4 according to some embodiments
Circuit diagram.
Specific embodiment
Disclosure below provides many different embodiments or examples, for realizing difference of the invention
Feature.The particular instance of component explained below and arrangement is of the invention to simplify.Certainly, these are only
Example and it is not intended to limit the present invention.For example, in the following description, above second component or on
Forming first component can include that first component and second component are formed as the embodiment of directly contact,
The additional component being formed between first component and second component can be included so that first component and second
The embodiment that part is not directly contacted with.In addition, the present invention can in multiple examples repeat reference numerals
And/or character.This repetition is for purposes of simplicity and clarity, and itself not indicate to be discussed
Each embodiment and/or configuration between relation.
Additionally, for the ease of description, herein can using such as " in ... lower section ", " ... under
Face ", " bottom ", " ... above ", the spatial relationship term such as " top " to be describing such as figure institute
The element or part and another element or the relation of part for showing.In addition to the orientation shown in figure,
Spatial relationship term is intended to include the different orientation of the device in use or operating process.Device can be with
(being rotated by 90 ° or in other orientation) otherwise is positioned, and space phase used herein
Relationship description symbol similarly can be explained correspondingly.
According to some embodiments, the pump stage circuit or output-stage circuit of charge pump circuit include transistor,
The capacitive device and the gate terminal of transistor and source/drain coupled with the gate terminal of transistor
(S/D) two diode components between holding.Two diode components are coupled in reverse parallel connection mode.
By the discharge path for being provided and the gate terminal of transistor in two diode components and drive
DC isolation between dynamic signal, the voltage difference between gate terminal and S/D ends remains approximately two two
The forward voltage drop of one in pole pipe device.
Fig. 1 is the functional block diagram of the charge pump circuit 100 according to some embodiments.Charge pump circuit 100
Including：Input node 102；Output node 104；Reference voltage end 106；N number of pump stage circuit 110 [1],
110 [2] and 110 [N]；Output-stage circuit 120；And control circuit 130.N is equal to or more than 1
Positive integer.Used as nonrestrictive example, Fig. 1 shows three pump stage circuits 110 [1], 110 [2]
With 110 [N] (that is, N=3).Pump stage circuit 110 [1], 110 [2] and 110 [N] and output-stage circuit
120 are coupling between input node 102 and output node 104.Control circuit 130 and output node
104 and reference voltage end 106 couple, and be configurable to generate for control pump stage circuit 110 [1],
The multiple control signal SW [1] of the operation of 110 [2] and 110 [N] and output-stage circuit 120, SW [2],
SW [N], SWF, CP [1], CP [2] and CP [N].
Each pump stage circuit in pump stage circuit 110 [1], 110 [2] and 110 [N] includes input
IN, output end OUT and control signal end SW and CP.Output-stage circuit 120 includes input
IN, output end OUT and control signal end SW.The input IN of the first pump stage circuit 110 [1] with
Input node 102 is coupled.The output end OUT of n-th pump stage circuit 110 [n] is individual with (n+1)
The input IN couplings of pump stage circuit 110 [n+1], wherein n is positive integer and 1≤n≤(N-1).
The output end OUT of n-th pump stage circuit 110 [N] is coupled with the input IN of output-stage circuit 120.
The output end OUT of output-stage circuit 120 is coupled with output node 104.
In certain embodiments, pump stage circuit 110 [1], 110 [2] and 110 [N] are configured to save input
There is voltage level V at point 102INVoltage conversion be the predetermined voltage level at output node 104
VOUT.During the steady-state operation of charge pump circuit 100, and ignore transient overshoot or undershoot, pump
Voltage level at the output end OUT of level circuit 110 [1] is in VINWith V1Between switch；Pump stage electricity
Voltage level at the output end OUT on road 110 [2] is in V1With V2Between switch；Pump stage circuit 110 [N]
Input IN at voltage level in VN-2With VN-1Between switch；And pump stage circuit 110 [N]
Output end OUT at voltage level in VN-1With VOUTBetween switch.In certain embodiments,
Voltage level on the output end OUT of pump stage circuit 110 [n] is according to following equation in Vn-1With VnIt
Between switch：
Δ V=VOUT-VN； (1)
V0=VN； (2)
VN=VOUT；And (3)
Vn=VN+ n* (Δ V/N), n are positive integer and 1≤n≤(N-1) (4)
In certain embodiments, voltage level VOUTMore than voltage level VIN, charge pump circuit 100
As positive charge pump, therefore, Δ V have on the occasion of.In certain embodiments, voltage level VOUTIt is small
In voltage level VIN, charge pump circuit 100 be used as negative charge pump, therefore, Δ V has negative value.
Additionally, the control signal end SW of pump stage circuit 110 [1] is configured to receive control signal SW [1]；
And the control signal end CP of pump stage circuit 110 [1] is configured to receive control signal CP [1].Pump stage electricity
The control signal end SW on road 110 [2] is configured to receive control signal SW [2]；And pump stage circuit
110 [2] control signal end CP is configured to receive control signal CP [2].The control of pump stage circuit 110 [N]
Signal end SW processed is configured to receive control signal SW [N]；And the control letter of pump stage circuit 110 [N]
Number end CP be configured to receive control signal CP [N].The control signal end SW of output-stage circuit 120 matches somebody with somebody
It is set to reception control signal SWF.Pump stage circuit 110 [1], 110 [2] is described in detail herein in connection with Fig. 2 and Fig. 6
Illustrative embodiments and behaviour with 110 [N] and output-stage circuit 120 in response to each control signal
Make.
Control circuit 130 is coupled with output node 104 and reference voltage end 106, and is configured as：
Based on the voltage level V at output node 104OUTWith the reference voltage level at reference voltage end 106
VREF, generation multiple control signal SW [1], SW [2], SW [N], SWF, CP [1], CP [2] and
CP[N].In certain embodiments, signal SW [n] and corresponding signal CP [n] has identical waveform.
In certain embodiments, the voltage level pulse width (corresponding to logic-high value) that signal SW [n] has
Different from the voltage level pulse width of corresponding signal CP [n].
In certain embodiments, all odd signals SW [n] all have identical first waveform, and
All even signal SW [n] all have the waveform of identical second.In certain embodiments, first waveform
It is the voltage level corresponding with logic-high value when different with the second waveform, therefore, odd signals SW [n]
It is referred to as non-overlapped signal with even signal SW [n].In certain embodiments, all odd signals CP [n]
All there is the waveform of identical the 3rd, and all even signal CP [n] have the waveform of identical the 4th.
In certain embodiments, it is when the 3rd waveform and the 4th waveform are different and logically high corresponding voltage electricity
It is flat, therefore, odd signals CP [n] and even signal CP [n] are referred to as non-overlapped signal.
Describe illustrative embodiments and the operation of control circuit 130 in detail herein in connection with Fig. 4.
Fig. 2 is the pump stage circuit of the charge pump circuit 100 that can be used in Fig. 1 according to some embodiments
200 circuit diagram.In certain embodiments, pump stage circuit 200 can be used as pump stage circuit 110 [1],
Any one in 110 [2] and 110 [N] or all of pump stage circuit.
Pump stage circuit 200 includes input IN, output end OUT and control signal end SW and CP,
End IN that it corresponds respectively to pump stage circuit 110 [1], 110 [2] in Fig. 1 or 110 [N], OUT,
SW and CP.In order to illustrate, input IN has voltage VS, and output end OUT has voltage
VD.Control signal end SW is configured to receive control signal S1, the control signal is corresponding to control signal
SW [1], SW [2] or SW [N].Control signal end CP is configured to receive control signal S2, the control
Signal corresponds to control signal CP [1], CP [2] or CP [N].
Pump stage circuit 200 includes transistor 210, the first capacitive device 222, the second capacitive device
224th, the first diode component 232, the second diode component 234, the first driver 242 and
Two drivers 244.
Transistor 210 is N-type transistor and as switching device.In certain embodiments, crystal
Pipe 210 is implemented as P-type transistor or other switching devices applicatory.Transistor 210 includes grid
Extreme 212, a S/D ends 214 and the 2nd S/D ends 216.First S/D ends 214 and input
IN is coupled.2nd S/D ends 216 couple with output end OUT.Gate terminal 212 has voltage VG。
First capacitive device 222 has the first end coupled with the gate terminal 212 of transistor 210
And be configured to receive drive signal S3The second end.Second capacitive device 224 has and output
First end and be configured to receive drive signal S that end OUT is coupled4The second end.One or two
Pole pipe device 232 has the negative electrode and and crystal coupled with the 2nd S/D ends 216 of transistor 210
The anode of the coupling of gate terminal 212 of pipe 210.Second diode component 234 has and transistor 210
The coupling of gate terminal 212 negative electrode and the anode that is coupled with the 2nd S/D ends 216 of transistor 210.
First driver 242 is configured to：Based on control signal S1Generation drive signal S3.Second drives
Device 244 is configured to：Based on control signal S2Generation drive signal S4.First driver 242 is anti-phase
Device, it has the input and with capacitive device 222 second coupled with control signal end SW
The output end of end coupling.Second driver 244 is phase inverter, and it has and control signal end CP
The input of coupling and the output end coupled with the second end of capacitive device 224.In some realities
In applying example, the first driver 242 and the second driver 244 be implemented as following device one kind or with
Lower combination of devices：Phase inverter, buffer, level converter or other suitable devices.In some realities
In applying example, signal S1、S2、S3And S4In each signal corresponding with logic-high value
One voltage level (hereinafter referred to as " the first logic high ") and the reference corresponding with logic low value
Switch between ground voltage level (hereinafter referred to as " logic low ").In certain embodiments,
Signal S3And S4In each signal switch between the first logic high and logic low,
And signal S1And S2In each signal in the second voltage level corresponding with logic-high value
(hereinafter referred to as " the second logic high ") switches and logic low between.In some embodiments
In, the second logic high is more than the first logic high.
In diode component forward bias and when turning on, diode component has in its anode and negative electrode
Between forward voltage drop.In certain embodiments, the first diode component 232 has forward voltage drop VFB1,
Second diode component 234 has forward voltage drop VFB2, and forward voltage drop VFB1More than forward voltage drop
VFB2.And, transistor 210 has the threshold voltage V between gate terminal 212 and S/D ends 216TH。
In certain embodiments, forward voltage drop VFB1More than the threshold voltage V of transistor 210TH。
In certain embodiments, diode 232 is configured to：When the forward bias of diode component 232 simultaneously
And during conducting, there is provided the discharge path between gate terminal 212 and S/D ends 216, so that voltage VG
With voltage VDBetween voltage difference be reduced to the forward voltage drop V of no more than diode component 232FB1.
In some embodiments, diode 234 is configured to：When the forward bias of diode component 234 and turn on
When, there is provided the discharge path between gate terminal 212 and S/D ends 216, by voltage VGWith voltage
VDBetween voltage difference be defined to the forward voltage drop V of no more than diode component 234FB2.In some realities
In applying example, as voltage VGWith voltage VDIn response to signal S3And S4Transformation and by capacitive character
The operation of device 222 and 224 and when switching over, diode component 232 and 234 also provides conduction
Path is reducing voltage VGWith voltage VDPeak voltage level.
In operation, diode component 232 and 234 is consequently for ensureing the DC on capacitor 222
Value is in correct scope so that the on or off of transistor 210.
In certain embodiments, diode component 232 includes one or more diodes of series connection, and
And the forward voltage drop V of diode component 232FB1It is the forward direction of each diode in series diode
Pressure drop sum.In certain embodiments, diode component 234 includes one or more two poles of series connection
Pipe, and diode component 234 forward voltage drop VFB2It is each diode in series diode
Forward voltage drop sum.
In operation, capacitive device 222 is to drive signal S3Level conversion is carried out, without
Control signal of the generation with big voltage swing.The part simplifies circuit design and so that is being not required to
Implement charge pump in the case of cost that will be related to high-voltage capability to be possibly realized.Shown with reference to Fig. 6
The concrete operations of each component of pump stage circuit 200.
Fig. 3 is the output stage electricity of the charge pump circuit 100 that can be used in Fig. 1 according to some embodiments
The circuit diagram on road 300.There is phase with the same or similar component of component in Fig. 2 in Fig. 3
Same reference number, therefore omit its detailed description.
Compared with pump stage circuit 200, output-stage circuit 300 does not have control signal end CP and driver
244.Capacitive device 224 is coupling between output end and power source reference end 310.In some embodiments
In, power source reference end 310 has the voltage level corresponding with reference ground voltage level or 0V level.
In certain embodiments, power source reference end 310 has and logic low identical voltage level.
In operation, output-stage circuit 300 is stored at capacitive device 224 and kept from previous
The electric charge of pump stage circuit and at output end OUT output have predetermined pump voltage level (pumped
Voltage level) voltage.The capacitance of the capacitive device 224 in output-stage circuit 300 is set
For sufficiently large keeping while allowing predetermined electric current to export to external circuit predetermined pump electricity substantially
Voltage level.
Fig. 4 is the control circuit of the charge pump circuit 100 that can be used in Fig. 1 according to some embodiments
400 circuit diagram.
Control circuit 400 include feedback voltage end 402, reference voltage end 404, power voltage terminal 408,
Resistive device 412 and 414, comparator 420, signal generating circuit 430 and a plurality of control line
440.In certain embodiments, control circuit 400 includes clock end 406.
Feedback voltage end 402 couples with the output node 104 of charge pump circuit 100.Reference voltage end
404 are configured to receive with reference voltage level VREFReference voltage.Power voltage terminal 408 is configured
To carry the voltage with mains voltage level.In certain embodiments, mains voltage level and first
Logic high or the second logic high are identical.Resistive device 412 and 414 is coupled in series in electricity
Between source voltage end 408 and feedback voltage end 402.Resistive device 412 and 414 is configured to partial pressure
Device, to be feedback voltage by the voltage conversion on output node 104, the feedback voltage has can be with ginseng
Examine voltage level VREFThe voltage level V for comparingFB。
Comparator 420 includes first input end 422, the second input 424 and output end 426.The
One input 422 is configured to receive reference voltage (with reference voltage level VREF).Second input
End 424 is configured to receive feedback voltage (with feedback voltage level VFB).Comparator 420 compares
Reference voltage level VREFWith feedback voltage level VFBValue and being generated at output end 426 compare
As a result.
Signal generating circuit 430 coupled with the output end 426 of comparator 420 and with clock end 406
(if present) is coupled.Signal generating circuit 430 is also by a plurality of control line 440 and pump stage circuit
110 [1], 110 [2] and 110 [N] and output-stage circuit 120 are coupled.Signal generating circuit 430 is configured
It is the comparative result at the output end 426 for receiving comparator 420 and the clock letter from clock end 406
Number CLK, and generated on a plurality of control line 440 control signal SW [1], SW [2], SW [N],
SWF, CP [1], CP [2] and CP [N].In certain embodiments, signal generating circuit 430 is also configured
To receive the clock signal clk from clock end 406.
Control circuit 400 is nonrestrictive example.Can be used for generate control signal SW [1], SW [2],
SW [N], SWF, CP [1], the other kinds of control circuit of CP [2] and CP [N] are all of the invention
In the range of each embodiment, thus pulse width, frequency or amplitude information based on these signals come
Control charge pump circuit 100.
Fig. 8 is the signal generating circuit 430 in the control circuit that can be used as Fig. 4 according to some embodiments
Exemplary signal generative circuit 800 circuit diagram.
Signal generating circuit 800 includes that d type flip flop (DFF) 802 and door 804 and two-phase are non-overlapped
Clock generator 808.DFF 802 includes input end of clock 806 and comparator input terminal 826.Two-phase
Non-overlapping clock generator 808 includes the first output end 810 and the second output end 812.
DFF 802 is configured to receive clock signal clk and defeated in logic at input end of clock 806
To enter received at end 826 comparator output, for example, the comparative result at output end 426.DFF 802
The comparator output for being sampled and being exported sampling is exported to comparator based on clock signal clk.
With comparator output and the clock signal that door 804 is configured to receive the sampling from DFF 802
CLK, and provide gate output to two-phase non-overlapping clock generator 808.In response to the ratio of sampling
Compared with the logic high that device is exported, door controling clock signal is configured as output to door 804.In response to sampling
Comparator output logic low, be configured as output to logic low with door 804.
Two-phase non-overlapping clock generator 808 is configured to receive from the door controling clock signal with door 804,
And as response, the first pulse signal A is created at the first output end 810, and it is defeated second
Go out and the second pulse signal B is created at end 812.In certain embodiments, the first pulse signal A and
Two pulse signal B are used as charge pump control signal SW [i] and CP [i].In certain embodiments, first
The output end 812 of output end 810 and second is coupled with a plurality of control line 440.
In certain embodiments, it is the charge pump control signal of even number value that the first pulse signal A is used as i
SW [i], and it is the charge pump control signal SW [i] of odd number value that the second pulse signal B is used as i.
In certain embodiments, it is the charge pump control signal of odd number value that the first pulse signal A is used as i
CP [i], and it is the charge pump control signal CP [i] of even number value that the second pulse signal B is used as i.
In operation, as feedback voltage level VFBHigher than reference voltage level VREFWhen, signal generation
Circuit 800 is exported by generating the first pulse signal A and the second pulse signal B in response to comparator,
And as feedback voltage level VFBLess than reference voltage level VREFWhen, the signal generating circuit 800
Exported in response to comparator by not generating the first pulse signal A and the second pulse signal B.
Signal generating circuit 800 is nonrestrictive example.Can be used for generate control signal SW [1],
SW [2], SW [N], SWF, CP [1], CP [2] and CP [N] with control charge pump circuit 100 its
The signal generating circuit (including the signal generating circuit without clock signal input) of his type all exists
In the range of each embodiment of the invention.
Fig. 5 A are to can be used as the pump stage circuit 200 of Fig. 2 or the output stage of Fig. 3 according to some embodiments
The circuit of the exemplary diode device 500A of the diode component 232 or 234 in circuit 300 is illustrated
Figure.
Diode component 500A includes anode tap 502, cathode terminal 504 and in anode tap 502 and the moon
Connection between extreme 504 is the J P-type transistor 510 [1] to 510 [J] of diode.J is greater than
Zero positive integer.When J is more than 1, P-type transistor 510 [1] to 510 [J] series coupled.In order that
Implement diode component 232 and diode component 234, two with the configuration based on diode component 500A
Pole pipe device 232 is configured to have X (J=X) transistor 510 [1] for being connected as diode extremely
510 [X], and diode component 234 is configured to have Y (J=Y) being connected as diode brilliant
Body pipe 510 [1] to 510 [Y], wherein X and Y is positive integer.In certain embodiments, diode device
The forward voltage drop V of part 232FB1More than the forward voltage drop V of diode component 234FB2.Therefore, by Y
It is set smaller than X.
Fig. 5 B are to can be used as the pump stage circuit 200 of Fig. 2 or the output stage of Fig. 3 according to some embodiments
The circuit of the another exemplary diode component 500B of the diode component 232 or 234 in circuit 300
Schematic diagram.There is identical with reference to mark with the same or similar component of component in Fig. 5 A in Fig. 5 B
Number, therefore omit its detailed description.
The connection that diode component 500B is included between anode tap 502 and cathode terminal 504 is diode
K N-type transistor 520 [1] to 520 [K].K is greater than zero positive integer.When K is more than 1
When, N-type transistor 520 [1] to 520 [K] series coupled.In order that with based on diode component 500B
Configuration implement diode component 232 and diode component 234, diode component 232 be configured to tool
There are X (K=X) transistor 520 [1] to 520 [X] for being connected as diode, and diode component
234 are configured to have Y (K=Y) transistor 520 [1] to 520 [Y] for being connected as diode, its
Middle X and Y are positive integers.In certain embodiments, the forward voltage drop that diode component 232 has
VFB1More than the forward voltage drop V of diode component 234FB2.Therefore, Y is set smaller than X.
In certain embodiments, diode component 232 is implemented based on the configuration of diode component 500A
With in diode component 234, and two poles are implemented based on the configuration of diode component 500B
Another in tube device 232 and diode component 234.In certain embodiments, with diode
Device 500A different with diode component 500B other kinds of diode component implements diode
Device 232 or diode component 234.
Fig. 6 is the electric charge in the Fig. 1 further shown according to combination Fig. 2 to Fig. 4 of some embodiments
The timing diagram of the voltage level at each node of pump circuit 100.
In the example shown in Fig. 6, the quantity (that is, the digital N in Fig. 1) of pump stage circuit is set
It is 2, and charge pump circuit is configured to negative charge pump.Voltage level VINIt is set to 0V, and electricity
Voltage level VOUTIt is set to -2.2V.Charge pump circuit with reference to shown in Fig. 1 to Fig. 4 also serves as positive electricity
Lotus pump.The different configurations and setting of charge pump circuit 100 are all in the model of each embodiment of the invention
In enclosing.
Waveform 602 corresponds to the signal S of the first pump stage circuit 110 [1]1Voltage level.Waveform 604
Corresponding to the signal S of the first pump stage circuit 110 [1]2Voltage level.Waveform 612 corresponds to the first pump
The voltage V of level circuit 110 [1]DVoltage level.Waveform 614 corresponds to the first pump stage circuit 110 [1]
Voltage VGVoltage level.Waveform 622 corresponds to the voltage V of the second pump stage circuit 110 [2]D's
Voltage level.Waveform 632 corresponds to the voltage V of output-stage circuit 120DVoltage level.
If specifically noted not otherwise, then explanation below is based primarily upon using from Fig. 2
Pump stage circuit 200 reference number the first pump stage circuit 110 [1] operation.Second pump stage circuit
110 [2] and output-stage circuit 120 transistor 210 and capacitive device 222 operation and the first pump stage
The transistor 210 of circuit 110 [1] is similar with the operation of capacitive device 222.Second pump stage circuit
The operation of 110 [2] capacitive device 224 and the capacitive device 224 of the first pump stage circuit 110 [1]
Operation be similar to.Therefore its specific descriptions is omitted.
In this embodiment, signal S1、S2、S3And S4In each signal have 1.8 volts
(V) logic high and the logic low of 0.0V.In certain embodiments, signal S1With
S3In each signal have and signal S2And S4The different logic high of logic high.
In certain embodiments, signal S1And S3In each signal have 2.5V logic high,
And signal S2And S4In each signal have 1.8V logic high.
In time T1During the steady-state operation of charge pump circuit 100 before, the first pump stage circuit 110 [1]
Signal S1(waveform 602) and signal S2(waveform 604) is logic low.Therefore, first
The signal S3 (not shown) and signal S4 (not shown) of pump stage circuit 110 [1] are high level signal.
In this example, the voltage V of the first pump stage circuit 110 [1]DIn from power supply or previous pump stage circuit
Input voltage level at, such as the 0.0V of the first pump stage circuit 110 [1].And, in the reality
In example, the voltage V of the first pump stage circuit 110 [1]GVoltage level add and two equal to input voltage level
The forward voltage drop V of pole pipe device 232FB1(such as VFB1) sum.Because forward voltage drop VFB1
It is set greater than the threshold voltage V of transistor 210TH, so transistor 210 turns on that electricity will be input into
Voltage level (e.g., being in this example 0.0V) is changed to voltage VD。
In time T1Place, signal S1(waveform 602) is converted to high logic level from low logic level.
Signal S2(waveform 604) is still in low logic level.Therefore, signal S3(not shown) is patrolled from height
Collect level transitions to low logic level, and signal S4(not shown) is still high level signal.By
The operation of the capacitive device 222 of one pump stage circuit 110 [1], in time T1Place, the first pump stage circuit
110 [1] voltage VG(waveform 614) is pulled low about 1.8V.Meanwhile, the first pump stage circuit 110 [1]
Diode component 234 also provide discharge path with by voltage VG(waveform 614) and voltage VD(ripple
Shape 612) be pulled to it is close to each other.As the result of these pulling force for opposing, in time T1Place, voltage
VG(waveform 614) is from voltage level VFB1It is converted to than voltage level VFB1Subtract the electricity after 1.8V
The voltage level of voltage level hundreds of millivolts (mV) high.The gate terminal of transistor 210 and transistor 210
S/D ends between voltage difference be insufficient to allow transistor 210 to turn on.Voltage VD(waveform 612) still
In 0.0V.Therefore, transistor 210 ends.
In time T1Afterwards but in time T2Before, by diode component 234 by voltage VG(ripple
Shape 614) and voltage VD(waveform 612) is pulled to close to each other.Transistor 210 still ends.One
In a little embodiments, time T1With time T2Between time period be arranged to be not enough to voltage VGDraw
It is extremely sufficiently large so that transistor 210 is in time T2Place's conducting.In certain embodiments, time T1With when
Between T2Between time period it is sufficiently small so that voltage VGThe voltage level or voltage of (waveform 614)
VDThe voltage level of (waveform 612) is less than 100mV.
In time T2Place, signal S2(waveform 604) is converted to high logic level from low logic level.
Signal S1(waveform 602) is still in high logic level.Therefore, signal S4(not shown) is patrolled from height
Collect level transitions to low logic level, and signal S3(not shown) is still low level signal.By electricity
The operation of capacitive device 224, in time T2Place, voltage VD(waveform 612) is pulled low about 1.8V.
Meanwhile, in this example, by another capacitive character device of capacitive device 224 and next pump stage circuit
Part (e.g., the capacitive device 224 of the second pump stage circuit 110 [2]) or corresponding output-stage circuit 120
Another capacitive device (e.g., the capacitive device 224 of output-stage circuit 120) between share
Electric charge, voltage VDIt is also pulled to the steady state output voltage level of the pump stage, such as, -1.1V.One
In a little embodiments, also by adjust control signal SW [1], SW [2], SW [N], SWF, CP [1],
The frequency of CP [2] and CP [N] and/or by Regulate signal S4Voltage level control shared electric charge.
Time T when diode component 234 is changed into reverse bias from conducting2Place, voltage VG(waveform 614)
By somewhat drop-down.As a result, in time T2Place, voltage VD(waveform 612) is converted to ratio from 0.0V
The voltage level of voltage level hundreds of mV high of -1.8V.Transistor 210 still ends.
In time T2Afterwards but in time T3Before, diode component 232 and 234 cut-off after and
After reaching its charge balance state, voltage VG(waveform 614) still in about the same voltage
At level.Voltage VD(waveform 612) is pulled down, then still in steady state output voltage level (e.g.,
It is in this example -1.1V).In this example, VGVoltage level be more than VDVoltage level,
But the voltage difference between them is insufficient to allow transistor 210 to turn on.Transistor 210 still ends.
In time T3Place, signal S2(waveform 604) is converted to low logic level from high logic level.
Signal S1(waveform 602) is still in high logic level.Therefore, signal S4(not shown) is patrolled from low
Collect level transitions to high logic level, and signal S3(not shown) is still low level signal.By electricity
The operation of capacitive device 224, in time T3Place, voltage VD(waveform 612) is pulled up about 1.8V.
Meanwhile, diode component 234 also provides discharge path with by voltage VG(waveform 614) and voltage VD
(waveform 612) is pulled to close to each other.As a result, in time T3Place, voltage VD(waveform 612) from
Steady state output voltage level (being in this example e.g., -1.1V) is converted to the voltage level than 0.7V
The voltage level (that is, -1.1V adds 1.8V) of hundreds of mV high.The gate terminal of transistor 210 and crystalline substance
Voltage difference between the S/D ends of body pipe 210 is insufficient to allow transistor 210 to turn on.Transistor 210 is still
Cut-off.
In time T3Afterwards but in time T4Before, by diode component 234 by voltage VG(ripple
Shape 614) and voltage VD(waveform 612) is pulled to close to each other.Transistor 210 still ends.One
In a little embodiments, time T3With time T4Between time period it is sufficiently small so that voltage VG(waveform
314) voltage level or voltage VDThe voltage level of (waveform 612) is less than 100mV.
In time T4Place, signal S1(waveform 602) is converted to low logic level from high logic level.
Signal S2(waveform 604) is still in low logic level.Therefore, signal S3(not shown) is patrolled from low
Collect level transitions to high logic level, and signal S4(not shown) is still high level signal.By electricity
The operation of capacitive device 222, in time T4Place, voltage VG(waveform 614) is pulled up about 1.8V.
Meanwhile, diode component 232 also provides discharge path with by voltage VG(waveform 614) is pulled to close
Voltage VD.As a result, in time T4Place, voltage VG(waveform 614) is converted to than voltage level VFB1
The voltage level of hundreds of mV high.Voltage difference between the gate terminal of transistor 210 and S/D ends 216
It is enough to turn on transistor 210.
In time T4Afterwards but in time T5Before, voltage VD(waveform 612) is pulled down, then
Still in stable state input voltage level (e.g., being in this example 0V), and voltage VG(waveform
614) it is pulled down, then still in the forward voltage drop V of diode component 232FB1Electricity is input into stable state
At voltage level sum.Transistor 210 is still turned on.
In time T5Place, starts next operation circulation of pump stage circuit 200.Time T5Corresponding to next
The time T of operation circulation1。
Except the corresponding control signal of the second pump stage circuit is the control with the first pump stage circuit 110 [1]
Outside the nonoverlapping signal of signal processed, second is operated with the similar mode of the first pump stage circuit 110 [1]
Pump stage circuit 110 [2].As a result, the voltage V of pump stage circuit 110 [2]D(waveform 622) is in time T1
To time T4Period is in -1.1V, and in time T4To time T5Period is pumped (pump) extremely
-2.2V.The transistor 210 of output-stage circuit 120 is with the transistor 210 with the first input stage 110 [1]
Similar mode works.The capacitive device 224 of output-stage circuit 120 is configured to：When output stage electricity
The transistor 210 on road 120 is in time T1To time T4When period ends, by voltage VDVoltage electricity
It is flat to be maintained at -2.2V places.The capacitive device 224 of output-stage circuit 120 is additionally configured to：Work as output stage
The transistor 210 of circuit 120 is in time T4To time T5When period turns on, receive and come from the second pump stage
The electric charge of the capacitive device 224 of circuit 110 [2].As a result, the voltage V of output-stage circuit 120DStill
It is maintained at -2.2V places.
As shown in Fig. 6 and Fig. 2, by the discharge path and crystal that are provided by diode component 232
The gate terminal 212 of pipe 210 and output end (that is, the signal S of driver 2423) between DC every
From, when transistor 210 is turned on, voltage difference and grid between gate terminal 212 and S/D ends 216
Voltage difference between extreme 212 and S/D ends 214 remains approximately the positive pressure of diode component 232
Drop VFB1.In certain embodiments, the forward voltage drop V of diode component 232FB1It is set smaller than patrolling
Collect high level (being such as in this example 1.8V).For the pump stage of the rear class of charge pump circuit 100
Circuit or output-stage circuit 120, regardless of corresponding input voltage level or pumping voltage level,
Therefore, the transistor corresponding with transistor 210 all has by the positive pressure of diode component 232
Drop VFB1Gate terminal-S/D the terminal voltages of regulation, it is less than logic high when transistor 210 is turned on.
Fig. 7 is the flow chart of the method 700 of the pump stage circuit in the operation diagram 2 according to some embodiments.
Example with reference to shown in Fig. 2 illustrates Fig. 7.It should be understood that can figure 7 illustrates method 700
Before, during and/or after perform additional operation, therefore only briefly describe some other places herein
Reason.
Method 700 starts from operation 710, wherein in response to the first logical value of control signal, making electricity
At the first end of capacitive device voltage level (such as driver 242 and capacitive device 222 it
Between signal S3) from first voltage level transitions be second voltage level.In certain embodiments,
One voltage level corresponds to logic low, and second voltage level corresponds to logic high, control letter
Number correspond to signal S1, and the first logical value is corresponding to logic low value.
Method 700 is carried out to operation 720, wherein, at the first end of capacitive device
Second voltage level, makes voltage level (the such as voltage V at the second end of capacitive device 222G)
It is converted to tertiary voltage level.The second end of capacitive device 222 and the gate terminal of transistor 210
212 are electrically coupled.
In certain embodiments, operation 710 and 720 corresponds to the time T in the timing diagram of Fig. 64Place
Signal transformation.
Method 700 is carried out to operation 730, wherein, when transistor 210 is turned on and the first diode
The forward bias of device 232 and when turning on, by the first diode component (such as diode component 232)
Come the first electricity between gate terminal 232 and source/drain (S/D) end 216 for adjusting transistor 210
Pressure difference.First diode component 232 have the anode that is coupled with the gate terminal 212 of transistor 210 with
And the negative electrode coupled with the S/D ends 216 of transistor 210.In certain embodiments, 730 pairs are operated
Should be in the timing diagram of Fig. 6 from time T4To time T5Signal transformation.
Method 700 is carried out to operation 740, wherein, in response to the second logical value of control signal, make
Voltage level (such as signal S at the first end of capacitive device 2223) from second voltage level
It is changed into first voltage level.In certain embodiments, the second logical value corresponds to logic-high value.Knot
Really, voltage V is madeGIt is converted to the 4th voltage level for being insufficient to allow transistor 210 to turn on.In some realities
Apply in example, operation 740 corresponds to the time T in the timing diagram of Fig. 61The signal transformation at place.
Method 700 is carried out to operation 750, wherein, when transistor 201 is turned on and the second diode
The forward bias of device 234 and when turning on, by the second diode component (such as diode component 234)
To adjust the second electricity between the S/D ends 216 of transistor 210 and the gate terminal 212 of transistor 210
Pressure difference.Second diode component 234 have the anode that is coupled with the S/D ends 216 of transistor 210 with
And the negative electrode coupled with the gate terminal 212 of transistor 210.In certain embodiments, 750 pairs are operated
Should be in the timing diagram of Fig. 6 from time T1To time T2And/or from time T3To time T4Signal
Transformation.
In certain embodiments, the first diode component 232 has forward voltage drop VFB1, the two or two pole
Tube device 234 has forward voltage drop VFB2, and forward voltage drop VFB1More than forward voltage drop VFB2.And
And, transistor 210 has the threshold voltage V between gate terminal 212 and S/D ends 216TH.One
In a little embodiments, forward voltage drop VFB1More than the threshold voltage V of transistor 210TH。
In certain embodiments, operation 710 to 750 is applicable to the output-stage circuit in operation diagram 3
300 method.
Method 700 is carried out to operation 760, wherein, in response to another control signal (such as control letter
Number S2), the voltage level at the S/D ends 216 of transistor 210 is pumped to predetermined pump voltage electricity
It is flat.In certain embodiments, operation 760 correspond in the timing diagrams of Fig. 6 from time T2To the time
T3Signal transformation.
According to one embodiment, charge pump circuit includes sub-circuit, and the sub-circuit is pump stage circuit or defeated
Go out a grade circuit.Sub-circuit includes input, output end, transistor, the first capacitive device, first
Diode component and the second diode component.Transistor has the first source/drain coupled with input
(S/D) end couples with output end the 2nd S/D ends and gate terminal.First capacitive device has
The first end coupled with the gate terminal of transistor and the second end for being configured to receive the first drive signal
Portion.First diode component has the negative electrode and and transistor coupled with the 2nd S/D ends of transistor
Gate terminal coupling anode.Second diode component has the negative electrode coupled with the gate terminal of transistor
And the anode coupled with the 2nd S/D ends of transistor.
According to another embodiment, charge pump circuit includes input node, output node, N number of pump stage electricity
Road and output-stage circuit.N is greater than zero positive integer.Each pump stage in N number of pump stage circuit
Circuit all includes input and output end.Output-stage circuit includes input and output end.N number of pump stage
The input of the first pump stage circuit in circuit is coupled with input node.In N number of pump stage circuit n-th
The input of (n+1) the individual pump stage circuit in the output end of individual pump stage circuit and N number of pump stage circuit
Coupling, wherein n is positive integer and 1≤n≤(N-1).N-th pump stage in N number of pump stage circuit
The output end of circuit is coupled with the input of output-stage circuit.The output end of output-stage circuit is saved with output
Point coupling.One in N number of pump stage circuit also includes transistor, the first capacitive device, the second electricity
Capacitive device, the first diode component and the second diode component.Transistor has：First source electrode/
Drain electrode (S/D) end, the input node with N number of pump stage circuit is coupled；2nd S/D ends,
Output node with N number of pump stage circuit is coupled；And gate terminal.First capacitive device
The first end that is coupled with the gate terminal with transistor and being configured to receives the of the first drive signal
Two ends.Second capacitive device has what is coupled with the output node of in N number of pump stage circuit
First end and be configured to receive the second drive signal the second end.First diode component has
The negative electrode coupled with the 2nd S/D ends of transistor and the anode coupled with the gate terminal of transistor.The
Two diode components have the negative electrode and the 2nd S/D with transistor coupled with the gate terminal of transistor
Hold the anode of coupling.
According to another embodiment, a kind of pump stage circuit or output stage for operating charge pump circuit is disclosed electric
The method on road.Method includes：In response to the first logical value of control signal, make the of capacitive device
The voltage level of an end portion is from first voltage level transitions to second voltage level.Method also includes：
In response to the second voltage level on the first end of capacitive device, make the second end of capacitive device
Voltage level translation at portion is to tertiary voltage level, the second end and the transistor of capacitive device
Gate terminal is electrically coupled；With when transistor turns and the first diode component forward bias and when turning on,
The between gate terminal and source/drain (S/D) end of transistor is adjusted by the first diode component
One voltage difference.First diode component has the anode and and crystal coupled with the gate terminal of transistor
The negative electrode of the S/D ends coupling of pipe.
The part of some embodiments is discussed above so that those of ordinary skill in the art can be preferably
Understand various aspects of the invention.It will be understood by those skilled in the art that can easily make
Designed or changed other for reaching and embodiment identical described herein with based on the present invention
Purpose and/or realize treatment and the structure of same advantage.Those of ordinary skill in the art should also realize
Arrive, this equivalent constructions without departing from the spirit and scope of the present invention, and without departing substantially from of the invention
In the case of spirit and scope, various changes, replacement can be carried out and changed.
Claims (10)
1. a kind of charge pump circuit, including：
Sub-circuit, the sub-circuit is pump stage circuit or output-stage circuit, and the sub-circuit includes：
Input；
Output end；
Transistor, with coupled with the input the first source/drain (S/D) end and
2nd S/D ends of the output end coupling and gate terminal；
First capacitive device, the first end coupled with the gate terminal with the transistor with
And it is configured to receive the second end of the first drive signal；
First diode component, the negative electrode coupled with the 2nd S/D ends with the transistor with
And the anode coupled with the gate terminal of the transistor；And
Second diode component, the negative electrode coupled with the gate terminal with the transistor and with
The anode of the 2nd S/D ends coupling of the transistor.
2. charge pump circuit according to claim 1, wherein, the sub-circuit is the pump stage
Circuit, the sub-circuit also includes：
Second capacitive device, with the first end coupled with the output end and be configured to receive
The second end of the second drive signal.
3. charge pump circuit according to claim 2, also includes：
Control circuit, is configured to generate the first control signal and the second control signal,
Wherein, the sub-circuit also includes：
First driver, is configured to first control signal to generate first driving
Signal；And
Second driver, is configured to second control signal to generate second driving
Signal.
4. charge pump circuit according to claim 3, wherein：
First driver is configured to make first drive signal corresponding with logic-high value
Switch between one voltage level and the reference voltage level corresponding with logic low value；And
Second driver is configured to make second drive signal corresponding with the logic-high value
Second voltage level and the reference voltage level corresponding with the logic low value between switch, it is described
First voltage level is different from the second voltage level.
5. charge pump circuit according to claim 1, wherein：
First diode component has forward voltage drop；
Second diode component has forward voltage drop；And
Positive pressure of the forward voltage drop of first diode component more than second diode component
Drop.
6. charge pump circuit according to claim 1, wherein：
First diode component includes being connected as X transistor of diode, and X is more than zero
Positive integer, and when X is more than 1, the X transistor for being connected as diode is connected in series；
And
Second diode component includes being connected as Y transistor of diode, and Y is more than zero simultaneously
And the positive integer less than X, and when Y is more than 1, the Y transistor for being connected as diode
It is connected in series.
7. charge pump circuit according to claim 1, wherein：
First diode component has forward voltage drop；
The transistor has threshold voltage；And
Threshold voltage of the forward voltage drop of first diode component more than the transistor.
8. charge pump circuit according to claim 1, wherein, the transistor is N-type crystal
Pipe.
9. a kind of charge pump circuit, including：
Input node；
Output node；
N number of pump stage circuit, N is the positive integer more than zero, each in N number of pump stage circuit
Pump stage circuit all includes：
Input；With
Output end；And
Output-stage circuit, including input and output end；
Wherein,
The input of the first pump stage circuit in N number of pump stage circuit and the input node coupling
Close；
N-th output end of pump stage circuit and N number of pump stage in N number of pump stage circuit
The input coupling of (n+1) the individual pump stage circuit in circuit, n is positive integer and 1≤n≤(N-1)；
The output end of the n-th pump stage circuit in N number of pump stage circuit and output stage electricity
The input coupling on road；
The output end of the output-stage circuit is coupled with the output node；With
One in N number of pump stage circuit also includes：
Transistor, the transistor has：First source/drain (S/D) is held, with institute
State the input node coupling of in N number of pump stage circuit；2nd S/D ends, with N number of pump stage
The output node coupling of one in circuit；And gate terminal；
First capacitive device, with the first end that the gate terminal with the transistor is coupled
Portion and be configured to receive the first drive signal the second end；
Second capacitive device, with N number of pump stage circuit in the output of one
Node coupling first end and be configured to receive the second drive signal the second end；
First diode component, with the moon that the 2nd S/D ends with the transistor couple
Pole and the anode coupled with the gate terminal of the transistor；And
Second diode component, the negative electrode coupled with the gate terminal with the transistor with
And the anode coupled with the 2nd S/D ends of the transistor.
10. it is a kind of operate charge pump circuit pump stage circuit or output-stage circuit method, methods described
Including：
In response to the first logical value of control signal, make the voltage electricity at the first end of capacitive device
Put down from first voltage level transitions to second voltage level；
In response to the second voltage level at the first end of the capacitive device, make the capacitive character
Voltage level translation at the second end of device is to tertiary voltage level, the of the capacitive device
Two ends are electrically coupled with the gate terminal of transistor；And
When the transistor turns and the first diode component forward bias and when turning on, by institute
State the first diode component and adjust the gate terminal of the transistor and between source/drain (S/D) is held
First voltage is poor, and first diode component has the anode coupled with the gate terminal of the transistor
And the negative electrode coupled with the S/D ends of the transistor.
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|---|---|---|---|
| US14/956,061 | 2015-12-01 | ||
| US14/956,061 US11611276B2 (en) | 2014-12-04 | 2015-12-01 | Charge pump circuit |
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| CN106817021B CN106817021B (en) | 2019-09-13 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111752329A (en) * | 2019-03-29 | 2020-10-09 | 恩智浦美国有限公司 | Reverse bias adjustment system and method for integrated circuits |
| CN114844348A (en) * | 2021-02-02 | 2022-08-02 | 圣邦微电子（北京）股份有限公司 | Power supply circuit, display panel and display device |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6023188A (en) * | 1996-11-05 | 2000-02-08 | Aplus Flash Technology, Inc. | Positive/negative high voltage charge pump system |
| CN1187884C (en) * | 1999-09-27 | 2005-02-02 | 英特尔公司 | Method and apparatus for reducing stress across capacitors used in integrated circuits |
| US6864739B2 (en) * | 2001-04-05 | 2005-03-08 | Saifun Semiconductors Ltd. | Charge pump stage with body effect minimization |
| CN102468747A (en) * | 2010-11-19 | 2012-05-23 | 无锡芯朋微电子有限公司 | Charge pump control circuit |
| CN104811034A (en) * | 2015-05-29 | 2015-07-29 | 聚辰半导体(上海)有限公司 | Simple charge pump circuit suitable for low voltage operation |
-
2016
- 2016-02-02 CN CN201610072649.3A patent/CN106817021B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6023188A (en) * | 1996-11-05 | 2000-02-08 | Aplus Flash Technology, Inc. | Positive/negative high voltage charge pump system |
| CN1187884C (en) * | 1999-09-27 | 2005-02-02 | 英特尔公司 | Method and apparatus for reducing stress across capacitors used in integrated circuits |
| US6864739B2 (en) * | 2001-04-05 | 2005-03-08 | Saifun Semiconductors Ltd. | Charge pump stage with body effect minimization |
| CN102468747A (en) * | 2010-11-19 | 2012-05-23 | 无锡芯朋微电子有限公司 | Charge pump control circuit |
| CN104811034A (en) * | 2015-05-29 | 2015-07-29 | 聚辰半导体(上海)有限公司 | Simple charge pump circuit suitable for low voltage operation |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111752329A (en) * | 2019-03-29 | 2020-10-09 | 恩智浦美国有限公司 | Reverse bias adjustment system and method for integrated circuits |
| CN111752329B (en) * | 2019-03-29 | 2022-11-18 | 恩智浦美国有限公司 | Reverse bias adjustment system and method for integrated circuits |
| CN114844348A (en) * | 2021-02-02 | 2022-08-02 | 圣邦微电子（北京）股份有限公司 | Power supply circuit, display panel and display device |
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| Publication number | Publication date |
|---|---|
| CN106817021B (en) | 2019-09-13 |
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