CN106816948B - A 12V battery photovoltaic mains mutual supplement and discharge maintenance device - Google Patents
A 12V battery photovoltaic mains mutual supplement and discharge maintenance device Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
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- G01R19/16538—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application in AC or DC supplies
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- G—PHYSICS
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Abstract
Description
技术领域Technical field
本发明涉及一种标称电压为12V的蓄电池的光伏市电互补充放电维护装置。The invention relates to a photovoltaic mains power mutual supplement and discharge maintenance device for a battery with a nominal voltage of 12V.
背景技术Background technique
在日常生活中,因蓄电池有便于携带、可重复利用的优点,很多常用的电子设备或仪器仪表中都会使用12V蓄电池供电,这些电子设备大都以便携式为主,随着可再生新能源的发展,利用光伏、市电互补方式为蓄电池充电将成为一种趋势。此外,正确的充放电方式不仅节约成本,还可以有效延长蓄电池的使用寿命,标称电压为12V的蓄电池的理想端电压范围是12V~13.5V,蓄电池无论处于过放电状态还是过充电状态都会影响电池的使用寿命,标称电压为12V的蓄电池在使用过程中,应尽量避免蓄电池的端电压长期处在小于12V或高于14.5V。In daily life, because batteries have the advantages of portability and reusability, many commonly used electronic devices or instruments are powered by 12V batteries. Most of these electronic devices are mainly portable. With the development of renewable new energy, It will become a trend to use photovoltaic and mains electricity complementary methods to charge batteries. In addition, the correct charging and discharging method not only saves costs, but also effectively extends the service life of the battery. The ideal terminal voltage range of a battery with a nominal voltage of 12V is 12V ~ 13.5V. Whether the battery is in an overdischarge or overcharge state will affect the battery life. Regarding the service life of the battery, when using a battery with a nominal voltage of 12V, you should try to avoid the terminal voltage of the battery being less than 12V or higher than 14.5V for a long time.
长期处于过放电状态或过充电状态的蓄电池,因内部导电离子无法得到有效激发,蓄电池就会因为使用不当而大大影响其使用寿命,用户在使用蓄电池时往往对蓄电池剩余电量不清楚,蓄电池不进行及时有效的充放电可能会导致设备工作中途电力不足或使用不稳定等情况发生。For batteries that have been in an over-discharged or overcharged state for a long time, the internal conductive ions cannot be effectively stimulated, and the battery's service life will be greatly affected by improper use. Users often do not know the remaining battery power when using the battery, and the battery does not perform maintenance. Timely and effective charging and discharging may lead to insufficient power or unstable use of the equipment during operation.
发明内容Contents of the invention
本发明针对现有技术中存在的上述不足,提供一种12V蓄电池光伏市电互补充放电维护装置,可以检测标称电压为12V的蓄电池所处状态,并进行自动充放电和关断控制,使蓄电池的电压长期稳定在较为正常的范围内。Aiming at the above-mentioned deficiencies in the prior art, the present invention provides a 12V battery photovoltaic mains power mutual supplement and discharge maintenance device, which can detect the state of the battery with a nominal voltage of 12V, and perform automatic charge and discharge and shutdown control, so that The voltage of the battery has been stable within a relatively normal range for a long time.
为了解决上述技术问题,本发明采用以下的技术方案:In order to solve the above technical problems, the present invention adopts the following technical solutions:
一种12V蓄电池光伏市电互补充放电维护装置,包括电源模块、光伏市电互补组合逻辑控制模块、以及蓄电池充放电比较控制模块,蓄电池的标称电压为12V;A 12V battery photovoltaic mains complementary supplement and discharge maintenance device, including a power module, a photovoltaic mains complementary combination logic control module, and a battery charge and discharge comparison control module. The nominal voltage of the battery is 12V;
所述光伏市电互补组合逻辑控制模块包括一非自锁按键,非自锁按键通过双D触发计数模块实现按键次数的二进制加法计数,非自锁按键的输出端还通过延时电路触发一数据锁存电路输出,双D触发计数模块的两个D触发器的输出端均连接所述数据锁存电路的数据输入端,数据锁存电路的一数据输出端通过光耦隔离电路连接第一继电器,第一继电器的触点可使输出端口OUT1连接光伏接口P1充电,数据锁存电路的另一数据输出端通过光耦隔离电路连接第二继电器,第二继电器的触点可使输出端口OUT1连接市电接口P2充电,所述双D触发计数模块的两个D触发器的输出端电平可使输出端口OUT1单独连接光伏接口、市电接口之一充电以及同时连接光伏接口、市电接口充电,以及处于停机模式下光伏接口、市电接口均不对输出端口充电;The photovoltaic mains complementary combination logic control module includes a non-self-locking button. The non-self-locking button realizes binary addition counting of the number of button presses through a double D trigger counting module. The output end of the non-self-locking button also triggers a data through a delay circuit. Latch circuit output, the output terminals of the two D flip-flops of the double D trigger counting module are connected to the data input terminal of the data latch circuit, and a data output terminal of the data latch circuit is connected to the first relay through an optocoupler isolation circuit , the contact of the first relay can connect the output port OUT1 to the photovoltaic interface P1 for charging, the other data output end of the data latch circuit is connected to the second relay through the optocoupler isolation circuit, and the contact of the second relay can connect the output port OUT1 Mains interface P2 is charged. The output levels of the two D flip-flops of the double D trigger counting module can enable the output port OUT1 to be connected to one of the photovoltaic interface and the mains interface for charging alone, and to be connected to the photovoltaic interface and the mains interface for charging at the same time. , and in shutdown mode, neither the photovoltaic interface nor the mains interface charges the output port;
所述光伏接口P1和输出端口之间连接有防止电流反充的第一二极管,所述市电接口P2和输出端口之间连接有防止电流反充的第二二极管,当光伏接口P1和市电接口P2同时为输出端口充电时,第一二极管可以防止市电充电占主要时其电流反灌至光伏接口,第二二极管可以防止光伏充电占主要时其电流反灌至市电接口,从而防止光伏电源或市电电源损坏;A first diode to prevent current reverse charging is connected between the photovoltaic interface P1 and the output port, and a second diode to prevent current reverse charging is connected between the mains interface P2 and the output port. When the photovoltaic interface When P1 and mains interface P2 charge the output port at the same time, the first diode can prevent the current from flowing back to the photovoltaic interface when mains charging is dominant, and the second diode can prevent the current from flowing back to the photovoltaic interface when photovoltaic charging is dominant. to the mains power interface to prevent damage to the photovoltaic power supply or mains power supply;
所述蓄电池充放电比较控制模块包括为反相电压迟滞比较器的第一电压迟滞比较器和第二电压迟滞比较器,第一电压迟滞比较器的同向输入端通过第一电阻R1连接第一基准电压VR1的正端,其同向输入端和输出端之间连接有第一反馈电阻R2,其反向输入端连接蓄电池的正端,第二电压迟滞比较器的同向输入端通过第三电阻R3连接第二基准电压VR2的正端,其同向输入端和输出端之间连接有第二反馈电阻R4,其反向输入端连接蓄电池的正端;第一电压迟滞比较器的输出端通过NPN三极管连接第三继电器的电磁线圈,充电指示灯并联在第三继电器的电磁线圈两端,第三继电器的常闭触点连接过充关断指示灯后并联在输出端口OUT1两端,其常开触点连接在输出端口OUT1对蓄电池的充电回路上;第二电压迟滞比较器的输出端通过NPN三极管连接第四继电器的电磁线圈,过放关断指示灯并联在第四继电器的电磁线圈两端,第四继电器的常闭触点连接在蓄电池对负载的放电回路上,放电指示灯连接第四继电器的常闭触点后并联在蓄电池的两端;The battery charge and discharge comparison control module includes a first voltage hysteresis comparator and a second voltage hysteresis comparator, which are inverting voltage hysteresis comparators. The non-inverting input end of the first voltage hysteresis comparator is connected to the first voltage hysteresis comparator through a first resistor R1. The positive terminal of the reference voltage V R1 has a first feedback resistor R2 connected between its non-inverting input terminal and the output terminal, and its reverse input terminal is connected to the positive terminal of the battery. The non-inverting input terminal of the second voltage hysteresis comparator passes through the third Three resistors R3 are connected to the positive terminal of the second reference voltage V R2 , a second feedback resistor R4 is connected between its positive input terminal and the output terminal, and its reverse input terminal is connected to the positive terminal of the battery; the first voltage hysteresis comparator The output end is connected to the electromagnetic coil of the third relay through an NPN transistor. The charging indicator light is connected in parallel to both ends of the electromagnetic coil of the third relay. The normally closed contact of the third relay is connected to the overcharge shutdown indicator light and then connected in parallel to both ends of the output port OUT1. , its normally open contact is connected to the output port OUT1 on the battery charging circuit; the output end of the second voltage hysteresis comparator is connected to the electromagnetic coil of the fourth relay through an NPN transistor, and the over-discharge shutdown indicator light is connected in parallel to the fourth relay At both ends of the electromagnetic coil, the normally closed contact of the fourth relay is connected to the discharge circuit of the battery to the load, and the discharge indicator light is connected to the normally closed contact of the fourth relay and then connected in parallel to both ends of the battery;
第一电压迟滞比较器的上门限电压下门限电压其中VR1为上述第一基准电压,VZ为输出端稳压二极管的稳压值,令上门限电压Vp1=过充关断电压,下门限电压Vp2=充电关断恢复电压,则可以计算出第一电阻R1和第一反馈电阻R2的比值以及所需的第一基准电压VR1的数值;The upper threshold voltage of the first voltage hysteresis comparator lower threshold voltage Where V R1 is the above-mentioned first reference voltage, V Z is the voltage stabilization value of the output Zener diode, let the upper threshold voltage V p1 = overcharge shutdown voltage, and the lower threshold voltage V p2 = charge shutdown recovery voltage, then it can Calculate the ratio of the first resistor R1 and the first feedback resistor R2 and the required value of the first reference voltage V R1 ;
同理,第二电压迟滞比较器的上门限电压下门限电压/>其中VR2为上述第二基准电压,VZ为输出端稳压二极管的稳压值,令上门限电压Vp1=放电关断恢复电压,下门限电压Vp2=过放关断电压,则可以计算出第三电阻R3和第二反馈电阻R4的比值以及所需的第二基准电压VR2的数值;In the same way, the upper threshold voltage of the second voltage hysteresis comparator Lower threshold voltage/> Where V R2 is the above-mentioned second reference voltage, V Z is the voltage stabilization value of the output Zener diode, let the upper threshold voltage V p1 = discharge shutdown recovery voltage, and the lower threshold voltage V p2 = over-discharge shutdown voltage, then it can Calculate the ratio of the third resistor R3 and the second feedback resistor R4 and the required value of the second reference voltage V R2 ;
当蓄电池的端电压上升至过充关断电压时,第一电压迟滞比较器发生翻转输出低电平,其通过NPN三极管和第三继电器断开对蓄电池的充电,此时过充关断指示灯点亮,此过充关断状态一直维持到蓄电池的端电压降低至充电关断恢复电压,达到充电关断恢复电压则第一电压迟滞比较器翻转为高电平,接通对蓄电池的充电,此时充电指示灯点亮;当蓄电池的端电压下降至过放关断电压时,第二电压迟滞比较器发生翻转输出高电平,其通过NPN三极管和第四继电器断开蓄电池对负载的放电,此时过放关断指示灯点亮,此过放关断状态一直维持到蓄电池的端电压达到放电关断恢复电压,达到放电关断恢复电压则第一电压迟滞比较器翻转为低电平,接通对蓄电池的放电,此时放电指示灯点亮。When the terminal voltage of the battery rises to the overcharge shutdown voltage, the first voltage hysteresis comparator flips and outputs a low level, which cuts off charging of the battery through the NPN transistor and the third relay. At this time, the overcharge shutdown indicator light Lights up, and this overcharge shutdown state is maintained until the terminal voltage of the battery drops to the charge shutdown recovery voltage. When the charge shutdown recovery voltage is reached, the first voltage hysteresis comparator flips to high level, turning on the charging of the battery. At this time, the charging indicator light lights up; when the terminal voltage of the battery drops to the over-discharge shutdown voltage, the second voltage hysteresis comparator flips and outputs a high level, which disconnects the battery from discharging the load through the NPN transistor and the fourth relay. , at this time the over-discharge shutdown indicator light lights up. This over-discharge shutdown state is maintained until the terminal voltage of the battery reaches the discharge shutdown recovery voltage. When the discharge shutdown recovery voltage is reached, the first voltage hysteresis comparator flips to low level. , turn on the discharge of the battery, and the discharge indicator light will light up at this time.
进一步地,所述第一基准电压VR1由第一可调直流电源构成,第二基准电压VR2由第二可调直流电源构成;蓄电池充放电比较控制模块在输出端口OUT1和蓄电池之间接入防止电流反充的二极管D0,防止蓄电池向输出端口OUT1放电。Further, the first reference voltage V R1 is composed of a first adjustable DC power supply, and the second reference voltage V R2 is composed of a second adjustable DC power supply; the battery charge and discharge comparison control module is connected between the output port OUT1 and the battery. The diode D0 that prevents current reverse charging prevents the battery from discharging to the output port OUT1.
进一步地,所述双D触发计数模块包括级联的第一D触发器和第二D触发器,第一D触发器的时钟端连接所述按键防抖电路的输出端,第一D触发器的D端连接其反向输出端,第二D触发器的D端连接其反向输出端,第一触发器的反向输出端连接第二D触发器的D端,于是构成了异步时钟的二进制加法计数模块,其中第二触发器为高位输出,第一触发器为低位输出;Further, the double D trigger counting module includes a cascaded first D flip-flop and a second D flip-flop. The clock end of the first D flip-flop is connected to the output end of the key anti-shake circuit. The first D flip-flop The D terminal of the second D flip-flop is connected to its reverse output terminal, the D terminal of the second D flip-flop is connected to its reverse output terminal, and the reverse output terminal of the first flip-flop is connected to the D terminal of the second D flip-flop, thus forming an asynchronous clock. Binary addition counting module, in which the second flip-flop is a high-bit output and the first flip-flop is a low-bit output;
所述双D触发计数模块的第一D触发器的反向输出端和第二D触发器的反向输出端连接所述数据锁存电路,数据锁存电路的一数据输出端IN0_out通过光耦隔离电路以及PNP三极管Q1连接第一继电器,当数据锁存电路的该数据输出端IN0_out输出低电平时,通过光耦隔离电路使PNP三极管Q1导通,第一继电器上电,第一继电器的常开触点闭合,使输出端口OUT1连接光伏接口P1充电;The reverse output end of the first D flip-flop and the reverse output end of the second D flip-flop of the double D trigger counting module are connected to the data latch circuit, and a data output end IN0_out of the data latch circuit passes through an optocoupler. The isolation circuit and the PNP transistor Q1 are connected to the first relay. When the data output terminal IN0_out of the data latch circuit outputs a low level, the PNP transistor Q1 is turned on through the optocoupler isolation circuit, and the first relay is powered on. The normal state of the first relay The open contact is closed, allowing the output port OUT1 to connect to the photovoltaic interface P1 for charging;
数据锁存电路的另一数据输出端IN1_out通过光耦隔离电路和PNP三极管Q2连接第二继电器,当数据锁存电路的该数据输出端IN1_out输出低电平时,通过光耦隔离电路使PNP三极管Q2导通,第二继电器上电,第二继电器的常开触点闭合,使输出端口OUT1连接市电接口P2充电;The other data output terminal IN1_out of the data latch circuit is connected to the second relay through the optocoupler isolation circuit and the PNP transistor Q2. When the data output terminal IN1_out of the data latch circuit outputs a low level, the PNP transistor Q2 is connected through the optocoupler isolation circuit. is turned on, the second relay is powered on, and the normally open contact of the second relay is closed, allowing the output port OUT1 to connect to the mains interface P2 for charging;
当数据锁存电路U7的数据输出端IN0_out和数据输出端IN1_out均输出低电平时,可见,其可以同时驱动第一继电器和第二继电器上电,使光伏接口P1和市电接口P2同时为输出端口OUT1供电;When the data output terminal IN0_out and the data output terminal IN1_out of the data latch circuit U7 both output low level, it can be seen that it can drive the first relay and the second relay to power on at the same time, so that the photovoltaic interface P1 and the mains interface P2 are output at the same time. Port OUT1 supplies power;
当数据锁存电路U7的数据输出端IN0_out和数据输出端IN1_out均输出高电平时,此为停机模式,光伏接口和市电接口均不为输出端口OUT1供电。When the data output terminal IN0_out and the data output terminal IN1_out of the data latch circuit U7 both output high level, this is the shutdown mode, and neither the photovoltaic interface nor the mains interface supplies power to the output port OUT1.
进一步地,所述双D触发器的第一D触发器及第二D触发器的正向输出端连接译码器,第一D触发器连接译码器的低位输入端,第二D触发器连接译码器的高位输入端,该译码器将输入的二进制码转化成十进制,并通过数码管显示,由此可显示非自锁按键的按键次数。Further, the forward output terminals of the first D flip-flop and the second D flip-flop of the double D flip-flop are connected to the decoder, the first D flip-flop is connected to the low input terminal of the decoder, and the second D flip-flop is connected to the decoder. Connect the high-bit input terminal of the decoder. The decoder converts the input binary code into decimal and displays it through the digital tube. This can display the number of key presses of the non-self-locking key.
优选地,所述非自锁按键为双刀双掷开关S1,双刀双掷开关S1的一个闸刀连接按键防抖电路的输入端,双刀双掷开关S1的另一闸刀连接延时电路的触发端,双刀双掷开关的两个闸刀联动,双刀双掷开关S1的非启闭端接地;Preferably, the non-self-locking key is a double-pole double-throw switch S1, one blade of the double-pole double-throw switch S1 is connected to the input end of the key anti-shake circuit, and the other blade of the double-pole double-throw switch S1 is connected to the delay At the triggering end of the circuit, the two blades of the double-pole double-throw switch are linked, and the non-opening end of the double-pole double-throw switch S1 is grounded;
所述按键防抖电路为RS触发器防抖电路,该RS触发器防抖电路由两个与非门连接构成,所述双刀双掷开关S1按下并松开后,RS触发器防抖电路的输出端通过上升沿电平触发所述双D触发计数模块开始工作,双D触发计数模块的第一D触发器、第二D触发器均为上升沿电平触发;The key anti-shake circuit is an RS trigger anti-shake circuit. The RS trigger anti-shake circuit is composed of two NAND gates. After the double-pole double-throw switch S1 is pressed and released, the RS trigger anti-shake circuit The output end of the circuit triggers the double D trigger counting module to start working by rising edge level. The first D flip-flop and the second D flip-flop of the double D trigger counting module are both rising edge level triggered;
所述延时电路采用555延时触发电路,其为低电平触发开始延时,直至非自锁按键松开后的高电平使充电电容C13充电至一定电压后,555延时触发电路的输出端才输出低电平,以触发数据锁存电路输出数据,555延时触发电路的延时时间可调节其充电电容C13和可调电阻R7实现。The delay circuit uses a 555 delay trigger circuit, which is a low-level trigger that starts delaying until the high level after the non-self-locking button is released to charge the charging capacitor C13 to a certain voltage. The 555 delay trigger circuit The output terminal only outputs a low level to trigger the data latch circuit to output data. The delay time of the 555 delay trigger circuit can be realized by adjusting its charging capacitor C13 and adjustable resistor R7.
进一步地,所述12V蓄电池光伏市电互补充放电维护装置还包括蓄电池电压采集与显示模块,蓄电池电压采集与显示模块采用A/D转换芯片ICL7107,其通过电压采集电路连接蓄电池的两端,电压采样电路的采样点连接ICL7107的高位输入端,该ICL7107的输出端直接驱动四个LED数码管,通过设定小数点位,使显示范围为±19.99,可实现标称电压为12V的蓄电池的端电压显示,ICL7107和LED数码管构成数字式电压表。Further, the 12V battery photovoltaic mains mutual supplement and discharge maintenance device also includes a battery voltage acquisition and display module. The battery voltage acquisition and display module uses the A/D conversion chip ICL7107, which is connected to both ends of the battery through a voltage acquisition circuit. The voltage The sampling point of the sampling circuit is connected to the high input terminal of ICL7107. The output terminal of ICL7107 directly drives four LED digital tubes. By setting the decimal point, the display range is ±19.99, which can realize the terminal voltage of the battery with a nominal voltage of 12V. Display, ICL7107 and LED digital tube constitute a digital voltmeter.
优选地,所述蓄电池的过充关断电压为14.1~14.5V,充电关断恢复电压为13.1~13.5V,过放关断电压为10.8~12V,放电关断恢复电压为11.5~12V。Preferably, the overcharge shutdown voltage of the battery is 14.1-14.5V, the charging shutdown recovery voltage is 13.1-13.5V, the over-discharge shutdown voltage is 10.8-12V, and the discharge shutdown recovery voltage is 11.5-12V.
优选地,所述NPN三极管为NPN型的复合三极管,其由一NPN三极管和一PNP三极管级联构成,当输入端为高电平时,NPN型的复合三极管导通,当输入端为低电平时,NPN型的复合三极管截止。Preferably, the NPN transistor is an NPN type composite transistor, which is composed of an NPN transistor and a PNP transistor cascaded. When the input terminal is high level, the NPN type composite transistor is turned on, and when the input terminal is low level , NPN type composite transistor cut-off.
优选地,所述蓄电池的过充关断电压为14.5V,充电关断恢复电压为13.5V,过放关断电压为11V,放电关断恢复电压为12V。Preferably, the overcharge shutdown voltage of the battery is 14.5V, the charge shutdown recovery voltage is 13.5V, the overdischarge shutdown voltage is 11V, and the discharge shutdown recovery voltage is 12V.
优选地,所述延时电路采用芯片NE555,数据锁存电路采用芯片74HC573,双D触发器采用芯片74LS74,译码器采用芯片74LS47。Preferably, the delay circuit uses chip NE555, the data latch circuit uses chip 74HC573, the double D flip-flop uses chip 74LS74, and the decoder uses chip 74LS47.
本发明的有益效果是:(1)可以自动检测标称电压为12V的蓄电池所处状态,由此进行自动充放电和过充关断控制、过放关断控制、以及充电关断恢复控制、放电关断恢复控制,使蓄电池的电压长期稳定在较为正常的范围内,可以提高蓄电池的工作效率和使用寿命;用户无需根据蓄电池的端电压手动控制蓄电池的充放电关断和恢复,自动化程度高;The beneficial effects of the present invention are: (1) It can automatically detect the state of a battery with a nominal voltage of 12V, thereby performing automatic charge and discharge, overcharge shutdown control, overdischarge shutdown control, and charge shutdown recovery control; Discharge shutdown and recovery control keeps the battery voltage stable within a relatively normal range for a long time, which can improve the battery's working efficiency and service life; users do not need to manually control the battery's charge, discharge, shutdown and recovery based on the battery's terminal voltage, and the degree of automation is high ;
(2)双D触发计数模块的两个D触发器的输出端电平使输出端口OUT1单独连接光伏接口、市电接口之一充电以及同时连接光伏接口、市电接口充电,以及处于停机模式下光伏接口、市电接口均不对输出端口OUT1充电;符合可再生新能源的发展方向,具有节能环保的优点。(2) The output levels of the two D flip-flops of the dual D trigger counting module enable the output port OUT1 to be connected to one of the photovoltaic interface and the mains interface for charging alone, and simultaneously connected to the photovoltaic interface and the mains interface for charging, and in shutdown mode. Neither the photovoltaic interface nor the mains interface charges the output port OUT1; it is in line with the development direction of renewable new energy and has the advantages of energy saving and environmental protection.
附图说明Description of drawings
图1为本发明的光伏市电互补组合逻辑控制模块的电路图之一。Figure 1 is one of the circuit diagrams of the photovoltaic mains complementary combinational logic control module of the present invention.
图2为本发明的光伏市电互补组合逻辑控制模块的电路图之二。Figure 2 is the second circuit diagram of the photovoltaic mains complementary combinational logic control module of the present invention.
图3为本发明的光伏市电互补组合逻辑控制模块的电路图之三。Figure 3 is the third circuit diagram of the photovoltaic mains complementary combinational logic control module of the present invention.
图4为本发明的光伏市电互补组合逻辑控制模块的电路图之四。Figure 4 is the fourth circuit diagram of the photovoltaic mains complementary combinational logic control module of the present invention.
图5为本发明实施例的蓄电池充放电比较控制模块的电路原理图。Figure 5 is a circuit schematic diagram of a battery charge and discharge comparison control module according to an embodiment of the present invention.
图6为同向电压迟滞比较器的电路图。Figure 6 is a circuit diagram of a non-inverting voltage hysteresis comparator.
图7为同向电压迟滞比较器的传输特性图。Figure 7 is the transfer characteristic diagram of the non-directional voltage hysteresis comparator.
图8为本发明实施例的第一电压迟滞比较器的传输特性图。FIG. 8 is a transmission characteristic diagram of the first voltage hysteresis comparator according to the embodiment of the present invention.
图9为本发明实施例的第二电压迟滞比较器的传输特性图。FIG. 9 is a transmission characteristic diagram of the second voltage hysteresis comparator according to the embodiment of the present invention.
图10为本发明实施例的蓄电池电压采集及显示模块的电路图。Figure 10 is a circuit diagram of a battery voltage acquisition and display module according to an embodiment of the present invention.
图11为本发明实施例的电源模块的双15V电源的电路图。FIG. 11 is a circuit diagram of dual 15V power supplies of the power module according to the embodiment of the present invention.
图12为本发明实施例的电源模块的双5V电源的电路图。Figure 12 is a circuit diagram of dual 5V power supplies of the power module according to the embodiment of the present invention.
具体实施方式Detailed ways
下面结合附图与实施例对本发明作进一步详细描述,应当理解,此处描述的实施例仅用于具体说明本发明的实施方式,并不构成对本发明的限制。The present invention will be described in further detail below with reference to the accompanying drawings and examples. It should be understood that the embodiments described here are only used to specifically illustrate the implementation of the present invention and do not constitute a limitation of the present invention.
参照图1-12:一种12V蓄电池光伏市电互补充放电维护装置,包括电源模块、光伏市电互补组合逻辑控制模块、以及蓄电池充放电比较控制模块,蓄电池的标称电压为12V。Refer to Figure 1-12: A 12V battery photovoltaic mains complementary supplement and discharge maintenance device, including a power module, a photovoltaic mains complementary combination logic control module, and a battery charge and discharge comparison control module. The nominal voltage of the battery is 12V.
所述光伏市电互补组合逻辑控制模块包括为一非自锁按键,本实施例中其为两个闸刀联动的双刀双掷开关S1,双刀双掷开关S1的一闸刀通过RS按键防抖电路连接双D触发计数模块,双刀双掷开关的另一闸刀连接延时电路U6,也即图中双刀双掷开关的4端key_in连接延时电路U6的触发端TRIG,当双刀双掷开关S1按下时,key_in为低电平,延时电路U6被触发;The photovoltaic mains complementary combination logic control module includes a non-self-locking button. In this embodiment, it is a double-pole double-throw switch S1 with two linked blades. One blade of the double-pole double-throw switch S1 passes through the RS button. The anti-shake circuit is connected to the double D trigger counting module, and the other knife of the double-pole double-throw switch is connected to the delay circuit U6. That is, the 4-terminal key_in of the double-pole double-throw switch in the figure is connected to the trigger terminal TRIG of the delay circuit U6. When When the double-pole double-throw switch S1 is pressed, key_in is low level and the delay circuit U6 is triggered;
延时电路U6的输出端连接数据锁存电路U7的使能端OE,所述双D触发计数模块的各个D触发器的反向输出端IN0、IN1均连接数据锁存电路U7的数据输入端,在所述延时电路U6延时一定时间后,触发数据锁存电路U7的数据输出端IN0_out、IN1_out对应输出其数据输入端IN0、IN1的数据;数据锁存电路U7的数据输出端IN0_out通过光耦隔离电路U9以及PNP三极管Q1连接第一继电器K1,当数据锁存电路的该数据输出端IN0_out输出低电平时,光耦隔离电路U9导通,PNP三极管Q1导通,第一继电器K1上电,第一继电器K1的常开触点闭合,使输出端口OUT1连接光伏接口P1,图中,光伏接口P1的正端通过D5连接输出端口OUT1的K+,光伏接口P1的负端通过闭合后的常开触点连接输出端口OUT1的K—;The output terminal of the delay circuit U6 is connected to the enable terminal OE of the data latch circuit U7, and the reverse output terminals IN0 and IN1 of each D flip-flop of the double D trigger counting module are connected to the data input terminal of the data latch circuit U7. , after the delay circuit U6 delays for a certain period of time, the data output terminals IN0_out and IN1_out of the data latch circuit U7 are triggered to correspondingly output the data of their data input terminals IN0 and IN1; the data output terminal IN0_out of the data latch circuit U7 passes The optocoupler isolation circuit U9 and the PNP transistor Q1 are connected to the first relay K1. When the data output terminal IN0_out of the data latch circuit outputs a low level, the optocoupler isolation circuit U9 is turned on, the PNP transistor Q1 is turned on, and the first relay K1 electricity, the normally open contact of the first relay K1 is closed, so that the output port OUT1 is connected to the photovoltaic interface P1. In the figure, the positive end of the photovoltaic interface P1 is connected to the K+ of the output port OUT1 through D5, and the negative end of the photovoltaic interface P1 is connected through the closed The normally open contact is connected to K— of the output port OUT1;
数据锁存电路U7的另一数据输出端IN1_out通过光耦隔离电路U12和PNP三极管Q2连接第二继电器K2,当数据锁存电路的该数据输出端IN1_out输出低电平时,光耦隔离电路U12导通,PNP三极管Q2导通,第二继电器K2上电,第二继电器K2的常开触点闭合,使输出端口OUT1连接市电接口P2,所述输出端口OUT1用于连接蓄电池充电;The other data output terminal IN1_out of the data latch circuit U7 is connected to the second relay K2 through the optocoupler isolation circuit U12 and the PNP transistor Q2. When the data output terminal IN1_out of the data latch circuit outputs a low level, the optocoupler isolation circuit U12 conducts pass, the PNP transistor Q2 is turned on, the second relay K2 is powered on, and the normally open contact of the second relay K2 is closed, so that the output port OUT1 is connected to the mains interface P2, and the output port OUT1 is used to connect to the battery for charging;
当数据锁存电路U7的两个数据输出端IN0_out和IN1_out均输出低电平时,同时驱动第一继电器K1和第二继电器K2上电,使光伏接口P1和市电接口P2均为输出端口OUT1供电,也即同时为蓄电池充电;当数据锁存电路U7的数据输出端IN0_out和数据输出端IN1_out均输出高电平时,此为停机模式,光伏接口和市电接口均不为输出端口OUT1供电;When the two data output terminals IN0_out and IN1_out of the data latch circuit U7 both output low level, the first relay K1 and the second relay K2 are driven to power on at the same time, so that the photovoltaic interface P1 and the mains interface P2 both supply power to the output port OUT1. , that is, charging the battery at the same time; when the data output terminal IN0_out and the data output terminal IN1_out of the data latch circuit U7 both output high level, this is the shutdown mode, and neither the photovoltaic interface nor the mains interface supplies power to the output port OUT1;
所述延时电路U6用于等待非自锁按键输入完毕以及双D触发计数模块最终输出后触发数据锁存电路输出;The delay circuit U6 is used to wait for the completion of the non-self-locking key input and the final output of the double D trigger counting module to trigger the output of the data latch circuit;
所述光伏接口P1和输出端口OUT1之间连接有防止电流反充的第一二极管D5,市电接口P2和输出端口OUT1之间连接有防止电流反充的第二二极管D7,当光伏接口P1和市电接口P2同时为输出端口OUT1充电时,第一二极管D5可以防止市电充电占主要时其电流反灌至光伏接口,第二二极管D7可以防止光伏充电占主要时其电流反灌至市电接口,从而防止光伏电源或市电电源损坏;A first diode D5 to prevent current reverse charging is connected between the photovoltaic interface P1 and the output port OUT1, and a second diode D7 to prevent current reverse charging is connected between the mains interface P2 and the output port OUT1. When the photovoltaic interface P1 and the mains interface P2 charge the output port OUT1 at the same time, the first diode D5 can prevent the current from flowing back to the photovoltaic interface when the mains charging is dominant, and the second diode D7 can prevent the photovoltaic charging from being dominant. When the current flows back to the mains interface, it prevents damage to the photovoltaic power supply or mains power supply;
所述双D触发计数模块包括级联的第一D触发器U11A和第二D触发器U11B,第一D触发器的时钟端连接所述RS按键防抖电路的输出端,第一D触发器的D端连接其反向输出端,第二D触发器的D端连接其反向输出端,第一触发器的反向输出端连接第二D触发器的D端,于是构成了异步时钟的二进制加法计数模块,其中第二触发器为高位输出,第一触发器为低位输出;The double D trigger counting module includes a cascaded first D flip-flop U11A and a second D flip-flop U11B. The clock end of the first D flip-flop is connected to the output end of the RS button anti-shake circuit. The D terminal of the second D flip-flop is connected to its reverse output terminal, the D terminal of the second D flip-flop is connected to its reverse output terminal, and the reverse output terminal of the first flip-flop is connected to the D terminal of the second D flip-flop, thus forming an asynchronous clock. Binary addition counting module, in which the second flip-flop is a high-bit output and the first flip-flop is a low-bit output;
所述RS触发器防抖电路由两个与非门U10A和U10B连接构成。当非自锁按键按下时,其1端为低电平,无论非自锁按键是否松开其1端,只要不与其3端接触,U10A始终输出低电平,实现了按键的防抖功能。非自锁按键按下并松开至与其3端接触后,U10A输出上升沿电平,双D触发计数模块的时钟端CLK为上升沿触发,U10A输出上升沿电平,双D触发计数模块的时钟端CLK为上升沿触发,图6中U11B为高位输出,U11A为低位输出,U11B、U11A依次实现00,01,10,11的加法计数;The RS flip-flop anti-shake circuit is composed of two NAND gates U10A and U10B connected. When the non-self-locking button is pressed, its terminal 1 is low level. No matter whether the non-self-locking button is released from its terminal 1, as long as it does not contact its terminal 3, U10A always outputs low level, realizing the anti-shake function of the button. . After the non-self-locking button is pressed and released until it contacts its 3 terminals, U10A outputs a rising edge level, and the clock terminal CLK of the double D trigger counting module is a rising edge trigger. U10A outputs a rising edge level, and the double D trigger counting module The clock terminal CLK is triggered by the rising edge. In Figure 6, U11B is the high-order output and U11A is the low-order output. U11B and U11A realize the addition counting of 00, 01, 10, and 11 in sequence;
其具体过程为,D触发器的逻辑函数为:Qn+1=D,74LS74为上升沿触发。所以,图中,IN0=D0,IN1=D1,假设在初始状态下,第一、第二D触发器的输出均为0,即A=0,B=0;则第一、第二D触发器的反向输出端均为1,即IN0=1,IN1=1,因此第一、第二D触发器的D端状态为D0=1,D1=1;当RS触发器防抖电路的输出端也即第一D触发器的时钟端CLK第一次从0变化为1时,此时U11A状态变化为A=1,IN0=0,D0=0;IN0=0使得U11B的时钟端CLK为下降沿脉冲,故U11B状态无变化,即B=0,IN1=1,D1=1,此时双D触发计数模块(从高位至低位)的输出为01,即B=0,A=1;The specific process is that the logic function of the D flip-flop is: Q n+1 =D, and the 74LS74 is a rising edge trigger. Therefore, in the figure, IN0=D0, IN1=D1, assuming that in the initial state, the outputs of the first and second D flip-flops are both 0, that is, A=0, B=0; then the first and second D flip-flops The reverse output terminals of the flip-flop are both 1, that is, IN0=1, IN1=1, so the D-end states of the first and second D flip-flops are D0=1, D1=1; when the output of the RS flip-flop anti-shake circuit terminal, that is, when the clock terminal CLK of the first D flip-flop changes from 0 to 1 for the first time, the state of U11A changes to A=1, IN0=0, D0=0; IN0=0 makes the clock terminal CLK of U11B Falling edge pulse, so the state of U11B does not change, that is, B=0, IN1=1, D1=1. At this time, the output of the double D trigger counting module (from high to low) is 01, that is, B=0, A=1;
当第一D触发器的时钟端CLK第二次从0变化为1时,此时U11A状态变化为A=0,IN0=1,D0=1;IN0=1使得U11B的时钟端CLK为上升沿脉冲,故U11B状态变化为B=1,IN1=0,D1=0,此时双D触发计数模块(从高位至低位)的输出为10,即B=1,A=0;When the clock terminal CLK of the first D flip-flop changes from 0 to 1 for the second time, the state of U11A changes to A=0, IN0=1, D0=1; IN0=1 makes the clock terminal CLK of U11B a rising edge. pulse, so the state change of U11B is B=1, IN1=0, D1=0. At this time, the output of the double D trigger counting module (from high to low) is 10, that is, B=1, A=0;
当第一D触发器的时钟端CLK第三次从0变化为1时,此时U11A状态变化为A=1,IN0=0,D0=0;IN0=0使得U11B的时钟端CLK为下降沿脉冲,故U11B状态无变化,即B=1,IN1=0,D1=0,此时双D触发计数模块(从高位至低位)的输出为11,即B=1,A=1;When the clock terminal CLK of the first D flip-flop changes from 0 to 1 for the third time, the state of U11A changes to A=1, IN0=0, D0=0; IN0=0 makes the clock terminal CLK of U11B fall on the falling edge. pulse, so the state of U11B does not change, that is, B=1, IN1=0, D1=0. At this time, the output of the double D trigger counting module (from high to low) is 11, that is, B=1, A=1;
当第一D触发器的时钟端CLK第四次从0变化为1时,此时U11A状态变化为A=0,IN0=1,D0=1;IN0=1使得U11B的时钟端CLK为上升沿脉冲,故U11B状态变化为B=0,IN1=1,D1=1,双D触发计数模块(从高位至低位)的输出为00,即B=0,A=0,使逻辑关系回到初始状态,由此达到加法计数的效果。When the clock terminal CLK of the first D flip-flop changes from 0 to 1 for the fourth time, the state of U11A changes to A=0, IN0=1, D0=1; IN0=1 makes the clock terminal CLK of U11B a rising edge. pulse, so the state of U11B changes to B=0, IN1=1, D1=1, and the output of the double D trigger counting module (from high to low) is 00, that is, B=0, A=0, returning the logical relationship to the initial status, thereby achieving the effect of additive counting.
根据双D触发计数模块的IN0、IN1通过数据锁存器与第一继电器、第二继电器的连接电路,可知,在双D触发计数模块输出为00的初始状态下,按键按下一次,IN0=0,IN1=1使输出端口OUT1连接光伏接口供电,按键按下二次,IN0=1,IN1=0使输出端口OUT1连接市电接口供电,按键按下三次,IN0=0,IN1=0使输出端口OUT1同时连接光伏接口和市电接口供电,按键按下四次,回到初始状态,此为停机模式,此时IN0=1,IN1=1使光伏接口和市电接口均不为输出端口OUT1供电。According to the connection circuit between IN0 and IN1 of the double D trigger counting module and the first relay and the second relay through the data latch, it can be seen that in the initial state when the output of the double D trigger counting module is 00, when the button is pressed once, IN0 = 0, IN1=1 connects the output port OUT1 to the photovoltaic interface for power supply. Press the button twice, IN0=1, IN1=0 enables the output port OUT1 to connect to the mains interface for power supply. Press the button three times, IN0=0, IN1=0. The output port OUT1 is connected to the photovoltaic interface and the mains interface for power supply at the same time. Press the button four times to return to the initial state. This is the shutdown mode. At this time, IN0=1 and IN1=1 make the photovoltaic interface and the mains interface not an output port. OUT1 is powered.
表一 光伏市电互补组合逻辑控制模块的输出状态Table 1. Output status of photovoltaic mains complementary combinational logic control module
本实施例中,所述双D触发器的第一D触发器U11A及第二D触发器U11B的正向输出端连接译码器U8,译码器U8采用芯片74LS74,第一D触发器U11A连接译码器U8的低位输入端,第二D触发器U11B连接译码器U8的高位输入端,该译码器U8将双D触发计数模块输出的二进制码转化成十进制,并通过数码管显示,由此可显示非自锁按键的按键次数,由此可提示对应的输出状态。In this embodiment, the forward output ends of the first D flip-flop U11A and the second D flip-flop U11B of the double D flip-flop are connected to the decoder U8. The decoder U8 uses the chip 74LS74, and the first D flip-flop U11A Connect the low input terminal of the decoder U8, and the second D flip-flop U11B is connected to the high input terminal of the decoder U8. The decoder U8 converts the binary code output by the double D trigger counting module into decimal and displays it through the digital tube. , which can display the number of key presses of the non-self-locking key, and thus prompt the corresponding output status.
本实施例中,所述延时电路为555延时触发电路,所述非自锁按键的输出端连接555触发电路的TRIG端,其为低电平触发,触发后开始计时,直至非自锁按键松开后的高电平使充电电容C13充电至一定电压后,555延时触发电路的输出端才输出低电平,以触发数据锁存电路74HCT573输出,由此实现延时,555延时触发电路的延时时间由充电电容C13和可调电阻R7共同实现。In this embodiment, the delay circuit is a 555 delay trigger circuit. The output end of the non-self-locking button is connected to the TRIG end of the 555 trigger circuit. It is a low-level trigger. After triggering, the timing starts until the non-self-locking button is released. After the button is released, the high level charges the charging capacitor C13 to a certain voltage, and then the output terminal of the 555 delay trigger circuit outputs a low level to trigger the output of the data latch circuit 74HCT573, thus achieving delay, 555 delay The delay time of the trigger circuit is jointly realized by the charging capacitor C13 and the adjustable resistor R7.
所述蓄电池充放电比较控制模块包括为反相电压迟滞比较器的第一电压迟滞比较器U14A和第二电压迟滞比较器U14B,第一电压迟滞比较器U14A的同向输入端通过第一电阻R1连接第一基准电压VR1的正端,其同向输入端和输出端之间连接有第一反馈电阻R2,其反向输入端连接蓄电池的正端,其输出端连接稳压二极管ZD1,第二电压迟滞比较器U14B的同向输入端通过第三电阻R3连接第二基准电压VR2的正端,其同向输入端和输出端之间连接有第二反馈电阻R4,其反向输入端连接蓄电池的正端,其输出端连接稳压二极管ZD2,所述第一基准电压VR1由第一可调直流电源构成,第二基准电压VR2由第二可调直流电源构成;The battery charge and discharge comparison control module includes a first voltage hysteresis comparator U14A and a second voltage hysteresis comparator U14B, which are inverting voltage hysteresis comparators. The non-inverting input end of the first voltage hysteresis comparator U14A passes through the first resistor R1 Connect the positive terminal of the first reference voltage V R1 , the first feedback resistor R2 is connected between its non-inverting input terminal and the output terminal, its reverse input terminal is connected to the positive terminal of the battery, and its output terminal is connected to the Zener diode ZD1. The non-inverting input terminal of the two voltage hysteresis comparators U14B is connected to the positive terminal of the second reference voltage V R2 through the third resistor R3. A second feedback resistor R4 is connected between its non-inverting input terminal and the output terminal, and its inverse input terminal is connected to the positive terminal of the second reference voltage VR2. Connect the positive terminal of the battery, and its output terminal is connected to the Zener diode ZD2. The first reference voltage V R1 is composed of the first adjustable DC power supply, and the second reference voltage V R2 is composed of the second adjustable DC power supply;
第一电压迟滞比较器U14A的输出端通过NPN型的复合三极管(由NPN三极管Q3、PNP三极管Q4级联构成)连接第三继电器的电磁线圈,充电指示灯并联在第三继电器的电磁线圈两端,第三继电器的常闭触点连接过充关断指示灯LED10后并联在充电输入端口IN1两端,其常开触点连接在充电输入端口IN1对蓄电池的充电回路上;第二电压迟滞比较器U14B的输出端通过NPN型的复合三极管(Q3、Q4)连接第四继电器的电磁线圈,过放关断指示灯LED10并联在第四继电器的电磁线圈两端,第四继电器的常闭触点连接在蓄电池对负载的放电回路上,放电指示灯LED11连接第四继电器的常闭触点后并联在蓄电池的两端;The output end of the first voltage hysteresis comparator U14A is connected to the electromagnetic coil of the third relay through an NPN type composite transistor (composed of a cascade connection of NPN transistor Q3 and PNP transistor Q4). The charging indicator light is connected in parallel to both ends of the electromagnetic coil of the third relay. , the normally closed contact of the third relay is connected to the overcharge shutdown indicator LED10 and then connected in parallel to both ends of the charging input port IN1, and its normally open contact is connected to the charging circuit of the battery from the charging input port IN1; the second voltage hysteresis comparison The output end of the device U14B is connected to the electromagnetic coil of the fourth relay through an NPN type composite transistor (Q3, Q4). The over-discharge shutdown indicator LED10 is connected in parallel to both ends of the electromagnetic coil of the fourth relay. The normally closed contact of the fourth relay Connected to the discharge circuit of the battery to the load, the discharge indicator LED11 is connected to the normally closed contact of the fourth relay and then connected in parallel to both ends of the battery;
由于第一电压迟滞比较器的输出信号太小无法直接驱动第三继电器工作,因此采用Q3、Q4构成复合三极管驱动第三继电器(一端连接充电输入端口IN1的正端,一端连接Q4的发射极)来实现蓄电池充电控制,蓄电池放电控制类似;Since the output signal of the first voltage hysteresis comparator is too small to directly drive the third relay, Q3 and Q4 are used to form a composite transistor to drive the third relay (one end is connected to the positive end of the charging input port IN1, and the other end is connected to the emitter of Q4) To realize battery charging control, battery discharge control is similar;
第一电压迟滞比较器的上门限电压下门限电压其中VR1为上述第一基准电压,VZ为输出端稳压二极管的稳压值,令上门限电压Vp1=过充关断电压14.5V,下门限电压Vp2=充电关断恢复电压13.5V,则可以计算出第一电阻R1和第一反馈电阻R2的比值以及所需的第一基准电压VR1的数值;The upper threshold voltage of the first voltage hysteresis comparator lower threshold voltage Where V R1 is the above-mentioned first reference voltage, V Z is the voltage stabilization value of the output Zener diode, let the upper threshold voltage V p1 = overcharge shutdown voltage 14.5V, and the lower threshold voltage V p2 = charge shutdown recovery voltage 13.5 V, then the ratio of the first resistor R1 and the first feedback resistor R2 and the required value of the first reference voltage V R1 can be calculated;
在特性曲线中,调节稳压二极管ZD1的数值,可使第一电压迟滞比较器的特性曲线上下移动,稳压二极管ZD1的数值取可使特性曲线挪至输出高电平1、低电平0时的数值;In the characteristic curve, adjusting the value of the Zener diode ZD1 can move the characteristic curve of the first voltage hysteresis comparator up and down. The value of the Zener diode ZD1 can move the characteristic curve to the output high level 1 and low level 0. time value;
同理,第二电压迟滞比较器的上门限电压下门限电压/>其中VR2为上述第二基准电压,VZ为输出端稳压二极管的稳压值,令上门限电压Vp1=放电关断恢复电压11.5V,下门限电压Vp2=过放关断电压11V,则可以计算出第三电阻R3和第二反馈电阻R4的比值以及所需的第二基准电压VR2的数值;In the same way, the upper threshold voltage of the second voltage hysteresis comparator Lower threshold voltage/> Where V R2 is the above-mentioned second reference voltage, V Z is the voltage stabilization value of the output Zener diode, let the upper threshold voltage V p1 = discharge shutdown recovery voltage 11.5V, and the lower threshold voltage V p2 = over-discharge shutdown voltage 11V , then the ratio of the third resistor R3 and the second feedback resistor R4 and the required value of the second reference voltage V R2 can be calculated;
同理,稳压二极管ZD2的数值取可使第二电压迟滞比较器的特性曲线挪至输出高电平1、低电平0时的数值;In the same way, the value of the Zener diode ZD2 can move the characteristic curve of the second voltage hysteresis comparator to the value when it outputs high level 1 and low level 0;
稳压二极管ZD1的特性是,在第一电压迟滞比较器的输出端输出高电平时,对该高电平进行稳压,在第一电压迟滞比较器的输出端输出低电平时,不对该输出低电平产生影响,稳压二极管ZD2同理;The characteristic of the zener diode ZD1 is that when the output terminal of the first voltage hysteresis comparator outputs a high level, the high level is stabilized, and when the output terminal of the first voltage hysteresis comparator outputs a low level, the voltage is not stabilized. Low level has an impact, and the same applies to the Zener diode ZD2;
于是,可以实现,当蓄电池的端电压低于过充关断电压14.5V时,第一电压迟滞比较器U14A发生翻转输出低电平,该低电平使NPN型的复合三极管截止,具体是,低电平使NPN三极管Q3截止,Q3输出高电平,使PNP三极管Q4截止,于是第三继电器的电磁线圈K3A不上电,双向开关K3B的常开触点断开,使充电输入端口IN1断开对蓄电池的充电,K3B的常闭触点闭合,使过充关断指示灯LED9点亮,此过充关断状态一直维持到蓄电池的端电压降低至充电关断恢复电压13.5V;此后当蓄电池的端电压降低至所述充电关断恢复电压13.5V时,第一电压迟滞比较器U14A发生翻转输出高电平,该高电平使NPN型的复合三极管导通,具体是,高电平使NPN三极管Q3导通,Q3输出低电平,使PNP三极管Q4导通,于是第三继电器的电磁线圈K3A上电,于是K3B的常闭触点断开,使过充关断指示灯LED9不点亮,K3B的常开触点闭合,使充电输入端口IN1恢复对蓄电池的充电,K3A上电还使充电指示灯LED8点亮,此充电状态一直维持到蓄电池的端电压上升至充电关断电压14.5V;Therefore, it can be realized that when the terminal voltage of the battery is lower than the overcharge shutdown voltage of 14.5V, the first voltage hysteresis comparator U14A flips and outputs a low level. This low level causes the NPN type composite transistor to cut off. Specifically, The low level turns off the NPN transistor Q3, and the output of Q3 is high, which turns off the PNP transistor Q4. Therefore, the electromagnetic coil K3A of the third relay is not powered, and the normally open contact of the bidirectional switch K3B is disconnected, causing the charging input port IN1 to be disconnected. When the battery charging is turned on, the normally closed contact of K3B is closed, causing the overcharge shutdown indicator LED9 to light up. This overcharge shutdown state is maintained until the terminal voltage of the battery drops to the charge shutdown recovery voltage of 13.5V; thereafter, when When the terminal voltage of the battery drops to the charge shutdown recovery voltage of 13.5V, the first voltage hysteresis comparator U14A flips and outputs a high level. This high level causes the NPN type composite transistor to conduct. Specifically, the high level The NPN transistor Q3 is turned on, and Q3 outputs a low level, which turns the PNP transistor Q4 on. Then the electromagnetic coil K3A of the third relay is powered on, and the normally closed contact of K3B is disconnected, causing the overcharge shutdown indicator LED9 to turn off. Lights up, and the normally open contact of K3B closes, allowing the charging input port IN1 to resume charging the battery. When K3A is powered on, the charging indicator LED8 lights up. This charging state is maintained until the terminal voltage of the battery rises to the charging shutdown voltage. 14.5V;
于是,可以实现,当蓄电池的端电压高于放电关断电压11V时,第二电压迟滞比较器U14B输出低电平,该低电平使NPN型的复合三极管截止,具体是,NPN三极管Q5截止,Q5输出高电平,使PNP三极管Q6截止,于是第四继电器的电磁线圈K4A不上电,K4B的常闭触点闭合,接通蓄电池对负载的放电,K4B的常闭触点闭合还使放电指示灯LED11点亮,第四继电器的电磁线圈K4A不上电使过放关断指示灯LED10不点亮,此放电状态维持直到蓄电池的端电压降低至过放关断电压11V;当蓄电池的端电压达到过放关断电压11V时,第二电压迟滞比较器U14B发生翻转输出高电平,该高电平使NPN型的复合三极管导通,具体是,高电平使NPN三极管Q5导通,Q5输出低电平,使PNP三极管Q6导通,于是第四继电器的电磁线圈K4A上电,K4B的常闭触点断开,断开蓄电池对负载的放电,K4A上电还使过放关断指示灯LED10点亮,K4B的常闭触点断开还使放电指示灯LED11不点亮,此放电关断状态一直维持到蓄电池的端电压上升至放电关断恢复电压12V。其中,BT+连接蓄电池的正端。Therefore, it can be realized that when the terminal voltage of the battery is higher than the discharge shutdown voltage of 11V, the second voltage hysteresis comparator U14B outputs a low level, and the low level causes the NPN type composite transistor to turn off, specifically, the NPN transistor Q5 turns off , Q5 outputs a high level, causing the PNP transistor Q6 to cut off, so the electromagnetic coil K4A of the fourth relay is not powered, and the normally closed contact of K4B is closed, turning on the battery to discharge the load, and the normally closed contact of K4B is also closed. The discharge indicator LED11 lights up, and the electromagnetic coil K4A of the fourth relay is not powered on so that the over-discharge shutdown indicator LED10 does not light up. This discharge state is maintained until the terminal voltage of the battery drops to the over-discharge shutdown voltage of 11V; when the battery's When the terminal voltage reaches the over-discharge shutdown voltage of 11V, the second voltage hysteresis comparator U14B flips and outputs a high level. This high level turns on the NPN type composite transistor. Specifically, the high level turns on the NPN transistor Q5. , Q5 outputs a low level, causing the PNP transistor Q6 to conduct, so the electromagnetic coil K4A of the fourth relay is powered on, and the normally closed contact of K4B is disconnected, disconnecting the battery from discharging to the load. When K4A is powered on, it also turns off the over-discharge The disconnection indicator LED10 lights up, and the disconnection of the normally closed contact of K4B also makes the discharge indicator LED11 not light up. This discharge shutdown state is maintained until the terminal voltage of the battery rises to the discharge shutdown recovery voltage of 12V. Among them, BT+ is connected to the positive terminal of the battery.
第一电压迟滞比较器U14A和第二电压迟滞比较器U14B通过三端可调稳压器U13供电,U13采用芯片LM317,LM317的输入端连接蓄电池,可实现在输入电压变化的情况下稳压输出,调节RP5可改变输出电压的大小,LM317的输出端VCC1连接第一、第二电压迟滞比较器的正电源端。The first voltage hysteresis comparator U14A and the second voltage hysteresis comparator U14B are powered by the three-terminal adjustable voltage regulator U13. U13 uses the chip LM317. The input end of the LM317 is connected to the battery, which can achieve a stable voltage output when the input voltage changes. , adjusting RP5 can change the size of the output voltage. The output terminal VCC1 of LM317 is connected to the positive power supply terminals of the first and second voltage hysteresis comparators.
蓄电池充放电比较控制模块的充电输入端口IN1连接光伏市电互补组合逻辑控制模块的输出端口OUT1。图5中的OUT2为蓄电池对负载的放电端口。The charging input port IN1 of the battery charge and discharge comparison control module is connected to the output port OUT1 of the photovoltaic mains complementary combination logic control module. OUT2 in Figure 5 is the discharge port of the battery to the load.
蓄电池充放电比较控制模块在充电输入端口IN1和蓄电池之间接入防止电流反充的二极管D0,用于防止蓄电池向充电输入端口IN1放电。第三继电器的正端不连接蓄电池的正端而是连接充电输入端口IN1的正端,可以减少蓄电池的功耗,更加省电。The battery charge and discharge comparison control module connects a diode D0 to prevent current reverse charging between the charging input port IN1 and the battery to prevent the battery from discharging to the charging input port IN1. The positive terminal of the third relay is not connected to the positive terminal of the battery but to the positive terminal of the charging input port IN1, which can reduce the power consumption of the battery and save more power.
以下解释反相电压迟滞比较器的工作原理。图6是反向电压迟滞比较器的电路图,图7为反相电压迟滞比较器的传输特性图,只有当输入电压达到U上限时,反相电压迟滞比较器才输出低电平,此后输入电压只要不下降至U下限则继续输出低电平,只有当输入电压下降至U下限时,反相电压迟滞比较器才翻转输出高电平,此后输入电压只要不上升至U上限则继续输出高电平。The following explains the working principle of the inverting voltage hysteresis comparator. Figure 6 is the circuit diagram of the reverse voltage hysteresis comparator. Figure 7 is the transmission characteristic diagram of the inverting voltage hysteresis comparator. Only when the input voltage reaches the upper limit of U, the inverting voltage hysteresis comparator outputs a low level. After that, the input voltage As long as it does not drop to the lower limit of U, it will continue to output a low level. Only when the input voltage drops to the lower limit of U, the inverting voltage hysteresis comparator will flip and output a high level. After that, as long as the input voltage does not rise to the upper limit of U, it will continue to output a high level. flat.
图8为本实施例中第一电压迟滞比较器U14A的传输特性图,其构成充电回路,其中,U上限为14.5V,U下限为13.5V。图9为本实施例中第二电压迟滞比较器U14B的传输特性图,其构成放电回路,图中,U上限为12V,U下限为11V。下表二为蓄电池电压对应的充放电状态。Figure 8 is a transmission characteristic diagram of the first voltage hysteresis comparator U14A in this embodiment, which forms a charging circuit, in which the upper limit of U is 14.5V and the lower limit of U is 13.5V. Figure 9 is a transmission characteristic diagram of the second voltage hysteresis comparator U14B in this embodiment, which constitutes a discharge circuit. In the diagram, the upper limit of U is 12V and the lower limit of U is 11V. Table 2 below shows the charging and discharging states corresponding to the battery voltage.
表二 蓄电池电压对应的充放电状态Table 2 Charging and discharging states corresponding to battery voltage
本实施例中,如图10所示,本发明还包括用于采集蓄电池的端电压并显示的蓄电池电压采集及显示模块,其采用A/D转换芯片ICL7107,通过电压采集电路连接蓄电池的两端,电压采集电路在图10中如右侧所示,电压采样电路的采样点Test_in连接ICL7107的31脚的高位输入端,该ICL7107的输出端直接驱动四个LED数码管,通过R29设定小数点位,使显示范围为±19.99,于是可实现标称电压为12V的蓄电池的端电压显示。四个LED数码管为共阳极LED数码管。Test1按键用于检测电路信号完整性,按下后LED数码管输出字符“1888”。In this embodiment, as shown in Figure 10, the invention also includes a battery voltage acquisition and display module for collecting and displaying the terminal voltage of the battery, which uses the A/D conversion chip ICL7107 to connect both ends of the battery through a voltage acquisition circuit. , the voltage acquisition circuit is shown on the right side in Figure 10. The sampling point Test_in of the voltage sampling circuit is connected to the high input terminal of pin 31 of ICL7107. The output terminal of ICL7107 directly drives four LED digital tubes, and the decimal point is set through R29 , so that the display range is ±19.99, so the terminal voltage display of the battery with a nominal voltage of 12V can be realized. The four LED digital tubes are common anode LED digital tubes. The Test1 button is used to test the circuit signal integrity. When pressed, the LED digital tube outputs the character "1888".
ICL7107的36脚基准电压需由调节RP7校准在100毫伏,27、28、29脚是0.22uF,47kΩ,0.47uF的阻容网络,由此实现A/D转换输出。ICL7107和LED数码管构成了数字式电压表。The 36-pin reference voltage of ICL7107 needs to be calibrated to 100 millivolts by adjusting RP7. Pins 27, 28, and 29 are 0.22uF, 47kΩ, and 0.47uF resistor-capacitor networks, thereby achieving A/D conversion output. ICL7107 and LED digital tube constitute a digital voltmeter.
所述电源模块如图11、12所示,电源模块包括双15V电源、双5V电源。双15V电源由市电经变压器、整流器、滤波电容后连接两个三端稳压器LM7815,分别输出+15V和-15V电源,输出正常时,LED1和LED2点亮,整流器和滤波电容之间有控制开关S2;双5V电源由双15V电源得到的±15V电源经滤波电容后连接两个三端稳压器LM7805,分别输出+5V和-5V电源,输出正常时,LED3和LED4点亮,±15V电源和滤波电容之间有控制开关S3。The power module is shown in Figures 11 and 12. The power module includes dual 15V power supplies and dual 5V power supplies. The dual 15V power supply is connected to the two three-terminal voltage regulators LM7815 through the transformer, rectifier and filter capacitor from the mains. They output +15V and -15V power respectively. When the output is normal, LED1 and LED2 light up. There is a gap between the rectifier and the filter capacitor. Control switch S2; Dual 5V power supply The ±15V power supply obtained from the dual 15V power supply is connected to two three-terminal voltage regulators LM7805 after filtering capacitors, which output +5V and -5V power supply respectively. When the output is normal, LED3 and LED4 light up, ± There is a control switch S3 between the 15V power supply and the filter capacitor.
本发明中12V蓄电池的过充关断电压、充电关断恢复电压、放电关断电压、放电关断恢复电压不仅限于上述实施例中所述的14.5V、13.5V、11V、12V,可以在一定范围内做调整。比如,优选地,过充关断电压可以为14.1~14.5V,充电关断恢复电压可以为13.1~13.5V,放电关断电压可以为10.8~11.5V,放电关断恢复电压可以为11.5~12V。In the present invention, the overcharge shutdown voltage, charge shutdown recovery voltage, discharge shutdown voltage, and discharge shutdown recovery voltage of the 12V battery are not limited to 14.5V, 13.5V, 11V, and 12V as described in the above embodiments, and can be within a certain range. Make adjustments within the range. For example, preferably, the overcharge shutdown voltage can be 14.1~14.5V, the charge shutdown recovery voltage can be 13.1~13.5V, the discharge shutdown voltage can be 10.8~11.5V, and the discharge shutdown recovery voltage can be 11.5~12V .
上述实施例仅仅是本发明技术构思实现形式的列举,并不用以限制本发明的保护范围,凡依本发明的技术构思所作的等同替换和改进等,均应包含在本发明的保护范围之内。The above embodiments are merely enumerations of implementation forms of the technical concept of the present invention and are not intended to limit the scope of protection of the present invention. All equivalent replacements and improvements made based on the technical concept of the present invention shall be included in the scope of protection of the present invention. .
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