CN106816948A - A kind of 12V batteries photovoltaic commercial power complementation charge and discharge maintenance device - Google Patents

Abstract

A 12V battery photovoltaic mains mutual supplementary discharge maintenance device, including photovoltaic mains complementary combination logic control module, battery charge and discharge comparison control module, by setting the ratio of R1 and R2, the ratio of R3 and R4, the first and second When the terminal voltage of the battery reaches the overcharge cut-off voltage, the first voltage hysteresis comparator cuts off the charging of the battery through the third relay, and the overcharge shutdown state is maintained until the terminal voltage of the battery reaches the charging voltage. Shut-off recovery voltage, when the charging shutdown recovery voltage is reached, the charging of the battery will resume. When the terminal voltage of the battery reaches the over-discharge cut-off voltage, the second voltage hysteresis comparator cuts off the discharge of the load through the fourth relay. The discharge shutdown state is maintained until the terminal voltage of the battery reaches the discharge shutdown recovery voltage. The invention can automatically detect the state of the storage battery, and perform automatic charging and discharging, shutdown control, and shutdown recovery control.

Description

A 12V battery photovoltaic mains mutual supplementary discharge maintenance device

technical field

The invention relates to a photovoltaic mains complementary discharge maintenance device for storage batteries with a nominal voltage of 12V.

Background technique

In daily life, because batteries are portable and reusable, many commonly used electronic devices or instruments are powered by 12V batteries. Most of these electronic devices are portable. With the development of renewable energy, It will become a trend to use photovoltaic and mains complementary methods to charge batteries. In addition, the correct charging and discharging method not only saves costs, but also effectively prolongs the service life of the battery. The ideal terminal voltage range of a battery with a nominal voltage of 12V is 12V to 13.5V. Whether the battery is in an over-discharged state or an over-charged state will affect The service life of the battery, during the use of the battery with a nominal voltage of 12V, try to avoid the terminal voltage of the battery being less than 12V or higher than 14.5V for a long time.

A battery that has been in an over-discharged or overcharged state for a long time, because the internal conductive ions cannot be effectively excited, will greatly affect its service life due to improper use. Users often do not know the remaining power of the battery when using the battery. Timely and effective charging and discharging may lead to insufficient power or unstable use of the device during work.

Contents of the invention

Aiming at the above-mentioned deficiencies in the prior art, the present invention provides a 12V storage battery photovoltaic mains mutual supplementary discharge maintenance device, which can detect the state of the storage battery with a nominal voltage of 12V, and perform automatic charge and discharge and shutdown control, so that The voltage of the battery has been stable for a long time within a relatively normal range.

In order to solve the problems of the technologies described above, the present invention adopts the following technical solutions:

A 12V battery photovoltaic mains complementary discharge maintenance device, including a power module, a photovoltaic mains complementary combination logic control module, and a battery charge and discharge comparison control module, the nominal voltage of the battery is 12V;

The photovoltaic mains complementary combination logic control module includes a non-self-locking button, the non-self-locking button realizes the binary addition counting of the number of buttons through the double D trigger counting module, and the output end of the non-self-locking button also triggers a data through a delay circuit The output of the latch circuit, the output ends of the two D flip-flops of the double D trigger counting module are connected to the data input end of the data latch circuit, and a data output end of the data latch circuit is connected to the first relay through an optocoupler isolation circuit , the contact of the first relay can connect the output port OUT1 to the photovoltaic interface P1 for charging, the other data output end of the data latch circuit is connected to the second relay through the optocoupler isolation circuit, and the contact of the second relay can connect the output port OUT1 to The mains interface P2 is charged, and the output levels of the two D flip-flops of the double-D trigger counting module can make the output port OUT1 separately connected to the photovoltaic interface and one of the mains interfaces for charging, and simultaneously connected to the photovoltaic interface and the mains interface for charging , and in the shutdown mode, neither the photovoltaic interface nor the mains interface will charge the output port;

A first diode to prevent current reverse charging is connected between the photovoltaic interface P1 and the output port, and a second diode to prevent current reverse charging is connected between the mains interface P2 and the output port. When P1 and the mains interface P2 are charging the output port at the same time, the first diode can prevent the current from being fed back to the photovoltaic interface when the mains charging is dominant, and the second diode can prevent the current from being fed back when the photovoltaic charging is dominant. To the mains power interface, so as to prevent the photovoltaic power supply or the mains power supply from being damaged;

The battery charge and discharge comparison control module includes a first voltage hysteresis comparator and a second voltage hysteresis comparator which are inverting voltage hysteresis comparators, and the non-inverting input terminal of the first voltage hysteresis comparator is connected to the first voltage hysteresis comparator through the first resistor R1 The positive terminal of the reference voltage V _R1 is connected with the first feedback resistor R2 between its non-inverting input terminal and output terminal, its inverting input terminal is connected to the positive terminal of the storage battery, and the non-inverting input terminal of the second voltage hysteresis comparator passes through the first feedback resistor R2. The three resistors R3 are connected to the positive terminal of the second reference voltage V _R2 , the second feedback resistor R4 is connected between the same input terminal and the output terminal, and the negative input terminal is connected to the positive terminal of the storage battery; the first voltage hysteresis comparator The output terminal is connected to the electromagnetic coil of the third relay through the NPN transistor, the charging indicator is connected in parallel at both ends of the electromagnetic coil of the third relay, and the normally closed contact of the third relay is connected in parallel with the output port OUT1 after being connected with the overcharge shutdown indicator , its normally open contact is connected to the charging circuit of the battery on the output port OUT1; the output terminal of the second voltage hysteresis comparator is connected to the electromagnetic coil of the fourth relay through the NPN transistor, and the over-discharge shutdown indicator is connected in parallel to the fourth relay At both ends of the electromagnetic coil, the normally closed contact of the fourth relay is connected to the discharge circuit of the battery to the load, and the discharge indicator is connected in parallel to both ends of the battery after being connected to the normally closed contact of the fourth relay;

The upper threshold voltage of the first voltage hysteresis comparator lower threshold voltage Where _{VR1 is the above-mentioned first reference voltage, V Z is} the regulated voltage value of the Zener diode at the output terminal, if the upper threshold voltage V _p1 = the overcharge shutdown voltage, and the lower threshold voltage V _p2 = the charging shutdown recovery voltage, then it can be Calculate the ratio of the first resistor R1 to the first feedback resistor R2 and the required value of the first reference voltage V _R1 ;

Similarly, the upper threshold voltage of the second voltage hysteresis comparator lower threshold voltage Where _VR2 is the second reference voltage above, V _Z is the regulated voltage value of the Zener diode at the output terminal, if the upper threshold voltage V _p1 = the discharge shutdown recovery voltage, and the lower threshold voltage V _p2 = the over-discharge shutdown voltage, then it can be Calculate the ratio between the third resistor R3 and the second feedback resistor R4 and the required value of the second reference voltage V _R2 ;

When the terminal voltage of the battery rises to the overcharge shutdown voltage, the first voltage hysteresis comparator flips and outputs a low level, which disconnects the charging of the battery through the NPN transistor and the third relay, and the overcharge shutdown indicator light Lights up, and the overcharge shutdown state is maintained until the terminal voltage of the battery drops to the charging shutdown recovery voltage. When the charging shutdown recovery voltage is reached, the first voltage hysteresis comparator turns to high level, and the charging of the battery is turned on. At this time, the charging indicator light is on; when the terminal voltage of the battery drops to the over-discharge cut-off voltage, the second voltage hysteresis comparator flips and outputs a high level, which cuts off the discharge of the battery to the load through the NPN transistor and the fourth relay , at this time the over-discharge shutdown indicator light is on, and the over-discharge shutdown state is maintained until the terminal voltage of the battery reaches the discharge shutdown recovery voltage, and when the discharge shutdown recovery voltage is reached, the first voltage hysteresis comparator flips to a low level , turn on the discharge of the battery, at this time the discharge indicator light is on.

Further, the first reference voltage V _R1 is composed of a first adjustable DC power supply, and the second reference voltage V _R2 is composed of a second adjustable DC power supply; the battery charge and discharge comparison control module is connected between the output port OUT1 and the battery The diode D0 that prevents current reverse charging prevents the battery from discharging to the output port OUT1.

Further, the double D flip-flop counting module includes a cascaded first D flip-flop and a second D flip-flop, the clock end of the first D flip-flop is connected to the output end of the button anti-shake circuit, and the first D flip-flop The D terminal of the second D flip-flop is connected to its reverse output terminal, the D terminal of the second D flip-flop is connected to its reverse output terminal, and the reverse output terminal of the first flip-flop is connected to the D terminal of the second D flip-flop, thus forming an asynchronous clock A binary addition and counting module, wherein the second flip-flop is a high-order output, and the first flip-flop is a low-order output;

The reverse output terminal of the first D flip-flop and the reverse output terminal of the second D flip-flop of the double D trigger counting module are connected to the data latch circuit, and a data output terminal IN0_out of the data latch circuit is passed through an optocoupler The isolation circuit and the PNP transistor Q1 are connected to the first relay. When the data output terminal IN0_out of the data latch circuit outputs a low level, the PNP transistor Q1 is turned on through the optocoupler isolation circuit, and the first relay is powered on. The open contact is closed, so that the output port OUT1 is connected to the photovoltaic interface P1 for charging;

The other data output terminal IN1_out of the data latch circuit is connected to the second relay through the optocoupler isolation circuit and the PNP transistor Q2. When the data output terminal IN1_out of the data latch circuit outputs a low level, the optocoupler isolation circuit makes the PNP transistor Q2 Conduction, the second relay is powered on, the normally open contact of the second relay is closed, so that the output port OUT1 is connected to the mains interface P2 for charging;

When the data output terminal IN0_out and the data output terminal IN1_out of the data latch circuit U7 both output low level, it can be seen that it can drive the first relay and the second relay to be powered on at the same time, so that the photovoltaic interface P1 and the mains interface P2 are output at the same time Port OUT1 power supply;

When both the data output terminals IN0_out and the data output terminals IN1_out of the data latch circuit U7 output high levels, this is a shutdown mode, and neither the photovoltaic interface nor the mains interface supplies power to the output port OUT1.

Further, the positive output terminals of the first D flip-flop and the second D flip-flop of the double D flip-flop are connected to the decoder, the first D flip-flop is connected to the low input end of the decoder, and the second D flip-flop Connect to the high-order input terminal of the decoder, the decoder converts the input binary code into decimal and displays it through the digital tube, thereby displaying the number of key presses of non-self-locking keys.

Preferably, the non-self-locking button is a double-pole double-throw switch S1, one knife of the double-pole double-throw switch S1 is connected to the input end of the button anti-shake circuit, and the other knife of the double-pole double-throw switch S1 is connected to the delay At the trigger end of the circuit, the two switch blades of the double-pole double-throw switch are linked, and the non-opening end of the double-pole double-throw switch S1 is grounded;

The button anti-shake circuit is an RS flip-flop anti-shake circuit, the RS flip-flop anti-shake circuit is composed of two NAND gates connected, after the double-pole double-throw switch S1 is pressed and released, the RS flip-flop anti-shake The output terminal of the circuit triggers the double-D trigger counting module to start working through the rising edge level, and the first D flip-flop and the second D flip-flop of the double-D trigger counting module are both rising-edge level triggers;

The delay circuit adopts a 555 delay trigger circuit, which is a low-level trigger and starts to delay until the high level after the non-self-locking button is released makes the charging capacitor C13 charge to a certain voltage, and the 555 delay trigger circuit The output terminal only outputs low level to trigger the data latch circuit to output data. The delay time of the 555 delay trigger circuit can be realized by adjusting its charging capacitor C13 and adjustable resistor R7.

Further, the 12V battery photovoltaic mains mutual supplementary discharge maintenance device also includes a battery voltage acquisition and display module. The battery voltage acquisition and display module uses an A/D conversion chip ICL7107, which is connected to both ends of the battery through a voltage acquisition circuit. The sampling point of the sampling circuit is connected to the high-level input terminal of ICL7107, and the output terminal of the ICL7107 directly drives four LED digital tubes. By setting the decimal point, the display range is ±19.99, which can realize the terminal voltage of the battery with a nominal voltage of 12V. Display, ICL7107 and LED digital tube form a digital voltmeter.

Preferably, the overcharge cut-off voltage of the storage battery is 14.1-14.5V, the charge cut-off recovery voltage is 13.1-13.5V, the over-discharge cut-off voltage is 10.8-12V, and the discharge cut-off recovery voltage is 11.5-12V.

Preferably, the NPN transistor is an NPN-type composite transistor, which is composed of an NPN transistor and a PNP transistor cascaded. When the input terminal is at a high level, the NPN-type composite transistor is turned on, and when the input terminal is at a low level , NPN composite triode cut-off.

Preferably, the overcharge shutdown voltage of the battery is 14.5V, the charging shutdown recovery voltage is 13.5V, the overdischarge shutdown voltage is 11V, and the discharge shutdown recovery voltage is 12V.

Preferably, the delay circuit uses a chip NE555, the data latch circuit uses a chip 74HC573, the double D flip-flop uses a chip 74LS74, and the decoder uses a chip 74LS47.

The beneficial effects of the present invention are: (1) It can automatically detect the state of the storage battery with a nominal voltage of 12V, thereby performing automatic charge and discharge and overcharge shutdown control, overdischarge shutdown control, and charge shutdown recovery control, Discharge cut-off recovery control keeps the voltage of the battery stable in a relatively normal range for a long time, which can improve the working efficiency and service life of the battery; the user does not need to manually control the charge and discharge shutdown and recovery of the battery according to the terminal voltage of the battery, and the degree of automation is high ;

(2) The output level of the two D flip-flops of the double-D trigger counting module makes the output port OUT1 separately connected to the photovoltaic interface, one of the mains interface for charging, and simultaneously connected to the photovoltaic interface and the mains interface for charging, and in the stop mode Both the photovoltaic interface and the mains interface do not charge the output port OUT1; it is in line with the development direction of renewable new energy and has the advantages of energy saving and environmental protection.

Description of drawings

Fig. 1 is one of the circuit diagrams of the combined logic control module of photovoltaic mains complementary combination of the present invention.

Fig. 2 is the second circuit diagram of the photovoltaic mains complementary combination logic control module of the present invention.

Fig. 3 is the third circuit diagram of the combined logic control module of photovoltaic mains complementary combination of the present invention.

Fig. 4 is the fourth circuit diagram of the combined logic control module of photovoltaic mains complementary combination of the present invention.

FIG. 5 is a schematic circuit diagram of a battery charging and discharging comparison control module according to an embodiment of the present invention.

FIG. 6 is a circuit diagram of a non-inverting voltage hysteresis comparator.

FIG. 7 is a transfer characteristic diagram of a non-inverting voltage hysteresis comparator.

FIG. 8 is a transfer characteristic diagram of the first voltage hysteresis comparator according to the embodiment of the present invention.

FIG. 9 is a transfer characteristic diagram of the second voltage hysteresis comparator according to the embodiment of the present invention.

Fig. 10 is a circuit diagram of a battery voltage acquisition and display module according to an embodiment of the present invention.

Fig. 11 is a circuit diagram of dual 15V power supplies of the power supply module according to the embodiment of the present invention.

FIG. 12 is a circuit diagram of dual 5V power supplies of the power supply module according to the embodiment of the present invention.

detailed description

The present invention will be further described in detail below in conjunction with the accompanying drawings and examples. It should be understood that the examples described here are only used to specifically illustrate the implementation of the present invention, and are not intended to limit the present invention.

Refer to Figure 1-12: A 12V battery photovoltaic mains complementary discharge maintenance device, including a power module, a photovoltaic mains complementary combination logic control module, and a battery charge and discharge comparison control module. The nominal voltage of the battery is 12V.

The photovoltaic mains complementary combination logic control module includes a non-self-locking button, which in this embodiment is a double-pole double-throw switch S1 linked by two switch blades, and one switch blade of the double-pole double-throw switch S1 passes through the RS button The anti-shake circuit is connected to the double-D trigger counting module, and the other knife of the double-pole double-throw switch is connected to the delay circuit U6, that is, the 4-terminal key_in of the double-pole double-throw switch in the figure is connected to the trigger terminal TRIG of the delay circuit U6. When the double-pole double-throw switch S1 is pressed, key_in is low, and the delay circuit U6 is triggered;

The output terminal of the delay circuit U6 is connected to the enable terminal OE of the data latch circuit U7, and the reverse output terminals IN0 and IN1 of each D flip-flop of the double D trigger counting module are connected to the data input terminal of the data latch circuit U7 After the delay circuit U6 delays for a certain period of time, the data output terminals IN0_out and IN1_out of the data latch circuit U7 are triggered to output the data of the data input terminals IN0 and IN1 correspondingly; the data output terminal IN0_out of the data latch circuit U7 passes through The optocoupler isolation circuit U9 and the PNP transistor Q1 are connected to the first relay K1. When the data output terminal IN0_out of the data latch circuit outputs a low level, the optocoupler isolation circuit U9 is turned on, the PNP transistor Q1 is turned on, and the first relay K1 is turned on. Electricity, the normally open contact of the first relay K1 is closed, so that the output port OUT1 is connected to the photovoltaic interface P1. In the figure, the positive terminal of the photovoltaic interface P1 is connected to the K+ of the output port OUT1 through D5, and the negative terminal of the photovoltaic interface P1 is The normally open contact is connected to K— of the output port OUT1;

The other data output terminal IN1_out of the data latch circuit U7 is connected to the second relay K2 through the optocoupler isolation circuit U12 and the PNP transistor Q2. When the data output terminal IN1_out of the data latch circuit outputs a low level, the optocoupler isolation circuit U12 conducts On, the PNP transistor Q2 is turned on, the second relay K2 is powered on, and the normally open contact of the second relay K2 is closed, so that the output port OUT1 is connected to the mains interface P2, and the output port OUT1 is used to connect to the battery for charging;

When the two data output terminals IN0_out and IN1_out of the data latch circuit U7 both output low level, drive the first relay K1 and the second relay K2 to power on at the same time, so that both the photovoltaic interface P1 and the mains interface P2 supply power to the output port OUT1 , that is to charge the battery at the same time; when the data output terminal IN0_out and the data output terminal IN1_out of the data latch circuit U7 both output high levels, this is the shutdown mode, and neither the photovoltaic interface nor the mains interface supplies power to the output port OUT1;

The delay circuit U6 is used to wait for the completion of the input of the non-self-locking key and the final output of the double D trigger counting module to trigger the output of the data latch circuit;

A first diode D5 to prevent current reverse charging is connected between the photovoltaic interface P1 and the output port OUT1, and a second diode D7 to prevent current reverse charging is connected between the mains interface P2 and the output port OUT1. When the photovoltaic interface P1 and the mains interface P2 charge the output port OUT1 at the same time, the first diode D5 can prevent the current from being fed back to the photovoltaic interface when the mains charging is dominant, and the second diode D7 can prevent the photovoltaic charging from being dominant. At the same time, its current is fed back to the mains interface, so as to prevent the photovoltaic power supply or the mains power supply from being damaged;

The double D flip-flop counting module includes cascaded first D flip-flop U11A and second D flip-flop U11B, the clock end of the first D flip-flop is connected to the output end of the RS button anti-shake circuit, and the first D flip-flop The D terminal of the second D flip-flop is connected to its reverse output terminal, the D terminal of the second D flip-flop is connected to its reverse output terminal, and the reverse output terminal of the first flip-flop is connected to the D terminal of the second D flip-flop, thus forming an asynchronous clock A binary addition and counting module, wherein the second flip-flop is a high-order output, and the first flip-flop is a low-order output;

The RS flip-flop anti-shake circuit is formed by connecting two NAND gates U10A and U10B. When the non-self-locking button is pressed, its 1 terminal is low level, no matter whether the non-self-locking button is released or not, as long as it does not touch its 3 terminal, U10A always outputs a low level, realizing the anti-shake function of the button . After the non-self-locking button is pressed and released to contact with its 3 terminals, U10A outputs the rising edge level, the clock terminal CLK of the double D trigger counting module is a rising edge trigger, U10A outputs the rising edge level, and the double D trigger counting module’s The clock terminal CLK is triggered by a rising edge. In Figure 6, U11B is a high-order output, and U11A is a low-order output. U11B and U11A realize the addition and counting of 00, 01, 10, and 11 in sequence;

The specific process is that the logic function of the D flip-flop is: Q ⁿ⁺¹ = D, and the 74LS74 is triggered by a rising edge. Therefore, in the figure, IN0=D0, IN1=D1, assuming that in the initial state, the outputs of the first and second D flip-flops are both 0, that is, A=0, B=0; then the first and second D flip-flops The reverse output terminals of the flip-flops are all 1, that is, IN0=1, IN1=1, so the state of the D terminals of the first and second D flip-flops is D0=1, D1=1; when the output of the RS flip-flop anti-shake circuit terminal, that is, when the clock terminal CLK of the first D flip-flop changes from 0 to 1 for the first time, the state of U11A changes to A=1, IN0=0, D0=0; IN0=0 makes the clock terminal CLK of U11B be Falling edge pulse, so the state of U11B does not change, that is, B=0, IN1=1, D1=1, at this time, the output of the double D trigger counting module (from high to low) is 01, that is, B=0, A=1;

When the clock terminal CLK of the first D flip-flop changes from 0 to 1 for the second time, the state of U11A changes to A=0, IN0=1, D0=1; IN0=1 makes the clock terminal CLK of U11B a rising edge pulse, so the U11B state change is B=1, IN1=0, D1=0, at this time the output of the double D trigger counting module (from high to low) is 10, that is, B=1, A=0;

When the clock terminal CLK of the first D flip-flop changes from 0 to 1 for the third time, the state of U11A changes to A=1, IN0=0, D0=0; IN0=0 makes the clock terminal CLK of U11B a falling edge Pulse, so there is no change in the state of U11B, that is, B=1, IN1=0, D1=0, at this time, the output of the double D trigger counting module (from high to low) is 11, that is, B=1, A=1;

When the clock terminal CLK of the first D flip-flop changes from 0 to 1 for the fourth time, the state of U11A changes to A=0, IN0=1, D0=1; IN0=1 makes the clock terminal CLK of U11B a rising edge pulse, so the U11B state changes to B=0, IN1=1, D1=1, and the output of the double D trigger counting module (from high to low) is 00, that is, B=0, A=0, so that the logic relationship returns to the initial state, thereby achieving the effect of adding count.

According to the connection circuit between IN0 and IN1 of the double-D trigger counting module through the data latch and the first relay and the second relay, it can be seen that in the initial state where the output of the double-D trigger counting module is 00, press the button once, and IN0= 0, IN1=1 connect the output port OUT1 to the photovoltaic interface for power supply, press the button twice, IN0=1, IN1=0 connect the output port OUT1 to the mains interface for power supply, press the button three times, IN0=0, IN1=0 The output port OUT1 is connected to the photovoltaic interface and the mains interface for power supply at the same time. Press the button four times to return to the initial state. This is the shutdown mode. At this time, IN0=1, IN1=1 so that the photovoltaic interface and the mains interface are not output ports. OUT1 supplies power.

Table 1 Output status of the combined logic control module of photovoltaic mains complementary combination

In this embodiment, the positive output terminals of the first D flip-flop U11A and the second D flip-flop U11B of the double D flip-flops are connected to the decoder U8, the decoder U8 uses a chip 74LS74, and the first D flip-flop U11A Connect the low-order input terminal of the decoder U8, the second D flip-flop U11B is connected to the high-order input terminal of the decoder U8, the decoder U8 converts the binary code output by the double D trigger counting module into decimal, and displays it through the digital tube , which can display the number of key presses of non-self-locking keys, and thus prompt the corresponding output status.

In this embodiment, the delay circuit is a 555 delay trigger circuit, and the output end of the non-self-locking button is connected to the TRIG end of the 555 trigger circuit, which is a low-level trigger, and starts timing after triggering until the non-self-locking button After the key is released, the high level causes the charging capacitor C13 to charge to a certain voltage, and the output terminal of the 555 delay trigger circuit outputs a low level to trigger the output of the data latch circuit 74HCT573, thus realizing the delay, and the 555 delay The delay time of the trigger circuit is jointly implemented by the charging capacitor C13 and the adjustable resistor R7.

The battery charge and discharge comparison control module includes a first voltage hysteresis comparator U14A and a second voltage hysteresis comparator U14B which are inverting voltage hysteresis comparators. Connect the positive terminal of the first reference voltage V _R1 , the first feedback resistor R2 is connected between the same input terminal and the output terminal, the negative input terminal is connected to the positive terminal of the storage battery, and the output terminal is connected to the Zener diode ZD1. The non-inverting input terminal of the two-voltage hysteresis comparator U14B is connected to the positive terminal of the second reference voltage _VR2 through the third resistor R3, and the second feedback resistor R4 is connected between the same-inverting input terminal and the output terminal, and the inverting input terminal Connect the positive end of the storage battery, the output end of which is connected to the Zener diode ZD2, the first reference voltage V _R1 is formed by the first adjustable DC power supply, and the second reference voltage V _R2 is formed by the second adjustable DC power supply;

The output terminal of the first voltage hysteresis comparator U14A is connected to the electromagnetic coil of the third relay through an NPN composite transistor (consisting of cascaded NPN transistor Q3 and PNP transistor Q4), and the charging indicator is connected in parallel to both ends of the electromagnetic coil of the third relay , the normally closed contact of the third relay is connected to the overcharge shutdown indicator LED10 and connected in parallel to both ends of the charging input port IN1, and its normally open contact is connected to the charging circuit of the charging input port IN1 to the battery; the second voltage hysteresis comparison The output end of the device U14B is connected to the electromagnetic coil of the fourth relay through the NPN compound transistor (Q3, Q4), the over-discharge shutdown indicator LED10 is connected in parallel to both ends of the electromagnetic coil of the fourth relay, and the normally closed contact of the fourth relay Connected to the discharge circuit of the battery to the load, the discharge indicator LED11 is connected to the normally closed contact of the fourth relay and connected in parallel to both ends of the battery;

Since the output signal of the first voltage hysteresis comparator is too small to directly drive the third relay, Q3 and Q4 are used to form a composite transistor to drive the third relay (one end is connected to the positive end of the charging input port IN1, and the other end is connected to the emitter of Q4) To achieve battery charging control, battery discharge control is similar;

The upper threshold voltage of the first voltage hysteresis comparator lower threshold voltage Among them, V _R1 is the above-mentioned first reference voltage, V _Z is the voltage regulation value of the Zener diode at the output terminal, so that the upper threshold voltage V _p1 = overcharge shutdown voltage 14.5V, and the lower threshold voltage V _p2 = charge shutdown recovery voltage 13.5 V, then the ratio of the first resistor R1 to the first feedback resistor R2 and the required value of the first reference voltage V _R1 can be calculated;

In the characteristic curve, adjusting the value of Zener diode ZD1 can move the characteristic curve of the first voltage hysteresis comparator up and down, and the value of Zener diode ZD1 can move the characteristic curve to output high level 1 and low level 0 value at the time;

Similarly, the upper threshold voltage of the second voltage hysteresis comparator lower threshold voltage Among them, V _R2 is the above-mentioned second reference voltage, V _Z is the regulated voltage value of the Zener diode at the output end, so that the upper threshold voltage V _p1 = discharge shutdown recovery voltage 11.5V, and the lower threshold voltage V _p2 = over-discharge shutdown voltage 11V , then the ratio of the third resistor R3 to the second feedback resistor R4 and the required value of the second reference voltage V _R2 can be calculated;

Similarly, the value of the Zener diode ZD2 is the value that can move the characteristic curve of the second voltage hysteresis comparator to output high level 1 and low level 0;

The characteristic of Zener diode ZD1 is that when the output terminal of the first voltage hysteresis comparator outputs a high level, the high level is stabilized, and when the output terminal of the first voltage hysteresis comparator outputs a low level, the output is not The low level has an effect, and the Zener diode ZD2 is the same;

Therefore, it can be realized that when the terminal voltage of the storage battery is lower than the overcharge cut-off voltage of 14.5V, the first voltage hysteresis comparator U14A flips and outputs a low level, which makes the NPN composite transistor cut off, specifically, The low level makes the NPN transistor Q3 cut off, and Q3 outputs a high level to make the PNP transistor Q4 cut off, so the electromagnetic coil K3A of the third relay is not powered on, the normally open contact of the bidirectional switch K3B is disconnected, and the charging input port IN1 is disconnected. Turn on the charging of the battery, the normally closed contact of K3B is closed, so that the overcharge shutdown indicator LED9 lights up, and the overcharge shutdown state is maintained until the terminal voltage of the battery drops to the charging shutdown recovery voltage of 13.5V; When the terminal voltage of the storage battery drops to the charging shutdown recovery voltage of 13.5V, the first voltage hysteresis comparator U14A flips and outputs a high level, and the high level makes the NPN composite triode conduct, specifically, the high level The NPN transistor Q3 is turned on, and Q3 outputs low level, so that the PNP transistor Q4 is turned on, so the electromagnetic coil K3A of the third relay is powered on, and the normally closed contact of K3B is disconnected, so that the overcharge shutdown indicator LED9 is not activated. Light up, the normally open contact of K3B is closed, so that the charging input port IN1 resumes charging the battery, K3A is powered on and the charging indicator LED8 is also lit, and this charging state is maintained until the terminal voltage of the battery rises to the charging cut-off voltage 14.5V;

Therefore, it can be realized that when the terminal voltage of the storage battery is higher than the discharge cut-off voltage 11V, the second voltage hysteresis comparator U14B outputs a low level, and the low level causes the NPN composite transistor to be cut off, specifically, the NPN transistor Q5 is turned off , Q5 outputs a high level, so that the PNP transistor Q6 is cut off, so the electromagnetic coil K4A of the fourth relay is not powered on, the normally closed contact of K4B is closed, and the discharge of the battery to the load is connected, and the normally closed contact of K4B is also closed. The discharge indicator LED11 lights up, and the electromagnetic coil K4A of the fourth relay is not powered on so that the over-discharge shutdown indicator LED10 does not light up, and this discharge state is maintained until the terminal voltage of the battery drops to the over-discharge shutdown voltage 11V; when the battery When the terminal voltage reaches the over-discharge cut-off voltage of 11V, the second voltage hysteresis comparator U14B flips and outputs a high level, and the high level makes the NPN composite transistor conduct, specifically, the high level makes the NPN transistor Q5 conduct , Q5 outputs a low level, so that the PNP transistor Q6 is turned on, so the electromagnetic coil K4A of the fourth relay is powered on, the normally closed contact of K4B is disconnected, and the discharge of the battery to the load is disconnected, and the over-discharge is turned off when K4A is powered on. The indicator light LED10 is turned on, and the normally closed contact of K4B is disconnected so that the discharge indicator LED11 is not turned on. This discharge off state is maintained until the terminal voltage of the storage battery rises to the discharge off recovery voltage 12V. Among them, BT+ is connected to the positive end of the battery.

The first voltage hysteresis comparator U14A and the second voltage hysteresis comparator U14B are powered by the three-terminal adjustable voltage regulator U13. U13 uses the chip LM317, and the input end of the LM317 is connected to the battery, which can realize the output voltage regulation under the condition of the input voltage change. , Adjusting RP5 can change the size of the output voltage, the output terminal VCC1 of LM317 is connected to the positive power supply terminal of the first and second voltage hysteresis comparators.

The charging input port IN1 of the battery charge and discharge comparison control module is connected to the output port OUT1 of the photovoltaic mains complementary combined logic control module. OUT2 in Figure 5 is the discharge port of the battery to the load.

The battery charge and discharge comparison control module connects a diode D0 between the charging input port IN1 and the battery to prevent current reverse charging, so as to prevent the battery from discharging to the charging input port IN1. The positive terminal of the third relay is not connected to the positive terminal of the battery but is connected to the positive terminal of the charging input port IN1, which can reduce the power consumption of the battery and save more power.

The working principle of the inverting voltage hysteresis comparator is explained below. Figure 6 is the circuit diagram of the reverse voltage hysteresis comparator, and Figure 7 is the transfer characteristic diagram of the reverse voltage hysteresis comparator. As long as it does not fall to the lower limit of U, it will continue to output low level. Only when the input voltage drops to the lower limit of U, the inverting voltage hysteresis comparator will reverse and output high level. After that, as long as the input voltage does not rise to the upper limit of U, it will continue to output high level. flat.

FIG. 8 is a transfer characteristic diagram of the first voltage hysteresis comparator U14A in this embodiment, which constitutes a charging circuit, wherein the upper limit of U is 14.5V, and the lower limit of U is 13.5V. FIG. 9 is a transfer characteristic diagram of the second voltage hysteresis comparator U14B in this embodiment, which constitutes a discharge circuit. In the figure, the upper limit of U is 12V, and the lower limit of U is 11V. Table 2 below shows the charging and discharging status corresponding to the battery voltage.

Table 2 Charge and discharge status corresponding to battery voltage

In this embodiment, as shown in Figure 10, the present invention also includes a battery voltage acquisition and display module for collecting and displaying the terminal voltage of the battery, which uses an A/D conversion chip ICL7107, and connects the two ends of the battery through a voltage acquisition circuit , the voltage acquisition circuit is shown on the right side in Figure 10, the sampling point Test_in of the voltage sampling circuit is connected to the high input end of pin 31 of ICL7107, the output end of the ICL7107 directly drives four LED digital tubes, and the decimal point is set through R29 , so that the display range is ±19.99, so the terminal voltage display of the battery with a nominal voltage of 12V can be realized. The four LED digital tubes are common anode LED digital tubes. The Test1 button is used to test the signal integrity of the circuit, and the LED digital tube outputs the character "1888" after being pressed.

The 36-pin reference voltage of ICL7107 needs to be calibrated at 100 millivolts by adjusting RP7, and the 27, 28, and 29 pins are 0.22uF, 47kΩ, 0.47uF resistance-capacitance network, thereby realizing A/D conversion output. ICL7107 and LED digital tube constitute a digital voltmeter.

The power module is shown in Figures 11 and 12. The power module includes dual 15V power supplies and dual 5V power supplies. The dual 15V power supply is connected to two three-terminal voltage regulators LM7815 from the mains through a transformer, rectifier, and filter capacitor to output +15V and -15V power respectively. When the output is normal, LED1 and LED2 are lit, and there is a Control switch S2; dual 5V power supply. The ±15V power obtained from the dual 15V power supply is connected to two three-terminal voltage regulators LM7805 after passing through the filter capacitor to output +5V and -5V power respectively. When the output is normal, LED3 and LED4 are on, ± There is a control switch S3 between the 15V power supply and the filter capacitor.

The overcharge shutdown voltage, charge shutdown recovery voltage, discharge shutdown voltage, and discharge shutdown recovery voltage of the 12V storage battery in the present invention are not limited to the 14.5V, 13.5V, 11V, and 12V described in the above embodiments, and can be Adjust within the range. For example, preferably, the overcharge shutdown voltage can be 14.1-14.5V, the charging shutdown recovery voltage can be 13.1-13.5V, the discharge shutdown voltage can be 10.8-11.5V, and the discharge shutdown recovery voltage can be 11.5-12V .

The above-mentioned embodiments are only enumerations of the implementation forms of the technical concept of the present invention, and are not intended to limit the protection scope of the present invention. All equivalent replacements and improvements made according to the technical concept of the present invention shall be included in the protection scope of the present invention. .

Claims (10)

1. A 12V battery photovoltaic mains complementary discharge maintenance device, characterized in that: it includes a power module, a photovoltaic mains complementary combination logic control module, and a battery charge and discharge comparison control module, and the nominal voltage of the battery is 12V; The photovoltaic mains complementary combination logic control module includes a non-self-locking button, the non-self-locking button realizes the binary addition counting of the number of buttons through the double D trigger counting module, and the output end of the non-self-locking button also triggers a data through a delay circuit The output of the latch circuit, the output ends of the two D flip-flops of the double D trigger counting module are connected to the data input end of the data latch circuit, and a data output end of the data latch circuit is connected to the first relay through an optocoupler isolation circuit , the contact of the first relay can connect the output port OUT1 to the photovoltaic interface P1 for charging, the other data output end of the data latch circuit is connected to the second relay through the optocoupler isolation circuit, and the contact of the second relay can connect the output port OUT1 to The mains interface P2 is charged, and the output levels of the two D flip-flops of the double-D trigger counting module can make the output port OUT1 separately connected to the photovoltaic interface and one of the mains interfaces for charging, and simultaneously connected to the photovoltaic interface and the mains interface for charging , and in the shutdown mode, neither the photovoltaic interface nor the mains interface will charge the output port; A first diode to prevent current reverse charging is connected between the photovoltaic interface P1 and the output port, and a second diode to prevent current reverse charging is connected between the mains interface P2 and the output port. When P1 and the mains interface P2 are charging the output port at the same time, the first diode can prevent the current from being fed back to the photovoltaic interface when the mains charging is dominant, and the second diode can prevent the current from being fed back when the photovoltaic charging is dominant. To the mains power interface, so as to prevent the photovoltaic power supply or the mains power supply from being damaged; The battery charge and discharge comparison control module includes a first voltage hysteresis comparator and a second voltage hysteresis comparator which are inverting voltage hysteresis comparators, and the non-inverting input terminal of the first voltage hysteresis comparator is connected to the first voltage hysteresis comparator through the first resistor R1 The positive terminal of the reference voltage V _R1 is connected with the first feedback resistor R2 between its non-inverting input terminal and output terminal, its inverting input terminal is connected to the positive terminal of the storage battery, and the non-inverting input terminal of the second voltage hysteresis comparator passes through the first feedback resistor R2. The three resistors R3 are connected to the positive terminal of the second reference voltage V _R2 , the second feedback resistor R4 is connected between the same input terminal and the output terminal, and the negative input terminal is connected to the positive terminal of the storage battery; the first voltage hysteresis comparator The output terminal is connected to the electromagnetic coil of the third relay through the NPN transistor, the charging indicator is connected in parallel at both ends of the electromagnetic coil of the third relay, and the normally closed contact of the third relay is connected in parallel with the output port OUT1 after being connected with the overcharge shutdown indicator , its normally open contact is connected to the charging circuit of the battery on the output port OUT1; the output terminal of the second voltage hysteresis comparator is connected to the electromagnetic coil of the fourth relay through the NPN transistor, and the over-discharge shutdown indicator is connected in parallel to the fourth relay At both ends of the electromagnetic coil, the normally closed contact of the fourth relay is connected to the discharge circuit of the battery to the load, and the discharge indicator is connected in parallel to both ends of the battery after being connected to the normally closed contact of the fourth relay; The upper threshold voltage of the first voltage hysteresis comparator lower threshold voltage Where _{VR1 is the above-mentioned first reference voltage, V Z is} the regulated voltage value of the Zener diode at the output terminal, if the upper threshold voltage V _p1 = the overcharge shutdown voltage, and the lower threshold voltage V _p2 = the charging shutdown recovery voltage, then it can be Calculate the ratio of the first resistor R1 to the first feedback resistor R2 and the required value of the first reference voltage V _R1 ; Similarly, the upper threshold voltage of the second voltage hysteresis comparator lower threshold voltage Where _VR2 is the second reference voltage above, V _Z is the regulated voltage value of the Zener diode at the output terminal, if the upper threshold voltage V _p1 = the discharge shutdown recovery voltage, and the lower threshold voltage V _p2 = the over-discharge shutdown voltage, then it can be Calculate the ratio between the third resistor R3 and the second feedback resistor R4 and the required value of the second reference voltage V _R2 ; Therefore, when the terminal voltage of the battery rises to the overcharge shutdown voltage, the first voltage hysteresis comparator flips and outputs a low level, which cuts off the charging of the battery through the NPN transistor and the third relay, and at this time the overcharge shutdown The indicator light is on, and the overcharge shut-off state is maintained until the terminal voltage of the battery drops to the charging shut-off recovery voltage. When the charging shut-off recovery voltage is reached, the first voltage hysteresis comparator flips to a high level, and the power to the battery is turned on. Charging, at this time the charging indicator light is on; when the terminal voltage of the battery drops to the over-discharge cut-off voltage, the second voltage hysteresis comparator flips and outputs a high level, which disconnects the battery from the load through the NPN transistor and the fourth relay. At this time, the over-discharge shutdown indicator light is on, and the over-discharge shutdown state is maintained until the terminal voltage of the battery reaches the discharge shutdown recovery voltage. When the discharge shutdown recovery voltage is reached, the first voltage hysteresis comparator turns low. level, turn on the discharge of the battery, and the discharge indicator light is on at this time. 2. A 12V battery photovoltaic mains mutual supplementary discharge maintenance device as claimed in claim 1, characterized in that: the first reference voltage V _R1 is composed of a first adjustable DC power supply, and the second reference voltage V _R2 is composed of The second adjustable DC power supply is formed; the battery charge and discharge comparison control module connects a diode D0 between the output port OUT1 and the battery to prevent current reverse charging, so as to prevent the battery from discharging to the output port OUT1. 3. A 12V storage battery photovoltaic mains complementary discharge maintenance device according to claim 1 or 2, characterized in that: the double D trigger counting module includes cascaded first D flip-flops and second D flip-flops , the clock end of the first D flip-flop is connected to the output end of the button anti-shake circuit, the D end of the first D flip-flop is connected to its reverse output end, and the D end of the second D flip-flop is connected to its reverse output end, The reverse output end of the first flip-flop is connected to the D end of the second D flip-flop, thus forming a binary addition and counting module of an asynchronous clock, wherein the second flip-flop is a high-order output, and the first flip-flop is a low-order output; The reverse output terminal of the first D flip-flop and the reverse output terminal of the second D flip-flop of the double D trigger counting module are connected to the data latch circuit, and a data output terminal IN0_out of the data latch circuit is passed through an optocoupler The isolation circuit and the PNP transistor Q1 are connected to the first relay. When the data output terminal IN0_out of the data latch circuit outputs a low level, the PNP transistor Q1 is turned on through the optocoupler isolation circuit, and the first relay is powered on. The open contact is closed, so that the output port OUT1 is connected to the photovoltaic interface P1 for charging; The other data output terminal IN1_out of the data latch circuit is connected to the second relay through the optocoupler isolation circuit and the PNP transistor Q2. When the data output terminal IN1_out of the data latch circuit outputs a low level, the optocoupler isolation circuit makes the PNP transistor Q2 Conduction, the second relay is powered on, the normally open contact of the second relay is closed, so that the output port OUT1 is connected to the mains interface P2 for charging; When the data output terminal IN0_out and the data output terminal IN1_out of the data latch circuit U7 both output low level, it can be seen that it can drive the first relay and the second relay to be powered on at the same time, so that the photovoltaic interface P1 and the mains interface P2 are output at the same time Port OUT1 power supply; When both the data output terminals IN0_out and the data output terminals IN1_out of the data latch circuit U7 output high levels, this is a shutdown mode, and neither the photovoltaic interface nor the mains interface supplies power to the output port OUT1. 4. A 12V battery photovoltaic mains mutual supplementary discharge maintenance device as claimed in claim 1, characterized in that: the positive output terminals of the first D flip-flop and the second D flip-flop of the double D flip-flop are connected Decoder, the first D flip-flop is connected to the low-order input of the decoder, and the second D flip-flop is connected to the high-order input of the decoder. The decoder converts the input binary code into decimal and displays it through the digital tube , which can display the number of key presses of non-self-locking keys. 5. A 12V battery photovoltaic mains mutual supplementary discharge maintenance device as claimed in claim 1, characterized in that: it also includes a battery voltage acquisition and display module, and the battery voltage acquisition and display module uses an A/D conversion chip ICL7107, which The two ends of the battery are connected through the voltage acquisition circuit, and the sampling point of the voltage sampling circuit is connected to the high input terminal of ICL7107. The output terminal of the ICL7107 directly drives four LED digital tubes. By setting the decimal point, the display range is ±19.99, which can be To realize the display of the terminal voltage of the storage battery with a nominal voltage of 12V, ICL7107 and LED digital tube constitute a digital voltmeter. 6. A 12V battery photovoltaic mains mutual supplementary discharge maintenance device as claimed in claim 3, characterized in that: the non-self-locking button is a double-pole double-throw switch S1, a switch blade of the double-pole double-throw switch S1 Connect the input end of the button anti-shake circuit, the other switch blade of the double-pole double-throw switch S1 is connected to the trigger end of the delay circuit, the two switch blades of the double-pole double-throw switch are linked, and the non-opening and closing of the double-pole double-throw switch S1 terminal grounding; The button anti-shake circuit is an RS flip-flop anti-shake circuit, the RS flip-flop anti-shake circuit is composed of two NAND gates connected, after the double-pole double-throw switch S1 is pressed and released, the RS flip-flop anti-shake The output terminal of the circuit triggers the double-D trigger counting module to start working through the rising edge level, and the first D flip-flop and the second D flip-flop of the double-D trigger counting module are both rising-edge level triggers; The delay circuit adopts a 555 delay trigger circuit, which is a low-level trigger and starts to delay until the high level after the non-self-locking button is released makes the charging capacitor C13 charge to a certain voltage, and the 555 delay trigger circuit The output terminal only outputs low level to trigger the data latch circuit to output data. The delay time of the 555 delay trigger circuit can be realized by adjusting its charging capacitor C13 and adjustable resistor R7. 7. A 12V battery photovoltaic mains mutual supplementary discharge maintenance device as claimed in claim 2, characterized in that: the overcharge cut-off voltage of the battery is 14.1-14.5V, and the charge-off recovery voltage is 13.1-13.5V V, the over-discharge shutdown voltage is 10.8-12V, and the discharge shutdown recovery voltage is 11.5-12V. 8. A 12V storage battery photovoltaic mains mutual supplementary discharge maintenance device as claimed in claim 1, characterized in that: said NPN triode is an NPN type composite triode, which is composed of an NPN triode and a PNP triode connected in cascade, When the input terminal is at a high level, the NPN composite transistor is turned on, and when the input terminal is at a low level, the NPN composite transistor is turned off. 9. A 12V storage battery photovoltaic mains complementary discharge maintenance device as claimed in claim 7, characterized in that: the overcharge shutdown voltage of the storage battery is 14.5V, the charging shutdown recovery voltage is 13.5V, and the overdischarge voltage is 14.5V. The shutdown voltage is 11V, and the discharge shutdown recovery voltage is 12V. 10. A 12V battery photovoltaic mains complementary discharge maintenance device as claimed in claim 6, characterized in that: the delay circuit uses a chip NE555, the data latch circuit uses a chip 74HC573, and the double D flip-flop uses a chip 74LS74 , The decoder uses the chip 74LS47.