CN106816398A - Semiconductor processing equipment - Google Patents
Semiconductor processing equipment Download PDFInfo
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- CN106816398A CN106816398A CN201510867500.XA CN201510867500A CN106816398A CN 106816398 A CN106816398 A CN 106816398A CN 201510867500 A CN201510867500 A CN 201510867500A CN 106816398 A CN106816398 A CN 106816398A
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- Prior art keywords
- air inlet
- processing equipment
- gas
- semiconductor processing
- valve
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/3244—Gas supply means
- H01J37/32449—Gas control, e.g. control of the gas flow
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32798—Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
- H01J37/32853—Hygiene
- H01J37/32871—Means for trapping or directing unwanted particles
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Analytical Chemistry (AREA)
- Public Health (AREA)
- Epidemiology (AREA)
- Health & Medical Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
The present invention provides a kind of semiconductor processing equipment, including reaction chamber, technique gas circuit and blow device, wherein, the bogey for fixed wafer is provided with reaction chamber；Technique gas circuit is used for conveying process gas in reaction chamber.Blow device includes air inlet pipeline and source of the gas, wherein, source of the gas is used to provide purge gas to air inlet pipeline；Air inlet pipeline is arranged in the chamber wall of reaction chamber, and the inlet end of air inlet pipeline is connected with source of the gas, the outlet side of air inlet pipeline is arranged in the chamber sidewall of reaction chamber, to convey purge gas towards upper wafer surface and along the direction parallel to upper wafer surface.The semiconductor processing equipment that the present invention is provided, it can remove the particle dropped in upper wafer surface before and after technique, such that it is able to avoid partial etching defect, and then can improve product yield.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, in particular it relates to a kind of semiconductor adds
Construction equipment.
Background technology
Shallow groove isolation etching is one of most important technique in IC manufacturing, and it is direct
Affect the electrical property and stability of device.For shallow groove isolation etching technique, etching defect
Control be to improve the most key factor of product yield, in actual production, etching defect
Generation be primarily due to before etching and etching after have large-sized particulate matter and drop in chip
Surface, causes etched features to be destroyed, so as to directly influence product yield.
Fig. 1 is the sectional view of existing semiconductor processing equipment.Fig. 1 is referred to, semiconductor adds
Construction equipment includes reaction chamber 1, and electrostatic chuck 2 is provided with the reaction chamber 1, is used for
Bearing wafer 3, and electrostatic chuck 2 electrically connects with grid bias power supply 7.In reaction chamber 1
Coil 5 is provided with above top medium window, it is electrically connected with excitation power supply 6.And,
The top medium window of reaction chamber 1 is additionally provided with central nozzle 4, to in reaction chamber 1
Conveying process gas.When technique is carried out, excitation power supply 6 loads radio-frequency power to coil 5,
Plasma is formed with the process gas in provocative reaction chamber 1, and grid bias power supply 7 is to crystalline substance
Piece 3 is biased, and to attract plasma to be moved towards wafer surface, and etches wafer surface.
In actual applications, larger-size is often had before and after technique is performed etching
Grain drops, and these particles are attached to wafer surface and cause etching defect, so as to have a strong impact on product
Yield.
The content of the invention
It is contemplated that at least solving one of technical problem present in prior art, it is proposed that
A kind of semiconductor processing equipment, its can be removed before and after technique drop upper wafer surface
Grain, such that it is able to avoid partial etching defect, and then can improve product yield.
A kind of semiconductor processing equipment is provided to realize the purpose of the present invention, including reaction chamber
Room and technique gas circuit, wherein, the carrying for fixed wafer is provided with the reaction chamber
Device；The technique gas circuit is used for process gas is conveyed in the reaction chamber, also including blowing
Sweeping device, the blow device include air inlet pipeline and source of the gas, wherein, the source of the gas be used for
The air inlet pipeline provides the purge gas；The air inlet pipeline is arranged on the reaction chamber
Chamber wall in, and the inlet end of the air inlet pipeline is connected with the source of the gas, the air inlet pipe
The outlet side on road is arranged in the chamber sidewall of the reaction chamber, to towards on the chip
Surface and along parallel to the upper wafer surface direction convey purge gas.
Preferably, the quantity of the outlet side of the air inlet pipeline for multiple, and be divided into one group or
Multigroup outlet group, multigroup outlet group is along perpendicular to the direction of upper wafer surface interval point
Cloth；Multiple outlet sides in the outlet group are divided along the chamber sidewall interval of the reaction chamber
Cloth, and it is highly identical relative to the upper wafer surface.
Preferably, between the outlet side and the Waffer edge being placed on the bogey
The span of level interval is in 0.5~5cm.
Preferably, the level interval is 1cm.
Preferably, the air inlet pipeline includes tie point and the second branch road, described first
Road and the second branch road are parallel with one another, and are connected between the inlet end and the outlet side, its
In, the first on-off valve and first-class control valve, described are provided with the tie point
One on-off valve is used to be switched on or switched off the tie point；The first-class control valve is used to adjust
Save the throughput of the tie point；The second on-off valve and are provided with second branch road
Two flow control valves, second on-off valve is used to be switched on or switched off second branch road；It is described
Second control valve is used to adjust the throughput of second branch road.
Preferably, after the bogey fixes the chip, and technique is being carried out
Before, first on-off valve connects the tie point, and second on-off valve disconnects described
Second branch road, while the first-class control valve adjusts to first throughput of tie point
Preset value；Release and it is fixed to the chip in the completion technique, and the bogey
Afterwards, first on-off valve disconnects the tie point, and second on-off valve connects described the
Two branch roads, while the second control valve adjusts to second pre- the throughput of the second branch road
If value.
Preferably, the span of first preset value is in 500~1000sccm.
Preferably, first preset value is 800sccm.
Preferably, the span of second preset value is in 200~500sccm.
Preferably, the purge gas include nitrogen or inert gas.
The invention has the advantages that：
The semiconductor processing equipment that the present invention is provided, it is provided with blow device, purging dress
Put including air inlet pipeline and source of the gas, by the chamber wall that air inlet pipeline is arranged on reaction chamber
It is interior, and the inlet end of the air inlet pipeline is connected with source of the gas, the outlet side of air inlet pipeline is arranged on instead
Answer in the chamber sidewall of chamber, to towards upper wafer surface and along parallel to the chip upper table
Face direction conveying purge gas, can be removed before and after technique drop upper wafer surface
Grain, such that it is able to avoid partial etching defect, and then can improve product yield.
Brief description of the drawings
Fig. 1 is the sectional view of existing semiconductor processing equipment；
Fig. 2 is the sectional view of semiconductor processing equipment provided in an embodiment of the present invention；
Fig. 3 is the front view of the outlet side of the air inlet pipeline that the present embodiment is used.
Specific embodiment
To make those skilled in the art more fully understand technical scheme, tie below
Accompanying drawing is closed to be described in detail the semiconductor processing equipment that the present invention is provided.
Fig. 2 is the sectional view of semiconductor processing equipment provided in an embodiment of the present invention.Refer to
Fig. 2, semiconductor processing equipment includes reaction chamber 100, technique gas circuit and blow device, its
In, in the bogey 11 being internally provided with for fixed wafer 12 of reaction chamber 100,
It is electrically connected with grid bias power supply 22.The bogey 11 can use electrostatic chuck or machinery
Chuck etc..Also, the top of the top medium window 101 in reaction chamber 100 is provided with coil
23, it is electrically connected with excitation power supply 25.And, in the top medium window of reaction chamber 100
101 are additionally provided with central nozzle 24, and technique gas circuit is by the central nozzle 24 to reaction chamber
Conveying process gas in 100.When technique is carried out, using process gas road direction reaction chamber 100
Process gas is inside passed through, and opens excitation power supply 25, so that it loads radio frequency work(to coil 23
Rate, so that the process gas in provocative reaction chamber 100 forms plasma, and bias plasma
Source 22 is biased to chip 12, to attract plasma to be moved towards wafer surface, and carves
Erosion wafer surface.
Blow device includes air inlet pipeline and source of the gas 21, wherein, source of the gas 21 is used for air inlet pipe
Road provides purge gas, and the purge gas use the inertia of nitrogen or argon gas, helium etc.
Gas, will not react with process gas.Air inlet pipeline is arranged on the chamber of reaction chamber 100
In locular wall, and the inlet end 20 of the air inlet pipeline is connected with source of the gas 21, the outlet of air inlet pipeline
End 19 is arranged in the chamber sidewall 10 of reaction chamber 100, to towards the upper of chip 12
Surface and along parallel to the upper surface of chip 12 direction convey purge gas.Carrying out technique
It is front and rear, laterally purged (along the direction parallel to the upper wafer surface) by above-mentioned blow device
The upper surface of chip 12, can remove the particle dropped in upper wafer surface, such that it is able to avoid
Partial etching defect, and then product yield can be improved.
In the present embodiment, air inlet pipeline includes the branch road 14 of tie point 13 and second, the two
It is parallel with one another, and be connected between inlet end 20 and outlet side 19, wherein, in tie point
The first on-off valve 15 and first-class control valve 17 are provided with 13, the first on-off valve 15 is used
In being switched on or switched off tie point 13；First-class control valve 17 is used to adjust tie point 13
Throughput；The second on-off valve 16 and second control valve are provided with the second branch road 14
18, the second on-off valve 16 is used to be switched on or switched off the second branch road 14；Second control valve 18
Throughput for adjusting the second branch road 14.Above-mentioned on-off valve can be oscillatory valve or butterfly valve etc..
Flow control valve can be mass flowmenter (MFC), choke valve or flow speed control valve etc..
After the fixed wafer 12 of bogey 11, such as bogey 11 is electrostatic chuck,
For stably fixed wafer 12 by the way of Electrostatic Absorption, and before technique is carried out,
First on-off valve 15 connects tie point 13, and the second on-off valve 16 disconnects the second branch road 14,
First-class control valve 17 adjusts to the first preset value the throughput of tie point 13 simultaneously,
First preset value can set as the case may be, as long as the purge gas of conveying can be removed
Particle on the upper surface of chip 12, and because chip 12 is electrostatically adsorbed, even if adopting
With larger throughput, the position of chip 12 will not also offset, such that it is able to by size compared with
Big particle blows off, and is taken away these particles by extract system, and then can keep chip
The cleaning of 12 upper surfaces, is prevented effectively from partial etching defect, such that it is able to improve product yield.
The span of above-mentioned first preset value is in 500~1000sccm, it is preferred that be 800sccm.
Completing technique, and after bogey 11 releases the fixation to chip 12, for example
Electrostatic chuck releases the Electrostatic Absorption to chip 12, and now the first on-off valve 15 disconnects first
Road 13, the second on-off valve 16 connects the second branch road 14, while second control valve 18 will
The throughput of the second branch road 14 is adjusted to the second preset value.Because bogey 11 has released right
The fixation of chip 12, above-mentioned second preset value should use less value, to ensure chip 12
Position will not shift, influence follow-up to take piece operation, the value model of second preset value
It is trapped among 200~500sccm, it is preferred that be 300sccm.
In actual applications, it is possible to use microprocessor automatically control above-mentioned first on-off valve 15,
The work of first-class control valve 17, the second on-off valve 16 and second control valve 18,
And can realize according to the specific purging first-class control valve 17 of situation real-time regulation and/or
Second control valve 18 separately or individually adjusts the branch road 14 of tie point 13 and/or second
Throughput.
Fig. 3 is the front view of the outlet side of the air inlet pipeline that the present embodiment is used, and is referred to
Fig. 3, the quantity of the outlet side 19 of air inlet pipeline is multiple, and along the chamber of reaction chamber 100
Room side wall 10 is spaced apart, and highly identical relative to the upper surface of chip 12, such that it is able to
The air-flow width that increase enters in reaction chamber 100, to enable that purging scope covers chip
The regional of 12 upper surfaces.In actual applications, the quantity of outlet side can be according to chip
12 diameter and the precision of processing procedure and set, it is preferred that the quantity of outlet side is 3~10.
Certainly, in actual applications, the quantity of the outlet side of air inlet pipeline can also be one.
If it should be noted that be one group of outlet group by 19 points of mutually level outlet side, that
There is one group of outlet group in the present embodiment, but the invention is not limited in this, actually should
In, multigroup outlet group can also be divided into according to the difference of outlet side height, i.e., multigroup outlet group
Edge is spaced apart perpendicular to the direction of upper wafer surface, the multiple outlet side edges in every group of outlet group
The chamber sidewall of reaction chamber is spaced apart, and highly identical relative to upper wafer surface.
Additionally, it is preferred that, outlet side 19 and the edge of chip 12 being placed on bogey 11
Between level interval span in 0.5~5cm, to ensure to purge effect.It is further excellent
Choosing, level interval is 1cm.
Also, it should be noted that in actual applications, the outlet side of air inlet pipeline can be set
Optional position in chamber sidewall, as long as ensure that purging effect, if chamber sidewall
On be provided with medium window, it is also possible to outlet side is integrated on the medium window.In addition, air inlet pipe
Set-up mode of the road in the chamber wall of reaction chamber is also not limited to the present embodiment and is used
Mode, the present invention is not limited in this respect.
Explanation is needed further exist for, in the present embodiment, technique gas circuit is sprayed by the center
Mouth 24 to conveying process gas in reaction chamber 100, but the invention is not limited in this,
In actual applications, can also be using other any intake method conveying process gas.For example,
On the basis of central nozzle multiple can be being set up at the position of top medium window edge
Edge nozzle, it is symmetrical relative to central nozzle, technique gas circuit by each edge nozzle from
The top of reaction chamber equably internally conveys process gas.And for example, can also be in reaction chamber
The chamber sidewall of room sets multiple nozzles, and circumference along chamber sidewall is uniformly distributed, process gas
Road equably internally conveys process gas by each nozzle from the surrounding of reaction chamber.
In sum, semiconductor processing equipment provided in an embodiment of the present invention, it passes through to set
Above-mentioned blow device, can remove the particle dropped in upper wafer surface before and after technique, so that
Partial etching defect can be avoided, and then product yield can be improved.
It is understood that the principle that is intended to be merely illustrative of the present of embodiment of above and
The illustrative embodiments of use, but the invention is not limited in this.For in the art
For those of ordinary skill, without departing from the spirit and substance in the present invention, can do
Go out all variations and modifications, these variations and modifications are also considered as protection scope of the present invention.
Claims (10)
1. a kind of semiconductor processing equipment, including reaction chamber and technique gas circuit, wherein,
The bogey for fixed wafer is provided with the reaction chamber；The technique gas circuit is used for
To conveying process gas in the reaction chamber, it is characterised in that also including blow device, institute
Stating blow device includes air inlet pipeline and source of the gas, wherein,
The source of the gas is used to provide the purge gas to the air inlet pipeline；
The air inlet pipeline is arranged in the chamber wall of the reaction chamber, and the air inlet pipe
The inlet end on road is connected with the source of the gas, and the outlet side of the air inlet pipeline is arranged on the reaction
In the chamber sidewall of chamber, to towards the upper wafer surface and along parallel to the chip
The direction conveying purge gas of upper surface.
2. semiconductor processing equipment according to claim 1, it is characterised in that described
The quantity of the outlet side of air inlet pipeline is multiple, and is divided into one or more groups of outlet groups, described many
Group outlet group edge is spaced apart perpendicular to the direction of the upper wafer surface；
Multiple outlet sides in the outlet group are divided along the chamber sidewall interval of the reaction chamber
Cloth, and it is highly identical relative to the upper wafer surface.
3. semiconductor processing equipment according to claim 1, it is characterised in that described
The value model of the level interval between outlet side and the Waffer edge being placed on the bogey
It is trapped among 0.5~5cm.
4. semiconductor processing equipment according to claim 3, it is characterised in that described
Level interval is 1cm.
5. semiconductor processing equipment according to claim 1, it is characterised in that described
Air inlet pipeline includes tie point and the second branch road, and the tie point and the second branch road are mutually simultaneously
Connection, and be connected between the inlet end and the outlet side, wherein,
The first on-off valve and first-class control valve are provided with the tie point, it is described
First on-off valve is used to be switched on or switched off the tie point；The first-class control valve is used for
Adjust the throughput of the tie point；
The second on-off valve and second control valve are provided with second branch road, it is described
Second on-off valve is used to be switched on or switched off second branch road；The second control valve is used for
Adjust the throughput of second branch road.
6. semiconductor processing equipment according to claim 5, it is characterised in that in institute
After bogey is stated by chip fixation, and before technique is carried out, first break-make
Valve connects the tie point, and second on-off valve disconnects second branch road, while described
First-class control valve adjusts to the first preset value the throughput of tie point；
Completing the technique, and after the bogey is released to the fixation of the chip,
First on-off valve disconnects the tie point, and second on-off valve is connected described second
Road, while the throughput of the second branch road is adjusted to second and preset by the second control valve
Value.
7. semiconductor processing equipment according to claim 6, it is characterised in that described
The span of the first preset value is in 500~1000sccm.
8. semiconductor processing equipment according to claim 7, it is characterised in that described
First preset value is 800sccm.
9. semiconductor processing equipment according to claim 6, it is characterised in that described
The span of the second preset value is in 200~500sccm.
10. semiconductor processing equipment according to claim 1, it is characterised in that described
Purge gas include nitrogen or inert gas.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510867500.XA CN106816398A (en) | 2015-12-01 | 2015-12-01 | Semiconductor processing equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510867500.XA CN106816398A (en) | 2015-12-01 | 2015-12-01 | Semiconductor processing equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106816398A true CN106816398A (en) | 2017-06-09 |
Family
ID=59108182
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510867500.XA Pending CN106816398A (en) | 2015-12-01 | 2015-12-01 | Semiconductor processing equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106816398A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109210374A (en) * | 2017-06-30 | 2019-01-15 | 北京北方华创微电子装备有限公司 | Air inlet pipeline and semiconductor processing equipment |
| CN110767578A (en) * | 2019-10-31 | 2020-02-07 | 上海华力集成电路制造有限公司 | Method and tool for preventing maintenance of semiconductor etching equipment |
| CN110836330A (en) * | 2018-08-15 | 2020-02-25 | 北京北方华创微电子装备有限公司 | Method and apparatus for transporting chlorine-containing compound |
| CN114520137A (en) * | 2020-11-18 | 2022-05-20 | 中国科学院微电子研究所 | Device and method for removing particles on surface of electrostatic chuck of etching equipment |
| WO2023024159A1 (en) * | 2021-08-23 | 2023-03-02 | 长鑫存储技术有限公司 | Control method, device, and system for semiconductor manufacturing device, and storage medium |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20010041449A1 (en) * | 1998-03-20 | 2001-11-15 | Natsuko Ito | Method and apparatus for plasma etching |
| JP2007019174A (en) * | 2005-07-06 | 2007-01-25 | Matsushita Electric Ind Co Ltd | Plasma etching device |
| CN104241174A (en) * | 2013-06-14 | 2014-12-24 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Film magazine chamber, plasma processing device and method for purging film magazine chamber |
-
2015
- 2015-12-01 CN CN201510867500.XA patent/CN106816398A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20010041449A1 (en) * | 1998-03-20 | 2001-11-15 | Natsuko Ito | Method and apparatus for plasma etching |
| JP2007019174A (en) * | 2005-07-06 | 2007-01-25 | Matsushita Electric Ind Co Ltd | Plasma etching device |
| CN104241174A (en) * | 2013-06-14 | 2014-12-24 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Film magazine chamber, plasma processing device and method for purging film magazine chamber |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109210374A (en) * | 2017-06-30 | 2019-01-15 | 北京北方华创微电子装备有限公司 | Air inlet pipeline and semiconductor processing equipment |
| CN110836330A (en) * | 2018-08-15 | 2020-02-25 | 北京北方华创微电子装备有限公司 | Method and apparatus for transporting chlorine-containing compound |
| CN110836330B (en) * | 2018-08-15 | 2022-05-27 | 北京北方华创微电子装备有限公司 | Method and apparatus for transporting chlorine-containing compound |
| CN110767578A (en) * | 2019-10-31 | 2020-02-07 | 上海华力集成电路制造有限公司 | Method and tool for preventing maintenance of semiconductor etching equipment |
| CN114520137A (en) * | 2020-11-18 | 2022-05-20 | 中国科学院微电子研究所 | Device and method for removing particles on surface of electrostatic chuck of etching equipment |
| WO2023024159A1 (en) * | 2021-08-23 | 2023-03-02 | 长鑫存储技术有限公司 | Control method, device, and system for semiconductor manufacturing device, and storage medium |
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Address after: 100176 No. 8 Wenchang Avenue, Beijing economic and Technological Development Zone Applicant after: Beijing North China microelectronics equipment Co Ltd Address before: 100176 Beijing economic and Technological Development Zone, Wenchang Road, No. 8, No. Applicant before: Beifang Microelectronic Base Equipment Proces Research Center Co., Ltd., Beijing |
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Application publication date: 20170609 |
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