CN106791488A - A kind of synchronous tiled display methods and device - Google Patents
A kind of synchronous tiled display methods and device Download PDFInfo
- Publication number
- CN106791488A CN106791488A CN201611233266.6A CN201611233266A CN106791488A CN 106791488 A CN106791488 A CN 106791488A CN 201611233266 A CN201611233266 A CN 201611233266A CN 106791488 A CN106791488 A CN 106791488A
- Authority
- CN
- China
- Prior art keywords
- frame
- video
- processes
- prime
- caching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
- H04N5/268—Signal distribution or switching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
- G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
- G06F3/1446—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display display composed of modules, e.g. video walls
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/302—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements characterised by the form or geometrical disposition of the individual elements
- G09F9/3026—Video wall, i.e. stackable semiconductor matrix display modules
Abstract
The invention discloses a kind of synchronous tiled display methods and device, using the refreshing frequency identical pulse signal with display as reference synchronization pulse, each frame of video that the method is carried out the video image of same video source after cutting whole into sections is separately sent to different output ends, and sends the end packet comprising number of processes to each output end after all frame of video are all sent;Each output end receives corresponding frame of video and is put into prime caching, under the control of reference synchronization pulse, a frame of video in being cached to prime according to the number of processes included in the end packet for receiving carries out image procossing, and is cached after the completion of image procossing into corresponding rear class caching;Under the control of reference synchronization pulse, a frame of video during rear class is cached is shown according to sending aobvious sequential to send to the display being connected each output end.The present invention can effectively solve source images frame per second and the unmatched frame per second adaptation issues of display frame rate, it is ensured that the synchronism of tiled display.
Description
Technical field
The invention belongs to technical field of video monitoring, and in particular to a kind of synchronous tiled display methods and device.
Background technology
As the application scenario of tiled display becomes increasingly complex, the design of system also becomes increasingly complex, and shows stationary problem
It is more and more obvious.
Simultaneous display refers to that the different images segmentation block of same frame video source images refreshes in week in same display, not
Carried out on same screen when display is shielded, image no visual tears sense, front and rear frame while switching, and is broadcast on single screen with entire image
Put effect consistent.
During simultaneous display, if image source frame per second is inconsistent with display frame rate, generally requiring carries out frame duplication, multiple
The synchronization of frame processed is also extremely important, and each display mouth needs to ensure that, at a certain display moment, the duplicated frame of each block image is
Same frame from source images.
What is shown is asynchronous, and main cause comes from the following aspects:
1) otherness of each output (display) business board clock, with prolonged system operation, each read clock is each
From can all there is certain deviation, if deviation has reached certain threshold value, cause field sync signal deviation excessive, visually
Just occur asynchronous.
2) each output end due to the video frame time for receiving it is incomplete same, have priority difference, at a time, have
Output end FPGA have received the whole of the frame of video piecemeal, and another FPGA does not receive the stream or have received the flow point block
Parts of images, now shows the two field picture if it have received the whole of the flow point block, and another does not receive the complete of the flow point block
Portion may be only able to display previous frame image, now just occur obvious asynchronous.
3) video source frame per second is inconsistent with display frame rate, such as video source frame per second is 25, and display frame rate is 60, then wherein must
So there is duplicated frame, each display port may be from different image sources when displaying duplication frame piecemeal in synchronization
Frame.
4) output end display end processing a certain frame video piecemeal of display because transmitting terminal video speed is too fast quilt
Next frame video piecemeal is covered, so that it is shown that next two field picture, the next frame video point of another output end display end
Block may normally show that frame that should be shown without reaching, and can so cause the difference for also having front and rear frame, cause not
It is synchronous.
Therefore, it is synchronous to ensure display, it is necessary to ensure that following two conditions:
Synchronization, display of each display port to certain video all the way must come from the same frame of source images;
Synchronization, for source images frame per second and display frame rate it is inconsistent in the case of, it is ensured that each piecemeal replicate come
From in the same two field picture of source images.
To solve synchronous sex chromosome mosaicism, there are following several solutions:
Scheme one, by the use of reference clock as read clock source, it is to avoid display end clock jitter adds up;
Scheme two, each frame of video band send aobvious timestamp;
Scheme three, clock synchronization request, when each business board needs display next frame, being sent to clock synchronization module please
Ask, clock synchronization module exports each business board display enable after receiving request;
Scheme four, each image source freely show treatment, are processed into identical frame per second and show.
Although above piecemeal solution scheme can solve the problem that the synchronism of tiled display, respective defect, pin are there is also
To scheme one, due to the output port for straddle, using same reference clock source because circuit is more long, it is impossible to ensure clock matter
Amount is higher to hardware design requirement;For scheme two, treatment is complicated, is not suitable for FPGA treatment;For scheme three, clock synchronization
Request fault-tolerance is poor, causes clock synchronization module not receive synchronization request if certain business board breaks down, and causes whole
System display is abnormal.For scheme four, consumption resource is big.
The content of the invention
In view of the shortcomings of the prior art, the invention provides a kind of synchronous tiled display methods and device, to ensure splicing
The image Complete Synchronization of each display during display.
A kind of synchronous tiled display methods, for enterprising in different displays to the piecemeal video image from video source
Row display, the synchronous tiled display methods is using the refreshing frequency identical pulse signal with the display as reference synchronization
Pulse, comprises the following steps:
The video image of video source is carried out into each frame of video after cutting whole into sections according to the displaying ratio of each display
Different output ends are separately sent to, and are sent comprising number of processes to each output end after each frame of video is all sent
End packet;
Each output end receives corresponding frame of video and is put into prime caching, under the control of reference synchronization pulse, according to reception
To end packet in the number of processes that includes prime is cached in a frame of video carry out image procossing, it is and complete in image procossing
In into rear caching to corresponding rear class caching;
Each output end under the control of reference synchronization pulse, send out according to sending aobvious sequential by a frame of video during rear class is cached
The display being connected is delivered to be shown.
Further, the number of processes included in the end packet that the basis is received is to a video in prime caching
Frame carries out image procossing, including:
Extract the number of processes in the end packet;
When the corresponding frame of video of the end packet is frame under process, after reference synchronization pulse is received, institute is judged
Whether the number of processes for stating frame of video is identical with the number of processes in the end packet, if differing, the frame of video is entered
Row treatment, and count the number of processes of the frame of video;If identical, the frame of video is discharged from prime caching,
Next frame of video corresponding to the frame of video is processed, and counts the number of processes of next frame of video.
Preferably, also including the classification of frame of video in the end packet, the classification of the frame of video includes first frame or non-
Frame headed by the classification of the first frame of video of first frame, wherein new window or Switch Video source.
Further, the number of processes included in the end packet that the basis is received is to a video in prime caching
Frame carries out image procossing, including:
Extract the classification of the number of processes and frame of video in the end packet;
In frame headed by the classification of the frame of video, all of caching regard before the frame of video is received in release prime caching
Frequency frame, and regard this after treatment is carried out after receiving reference synchronization pulse to the frame of video until reaching corresponding number of processes
Frequency frame discharges from prime caching.
Preferably, each output end is under the control of reference synchronization pulse, a frame of video during rear class is cached
Shown according to sending aobvious sequential to send to the display being connected, including:
Aobvious sequential is sent in restarting after reference synchronization pulse is received, described to send the aobvious sequential to include field sync signal and row
Synchronizing signal.
The invention allows for a kind of synchronous tiled display device, for the piecemeal video image from video source not
Shown on same display, the synchronous tiled display device is believed with the refreshing frequency identical pulse with the display
Number as reference synchronization pulse, the synchronous tiled display device includes input and output end, wherein:
The input, for the video image of video source to be carried out into cutting whole into sections according to the displaying ratio of each display
Each frame of video afterwards is separately sent to different output ends, and is sent out to each output end after each frame of video is all sent
Send the end packet comprising number of processes;
The output end, prime caching, under the control of reference synchronization pulse, root are put into for receiving corresponding frame of video
A frame of video in being cached to prime according to the number of processes included in the end packet for receiving carries out image procossing, and in image
Cached after the completion for the treatment of into corresponding rear class caching;It is additionally operable under the control of reference synchronization pulse, during rear class is cached
One frame of video is shown according to sending aobvious sequential to send to the display being connected.
Further, the output end to prime according to the number of processes included in the end packet for receiving in caching
When one frame of video carries out image procossing, following operation is performed:
Extract the number of processes in the end packet;
When the corresponding frame of video of the end packet is frame under process, after reference synchronization pulse is received, institute is judged
Whether the number of processes for stating frame of video is identical with the number of processes in the end packet, if differing, the frame of video is entered
Row treatment, and count the number of processes of the frame of video;If identical, the frame of video is discharged from prime caching,
Next frame of video corresponding to the frame of video is processed, and counts the number of processes of next frame of video.
Preferably, also including the classification of frame of video in the end packet, the classification of the frame of video includes first frame or non-
Frame headed by the classification of the first frame of video of first frame, wherein new window or Switch Video source.
Classification comprising number of processes and frame of video in i.e. described end packet, now, the output end is received in basis
End packet in the number of processes that includes prime is cached in frame of video when carrying out image procossing, perform following operation:
Extract the classification of the number of processes and frame of video in the end packet;
In frame headed by the classification of the frame of video, all of caching regard before the frame of video is received in release prime caching
Frequency frame, and regard this after treatment is carried out after receiving reference synchronization pulse to the frame of video until reaching corresponding number of processes
Frequency frame discharges from prime caching.
Preferably, the output end is under the control of reference synchronization pulse, during rear class is cached a frame of video is pressed
According to send aobvious sequential send to the display being connected shown when, perform following operation:
Aobvious sequential is sent in restarting after reference synchronization pulse is received, described to send the aobvious sequential to include field sync signal and row
Synchronizing signal.
Compared with prior art, synchronous tiled display methods of the invention and device use same reference synchronization pulse,
Make the processing procedure Complete Synchronization of each output end, and then ensure the synchronism for showing, while source images frame per second can be solved (regarding
Frequency source frame rate) and the unmatched frame per second adaptation issues of display frame rate, it is ensured that the synchronism of tiled display.And it is simple to operate, without numerous
The timestamp calculating process of trivial other technologies.
Brief description of the drawings
Fig. 1 is the structural representation of synchronous tiled display device of the invention;
Fig. 2 is the flow chart of simultaneous display joining method of the present invention;
Fig. 3 aobvious sequential adjustment schematic diagrames for the present invention send;
Fig. 4 is the processing procedure schematic diagram of synchronous tiled display methods of the invention.
Specific embodiment
In order to be better understood from the present invention, side of the invention is expanded on further below in conjunction with specific embodiments and the drawings
Case, but present disclosure is not limited solely to the following examples.
As shown in figure 1, a kind of synchronous tiled display device, for the piecemeal video image from video source different
Shown on display, the synchronous tiled display device of the present embodiment is believed with the refreshing frequency identical pulse with the display
Number as reference synchronization pulse, the device includes input and output end.
Wherein:
Input, after the video image of video source is carried out into cutting whole into sections according to the displaying ratio of each display
Each frame of video is separately sent to different output ends, and sends bag to each output end after each frame of video is all sent
End packet containing number of processes;
Output end, is put into prime caching, under the control of reference synchronization pulse, according to connecing for receiving corresponding frame of video
A frame of video during the number of processes included in the end packet for receiving is cached to prime carries out image procossing, and in image procossing
After the completion of cache to corresponding rear class caching in;Then under the control of reference synchronization pulse, one during rear class is cached regards
Frequency frame is shown according to sending aobvious sequential to send to the display being connected.
Each output end of the present embodiment is connected with display, and data wire or PCIE are passed through between each input and output end
SWITCH connects to carry out data interaction.
Splicing display device shown in the present embodiment Fig. 1 is the splicing display device across 4 screens, is provided with 4 output ends, respectively
It is designated as output end 1, output end 2, output end 3, output end 4.Each output end is connected with corresponding display, 4 displays
Numbering is respectively display 1, and display 2, display 3,4,4 displays of display are spliced into a display screen.Such that it is able to
The Video Image Segmentation of video source is shown for 4 pieces, so it is easy to understand that the quantity for needing piecemeal according to video image is not
Together, corresponding output end and its display quantity of connection are also different, and the present embodiment is not limited to the output end of specific connection and shows
Show device quantity, illustrated so that Video Image Segmentation is 4 pieces as an example below, below repeat no more.
Before the splicing display device of the present embodiment is shown, need to be set for the video flowing in advance in each output end
Prime is cached and rear class caching, and prime caching is 4 frame of video spaces, and the size of rear class caching is 2 frame of video spaces, prime
It is A, B, C, D that 4 frame of video spaces of caching are numbered respectively.
It should be noted that the size of prime caching and rear class caching can be adjusted according to practical situations or demand
It is whole.
As shown in Fig. 2 a kind of synchronous tiled display methods, for above-mentioned synchronous tiled display device, to being regarded from same
The piecemeal video image in frequency source is shown that the synchronous tiled display methods includes on different displays:
After the video image of same video source is carried out cutting whole into sections by S1, input according to the displaying ratio of each display
Each frame of video be separately sent to different output ends, and sent to each output end after each frame of video is all sent
End packet comprising number of processes;
S2, each output end receive corresponding frame of video and are put into prime caching, under the control of reference synchronization pulse, according to connecing
A frame of video during the number of processes included in the end packet for receiving is cached to prime carries out image procossing, and in image procossing
After the completion of cache to corresponding rear class caching in;
S3, each output end under the control of reference synchronization pulse, when a frame of video during rear class is cached is according to sending aobvious
Sequence sends to the display being connected and is shown.
When step S1 is implemented in the present embodiment, input receives the video figure that external video source (video camera) is sent
Picture, and the video image that will be received is according to four displaying ratio cutting whole into sections of display, each piecemeal that then will be obtained
Frame of video be sent respectively to corresponding output end.
During transmission, it is 1,2,3,4 that input numbers the frame of video of each piecemeal respectively, output to correspondence output end, and right
Should be in numbering identical display.
After four frame of video obtained after the segmentation of the video image are all sent completely, input is in multicast form to each
Individual output end sends end packet.
The information for including and form of end packet can be adjusted according to practical situations.
Used as a kind of implementation of the present embodiment, the end packet includes number of processes and cache location, wherein processing
Number of times is that the frame of video needs to carry out the number of times (number of times being replicated) of image procossing, and cache location is used to specify the frame of video
Storage location in prime caching, corresponding to frame of video space, such as 4 frame of video spaces point of the present embodiment prime caching
Bian Hao not be A, B, C, D.
Used as a kind of implementation of the present embodiment, the end packet includes number of processes, cache location and frame of video
Classification, the classification of frame of video includes first frame or non-first frame, the wherein classification of the first frame of video of new window or Switch Video source
Headed by frame.Now, as a kind of implementation, the form of end packet can be as shown in table 1, and length is 1 byte, wherein [7:
5] position is not used.The 4th is the classification (i.e. first frame bag) of frame of video, the 3rd and the 2nd expression number of processes, the 1st in end packet
Position and the 0th expression cache location (frame number).
Window refer on display screen be used for show a width intact video images region, each window to a video source,
And the different corresponding video sources of window can be with identical, it is also possible to different, wherein, display screen is by all aobvious in video monitoring system
Show that device is constituted, be minimum composition unit with display.One window comprises at least a display in corresponding region.This implementation
In example for tiled display, therefore, should at least include 2 displays.New window refers to that same display is received
The corresponding video source of former and later two frame of video for arriving corresponds to different windows.First frame bag is 1, then it represents that headed by the frame of video
Frame;First frame bag be 0, then it represents that the frame of video not headed by frame.
Frame number 00,01,10 and 11 corresponds to 4 frame of video spaces of A, B, C and D in prime caching respectively successively.
Table 1
Number of processes is to process frame per second adaptation in the present embodiment end packet:
When the video source frame per second of transmitting terminal and the inconsistent display frame rate of display, it is related to carry out frame of video frame and answers
System, the number of copy times to each frame of video is possible to different, i.e., number of processes is likely to difference.When the first frame bag in end packet is
When 1, represent that the frame is first frame, now the frame number of the frame of video that input sends restarts numbering, it is therefore desirable to delay prime
Middle other video frame deletions are deposited, is no longer processed.
For example, display frame rate is 60Hz, then the frequency of lock-out pulse is 60Hz, now, it is assumed that video source is 25fps, even
The number of processes of continuous 5 frames is 2,3,2,3,2, if new window or Switch Video source, then the end packet for sending is successively:5'
B1_10_00,5'b0_11_01,5'b0_10_10,5'b0_11_11,5'b0_10_00, wherein, the bit wide that 5'b represents used is
5bits, i.e. bit0~bit4.It is adapted to reaching frame per second by setting processing number of times in the present embodiment, 5 end according to more than
Wrap, processing procedure respectively is:
1st frame of video is carried out image procossing 2 times (needing to replicate once) twice by output end, due to first video
Frame headed by frame, when reference synchronization pulse is received, directly carries out image procossing to the first frame, not yet locates in no longer being cached to prime
The frame of video of reason carries out image procossing, and still untreated frame of video includes not carrying out the frame of video and number of processes of image procossing not
Reach the number of processes specified in corresponding end packet.For example:Frame of video in the frame of video space B for having processed prime caching,
The frame of video in the C of frame of video space should be then processed, but this stylish video source head frame arrives, and the first frame bag must be stored in
Frame of video space A, stops the still untreated frame of video of former video immediately, and it is new to immediately begin to temporarily treatment in reference synchronization pulse
The frame of video of video, that is, process the first frame in frame of video space A.After need frame of video to be stored in frame of video space B, C, D in order,
Move in circles.
2nd frame of video is carried out into image procossing 3 times (needing to replicate 2 times) twice can just be switched to next frame of video
Treatment, and the caching of the video is discharged during switching simultaneously;
Remaining frame of video is not first frame, and according to the 2nd processing method of frame of video, the rest may be inferred.
When the video source frame per second of transmitting terminal is consistent with the display frame rate of display, each frame carries out image procossing
Number of times is all 1.
End packet is sent to each output end in the form of multicast in the present embodiment, it is ensured that each output end receives the end packet
Moment it is basically identical, thus may determine that other output ends also have been received by this when certain output end receives the end packet
Bag, you can determine that each piecemeal of the image has reached each target output, now the frame of video can just carry out next step
Treatment.
Each output end receives corresponding frame of video and is put into prime caching in step S2 in the present embodiment, in reference synchronization pulse
Control under, according to the number of processes included in the end packet for receiving to prime cache in a frame of video carry out at image
Reason, is carried out when implementing according to the information category included in end packet:
A () specifically includes following steps when only number of processes and cache location is included in end packet:
Number of processes and cache location in the end packet that extraction is received;
Each output end receives corresponding frame of video and is put into prime caching according to cache location is extracted, when end packet correspondence
Frame of video be frame under process when, after reference synchronization pulse is received, judge the frame of video number of processes whether with
Number of processes in the end packet is identical, if differing, the frame of video is processed, and count the frame of video
Number of processes;If identical, the frame of video is discharged from prime caching, next video corresponding to the frame of video
Frame is processed, and counts the number of processes of next frame of video.
(b) when including number of processes and cache location in end packet, and frame of video classification when, specifically include following step
Suddenly:
The classification of number of processes, cache location and frame of video in the end packet that extraction is received;
Each output end receives corresponding frame of video and is put into prime caching according to cache location is extracted, and is in the frame of video
During first frame, remaining frame of video in release prime caching discharges the institute cached before the frame of video is received in prime caching
There is frame of video.And treatment is being carried out after receiving reference synchronization pulse to the frame of video until will after reaching corresponding number of processes
The frame of video discharges from prime caching;When the frame of video is not first frame, judge the frame of video number of processes whether with
Number of processes in the end packet is identical, if differing, the frame of video is processed, and count the frame of video
Number of processes;If identical, the frame of video is discharged from prime caching, next video corresponding to the frame of video
Frame is processed, and counts the number of processes of next frame of video.
It should be noted that being interpreted as every receipts when carrying out multiple image procossing to same frame of video in the present embodiment
Carry out an image procossing to the frame of video to a reference synchronization pulse, it is waiting receive next reference synchronization pulse after just enter
Second image procossing of row.
It is to ensure display effect, the state (expire or less than) of output end monitor in real time prime caching, there is provided prime caching
Whether full identification information, input all inquired about before sending frame of video every time prime caching state, prime caching
Man Shi, stops sending frame of video to output end.
Each output end is uniformly processed frame of video under the rhythm of reference synchronization pulse, and processing speed is completely the same.Input
End and output end processing speed may and inexact matching, be asynchronous, can cause that frame of video that should process by
It is too fast and capped in input, so, can produce again new asynchronous.
For the problem, prime caching uses Backpressure in the present embodiment.When realizing, output end monitor in real time prime is delayed
Whether the memory space deposited has expired (can be realized by setting status indicator position), when memory space has been expired, notifies that input stops
Frame of video is only sent, it is specific as follows:
The present embodiment output end prime caching opens up four frame buffers (i.e. four frame of video spaces) altogether, and provides empty completely finger
Show that signal, input can inquire about whether corresponding prime caching has expired before sending each frame of video to purpose output end, if defeated
Go out to hold prime to cache and reached 4 frame buffers, then prime caching has been expired, do not allow to send frame of video to the output end, be now input into
End can suspend transmission frame of video, and the frame of video is buffered in the caching of oneself;If discontented four frames of prime caching, can continue
Frame of video is sent to the output end.
In the present embodiment splicing display method step S3, the frequency of reference synchronization pulse and the refreshing frequency one of display
Cause, come interim in reference synchronization pulse, each output end send aobvious sequential to start simultaneously under the control of reference synchronization pulse, that is, export
End starts to be produced according to the treatment clock of oneself send aobvious sequential.But because the treatment clock of output end is (during such as 1080p@60
Clock is 148.5M) deviation is had, may send the aobvious sequential can not be completely the same with the reference synchronization pulse period, easily occur being in field
In last column last several clock cycle during blanking interval, the situation that next reference synchronization pulse has been arrived.
Specifically, as shown in figure 3, output end often receives restarting after a reference synchronization pulse send aobvious sequential, send
Aobvious sequential includes field sync signal VS and line synchronising signal HS.The deviation of clock is processed due to each output end, in fact it could happen that such as
Lower two kinds of situations:
Situation one, come interim in next reference synchronization pulse, upper one is sent the last of the line synchronising signal in aobvious sequential
Several treatment clocks do not terminate also (send aobvious sequential not terminate, reference synchronization pulse has been arrived);
Situation two, next reference synchronization pulse arriving before, upper one is sent the last of the line synchronising signal in aobvious sequential
Several treatment clocks are over (send aobvious sequential to terminate, but lock-out pulse is also following interim).
For both the above situation, following method adjustment is respectively adopted and send aobvious sequential:
For sending aobvious sequential not terminate, the situation that reference synchronization pulse has been arrived, ignore one send it is last in aobvious sequential
The treatment clock of several untreated line synchronising signals forces new field sync signal VS, line synchronising signal HS restarting meters
Number, so may insure that each output end send aobvious sequential completely the same;
For sending aobvious sequential to terminate, but the also following interim situation of lock-out pulse, send aobvious sequential to force in blanking interval, etc.
The aobvious sequential of sending of next frame is restarted in the arriving of pulse to be synchronized, forces new field sync signal VS, and line synchronising signal HS is again
Start and count, so may insure that each output end send aobvious sequential completely the same.
The principle of the method is actually to come interim in next reference synchronization pulse, using blanking interval is shown, is adjusted
Each output end send aobvious sequential, makes what each output end showed each frame of video to send aobvious sequential completely the same, Complete Synchronization.
It should be noted that in the step (2), often receiving a reference synchronization pulse, taken from prime caching
Going out a frame of video carries out image procossing, and cache after processing is completed to corresponding rear class caching in, with etc. be sent to phase
The display answered.And need the image procossing of frame of video that is completed before next synchronous pulse is received to being taken out and be stored in
In rear class caching.
Each output end is directed to each frame of video for receiving, and a frame of video is processed within each pulse period, and
The start to process after lock-out pulse is received, because each output end uses same lock-out pulse, and then causes every every time
The processing procedure Complete Synchronization of individual output end.
The all business before image shows are completed after being processed in the present embodiment, rear class caching is stored in, rear class caching opens up 2 frames
Spatial cache, respectively rear class caching 0 and rear class caching 1, are alternately stored, and read-write is delayed 2 frames using " table tennis " operation, alternating
Deposit the frame of video cached in space and send to display and shown.
Based on above-mentioned synchronous tiled display methods, the flow for displaying of every width video image is as shown in figure 4, input pair first
Video image carries out cutting whole into sections and is divided into four frame of video being respectively sent to 4 output ends, wherein No. 1 frame of video is at the T1 moment
Send to output end 1;No. 2 frame of video are sent to output end 2 at the T2 moment;No. 3 frame of video are sent to output end 3 at the T3 moment;4
Number frame of video is sent to output end 4 at the T4 moment.
No. 1 frame of video caches into output end 1 corresponding prime and delays in the frame of video that the T1 moment sends at the T1+ Δ T1 moment
In depositing;No. 2 frame of video cache into output end 2 corresponding prime caching in the frame of video that the T1 moment sends at the T2+ Δ T2 moment
In;No. 3 frame of video are in the frame of video that the T3 moment sends caches into output end 3 corresponding prime caching at the T3+ Δ T3 moment;
No. 4 frame of video are in the frame of video that the T4 moment sends caches into output end 4 corresponding prime caching at the T4+ Δ T4 moment.
In the present embodiment the pulse period of reference synchronization pulse be T, it is assumed that T receptions to a lock-out pulse, therefore,
Frame of video, No. 3 frame of video that frame of video that No. 1 frame of video sends at the T1 moment, No. 2 frame of video send at the T2 moment are at the T3 moment
The frame of video of transmission, and the frame of video that is sent at the T4 moment of No. 4 frame of video is completed to process and store to corresponding in T~2T
Rear class caching in, and all sent to display at the 2T moment and shown.
After reference synchronization pulse is received, judge whether the number of processes of currently processed frame of video reaches correspondence and terminate
Number of processes in bag, if the release from prime caching if reaching, and processes next frame of video, otherwise, continues with
The frame of video.
It should be noted that above method is applied to exports a situation for window for output end, the window is each
One sub-picture of the display screen display that the display of output end connection is constituted.In practical application, output end can be with
The multiple windows of output, now the method for the present invention is equally applicable, it is thus only necessary to for each window be respectively provided with prime caching and
Rear class is cached, and send aobvious sequential, and requirement carries out identical within each pulse period to the corresponding frame of video of each window
Operation (including image procossing, be stored in rear class caching and send to display show).When the corresponding display of output end
During screen display multiple window, output end is individually processed each window, for the place of respective frame of video between each window
Reason and, cache, send it is aobvious in the absence of intersecting.When there are multiple windows, within the same pulse period, each window need to be ensured
Corresponding frame of video can be disposed, and will not take the time in the next pulse cycle.
After the frame of video of each window has been processed in each pulse period, free time is likely present, illustrates the splicing
Display device can also simultaneously complete the synchronous tiled display of more multiwindow.
Specified otherwise is not done, the image procossing in the present embodiment to each frame of video includes that scaling, splicing, lamination etc. are stored in
All operations before rear class caching.
Obviously, those skilled in the art can carry out various changes and modification without deviating from essence of the invention to the present invention
God and scope.So, if these modifications of the invention and modification belong to the scope of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to comprising these changes and modification.
Claims (10)
1. a kind of synchronous tiled display methods, for being carried out on different displays to the piecemeal video image from video source
Display, it is characterised in that the synchronous tiled display methods is made with the refreshing frequency identical pulse signal with the display
On the basis of lock-out pulse, comprise the following steps:
The video image of video source is carried out into each frame of video after cutting whole into sections according to the displaying ratio of each display to distinguish
Different output ends are sent to, and the knot comprising number of processes is sent to each output end after each frame of video is all sent
Beam bag;
Each output end receives corresponding frame of video and is put into prime caching, under the control of reference synchronization pulse, according to what is received
A frame of video during the number of processes included in end packet is cached to prime carries out image procossing, and after the completion of image procossing
In caching to corresponding rear class caching;
Each output end under the control of reference synchronization pulse, a frame of video during rear class is cached according to send aobvious sequential send to
The display being connected is shown.
2. synchronous tiled display methods as claimed in claim 1, it is characterised in that the control in reference synchronization pulse
Under, a frame of video in being cached to prime according to the number of processes included in the end packet for receiving carries out image procossing, wraps
Include:
Extract the number of processes in the end packet;
When the corresponding frame of video of the end packet is frame under process, after reference synchronization pulse is received, regarded described in judgement
Whether the number of processes of frequency frame is identical with the number of processes in the end packet, if differing, at the frame of video
Reason, and count the number of processes of the frame of video;If identical, the frame of video is discharged from prime caching, to institute
State the corresponding next frame of video of frame of video to be processed, and count the number of processes of next frame of video.
3. synchronous tiled display methods as claimed in claim 1, it is characterised in that also comprising frame of video in the end packet
Classification, the classification of the frame of video includes first frame or non-first frame, wherein the first frame of video of new window or Switch Video source
Frame headed by classification.
4. synchronous tiled display methods as claimed in claim 3, it is characterised in that the control in reference synchronization pulse
Under, a frame of video in being cached to prime according to the number of processes included in the end packet for receiving carries out image procossing, wraps
Include:
Extract the classification of the number of processes and frame of video in the end packet;
In frame headed by the classification of the frame of video, all videos cached before the frame of video is received in release prime caching
Frame, and treatment is being carried out after receiving reference synchronization pulse to the frame of video until by the video after reaching corresponding number of processes
Frame discharges from prime caching.
5. the synchronous tiled display methods as described in any one in Claims 1 to 4, it is characterised in that each output end
Under the control of reference synchronization pulse, a frame of video during rear class is cached is according to sending aobvious sequential to send to the display being connected
Device shown, including:
Aobvious sequential is sent in restarting after reference synchronization pulse is received, described to send aobvious sequential synchronous including field sync signal and row
Signal.
6. a kind of synchronous tiled display device, for being carried out on different displays to the piecemeal video image from video source
Display, it is characterised in that the synchronous tiled display device is made with the refreshing frequency identical pulse signal with the display
On the basis of lock-out pulse, the synchronous tiled display device include input and output end, wherein:
The input, after the video image of video source is carried out into cutting whole into sections according to the displaying ratio of each display
Each frame of video is separately sent to different output ends, and sends bag to each output end after each frame of video is all sent
End packet containing number of processes;
The output end, is put into prime caching, under the control of reference synchronization pulse, according to connecing for receiving corresponding frame of video
A frame of video during the number of processes included in the end packet for receiving is cached to prime carries out image procossing, and in image procossing
After the completion of cache to corresponding rear class caching in;It is additionally operable under the control of reference synchronization pulse, during rear class is cached
Frame of video is shown according to sending aobvious sequential to send to the display being connected.
7. synchronous tiled display device as claimed in claim 6, the output end is included according in the end packet for receiving
Number of processes prime is cached in frame of video when carrying out image procossing, perform following operation:
Extract the number of processes in the end packet;
When the corresponding frame of video of the end packet is frame under process, after reference synchronization pulse is received, regarded described in judgement
Whether the number of processes of frequency frame is identical with the number of processes in the end packet, if differing, at the frame of video
Reason, and count the number of processes of the frame of video;If identical, the frame of video is discharged from prime caching, to institute
State the corresponding next frame of video of frame of video to be processed, and count the number of processes of next frame of video.
8. synchronous tiled display device as claimed in claim 6, it is characterised in that also comprising frame of video in the end packet
Classification, the classification of the frame of video includes first frame or non-first frame, wherein the first frame of video of new window or Switch Video source
Frame headed by classification.
9. synchronous tiled display device as claimed in claim 8, it is characterised in that the output end is according to the knot for receiving
When the number of processes included in beam bag carries out image procossing to a frame of video in prime caching, following operation is performed:
Extract the classification of the number of processes and frame of video in the end packet;
In frame headed by the classification of the frame of video, all videos cached before the frame of video is received in release prime caching
Frame, and treatment is being carried out after receiving reference synchronization pulse to the frame of video until by the video after reaching corresponding number of processes
Frame discharges from prime caching.
10. the synchronous tiled display device as described in any one in claim 6~9, it is characterised in that the output end exists
Under the control of reference synchronization pulse, a frame of video during rear class is cached is according to sending aobvious sequential to send to the display being connected
When being shown, following operation is performed:
Aobvious sequential is sent in restarting after reference synchronization pulse is received, described to send aobvious sequential synchronous including field sync signal and row
Signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201611233266.6A CN106791488B (en) | 2016-12-28 | 2016-12-28 | Synchronous splicing display method and device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201611233266.6A CN106791488B (en) | 2016-12-28 | 2016-12-28 | Synchronous splicing display method and device |
Publications (2)
Publication Number | Publication Date |
---|---|
CN106791488A true CN106791488A (en) | 2017-05-31 |
CN106791488B CN106791488B (en) | 2021-01-29 |
Family
ID=58921317
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201611233266.6A Active CN106791488B (en) | 2016-12-28 | 2016-12-28 | Synchronous splicing display method and device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN106791488B (en) |
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108234901A (en) * | 2016-12-21 | 2018-06-29 | 杭州海康威视数字技术股份有限公司 | A kind of video-splicing method and video control apparatus |
CN108234818A (en) * | 2017-12-13 | 2018-06-29 | 苏州长风航空电子有限公司 | A kind of video frame deposits the implementation method that wheel seeks operative algorithm |
CN109062528A (en) * | 2018-08-07 | 2018-12-21 | 威创集团股份有限公司 | A kind of mosaic screen shows the method, device and equipment of office file |
CN110148143A (en) * | 2019-04-02 | 2019-08-20 | 南京图格医疗科技有限公司 | A method of the image segmentation based on FPGA and simultaneous display |
WO2019192126A1 (en) * | 2018-04-03 | 2019-10-10 | 中兴通讯股份有限公司 | Synchronous display method and apparatus, electronic device, and storage medium |
CN110855851A (en) * | 2019-11-25 | 2020-02-28 | 广州市奥威亚电子科技有限公司 | Video synchronization device and method |
CN111107411A (en) * | 2019-12-30 | 2020-05-05 | 威创集团股份有限公司 | Distributed cross-node video synchronization method and system |
CN111124577A (en) * | 2019-12-23 | 2020-05-08 | 威创集团股份有限公司 | Screen display control method and electronic equipment |
CN111147906A (en) * | 2018-11-02 | 2020-05-12 | 纬创资通股份有限公司 | Synchronous playing system and synchronous playing method |
CN111208965A (en) * | 2020-01-15 | 2020-05-29 | 宁波Gqy视讯股份有限公司 | Splicing display system and display method thereof |
CN112422888A (en) * | 2019-08-23 | 2021-02-26 | 浙江宇视科技有限公司 | Video splicing method and device, electronic equipment and computer readable storage medium |
WO2021136011A1 (en) * | 2019-12-31 | 2021-07-08 | 华为技术有限公司 | Display method and device |
CN113194358A (en) * | 2021-04-01 | 2021-07-30 | 北京凯视达科技股份有限公司 | Video splicing display method, device, medium and electronic equipment |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0937141A (en) * | 1995-07-19 | 1997-02-07 | Hitachi Ltd | Video processing system |
CN101370089A (en) * | 2008-09-05 | 2009-02-18 | 广东威创视讯科技股份有限公司 | Split joint display parallel processing system |
CN101383913A (en) * | 2008-08-28 | 2009-03-11 | 广东威创视讯科技股份有限公司 | Display overlapping control system and control method thereof |
CN101815177A (en) * | 2010-03-11 | 2010-08-25 | 广东威创视讯科技股份有限公司 | Synchronous displaying device, synchronous displaying method and superposition splice displaying system |
CN104333739A (en) * | 2014-10-28 | 2015-02-04 | 广东威创视讯科技股份有限公司 | Echoing device and echoing method for spliced wall system |
CN104363508A (en) * | 2014-11-21 | 2015-02-18 | 浙江宇视科技有限公司 | Image stitching method and device for preventing video rollback |
CN105407252A (en) * | 2015-11-19 | 2016-03-16 | 青岛海信电器股份有限公司 | Method and device for synchronous display of pictures |
-
2016
- 2016-12-28 CN CN201611233266.6A patent/CN106791488B/en active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0937141A (en) * | 1995-07-19 | 1997-02-07 | Hitachi Ltd | Video processing system |
CN101383913A (en) * | 2008-08-28 | 2009-03-11 | 广东威创视讯科技股份有限公司 | Display overlapping control system and control method thereof |
CN101370089A (en) * | 2008-09-05 | 2009-02-18 | 广东威创视讯科技股份有限公司 | Split joint display parallel processing system |
CN101815177A (en) * | 2010-03-11 | 2010-08-25 | 广东威创视讯科技股份有限公司 | Synchronous displaying device, synchronous displaying method and superposition splice displaying system |
CN104333739A (en) * | 2014-10-28 | 2015-02-04 | 广东威创视讯科技股份有限公司 | Echoing device and echoing method for spliced wall system |
CN104363508A (en) * | 2014-11-21 | 2015-02-18 | 浙江宇视科技有限公司 | Image stitching method and device for preventing video rollback |
CN105407252A (en) * | 2015-11-19 | 2016-03-16 | 青岛海信电器股份有限公司 | Method and device for synchronous display of pictures |
Cited By (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108234901A (en) * | 2016-12-21 | 2018-06-29 | 杭州海康威视数字技术股份有限公司 | A kind of video-splicing method and video control apparatus |
CN108234818B (en) * | 2017-12-13 | 2020-10-20 | 苏州长风航空电子有限公司 | Method for realizing video frame memory round searching operation algorithm |
CN108234818A (en) * | 2017-12-13 | 2018-06-29 | 苏州长风航空电子有限公司 | A kind of video frame deposits the implementation method that wheel seeks operative algorithm |
WO2019192126A1 (en) * | 2018-04-03 | 2019-10-10 | 中兴通讯股份有限公司 | Synchronous display method and apparatus, electronic device, and storage medium |
CN109062528A (en) * | 2018-08-07 | 2018-12-21 | 威创集团股份有限公司 | A kind of mosaic screen shows the method, device and equipment of office file |
CN111147906B (en) * | 2018-11-02 | 2024-03-15 | 纬创资通股份有限公司 | Synchronous playing system and synchronous playing method |
CN111147906A (en) * | 2018-11-02 | 2020-05-12 | 纬创资通股份有限公司 | Synchronous playing system and synchronous playing method |
CN110148143A (en) * | 2019-04-02 | 2019-08-20 | 南京图格医疗科技有限公司 | A method of the image segmentation based on FPGA and simultaneous display |
CN112422888B (en) * | 2019-08-23 | 2022-07-19 | 浙江宇视科技有限公司 | Video splicing method and device, electronic equipment and computer readable storage medium |
CN112422888A (en) * | 2019-08-23 | 2021-02-26 | 浙江宇视科技有限公司 | Video splicing method and device, electronic equipment and computer readable storage medium |
CN110855851A (en) * | 2019-11-25 | 2020-02-28 | 广州市奥威亚电子科技有限公司 | Video synchronization device and method |
CN110855851B (en) * | 2019-11-25 | 2022-04-19 | 广州市奥威亚电子科技有限公司 | Video synchronization device and method |
CN111124577B (en) * | 2019-12-23 | 2021-12-07 | 威创集团股份有限公司 | Screen display control method and electronic equipment |
CN111124577A (en) * | 2019-12-23 | 2020-05-08 | 威创集团股份有限公司 | Screen display control method and electronic equipment |
WO2021136369A1 (en) * | 2019-12-30 | 2021-07-08 | 威创集团股份有限公司 | Distributed cross-node video synchronization method and system |
CN111107411A (en) * | 2019-12-30 | 2020-05-05 | 威创集团股份有限公司 | Distributed cross-node video synchronization method and system |
WO2021136011A1 (en) * | 2019-12-31 | 2021-07-08 | 华为技术有限公司 | Display method and device |
CN111208965A (en) * | 2020-01-15 | 2020-05-29 | 宁波Gqy视讯股份有限公司 | Splicing display system and display method thereof |
CN111208965B (en) * | 2020-01-15 | 2023-09-22 | 宁波Gqy视讯股份有限公司 | Spliced display system and display method thereof |
CN113194358A (en) * | 2021-04-01 | 2021-07-30 | 北京凯视达科技股份有限公司 | Video splicing display method, device, medium and electronic equipment |
CN113194358B (en) * | 2021-04-01 | 2023-03-24 | 北京凯视达科技股份有限公司 | Video splicing display method, device, medium and electronic equipment |
Also Published As
Publication number | Publication date |
---|---|
CN106791488B (en) | 2021-01-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN106791488A (en) | A kind of synchronous tiled display methods and device | |
CN103795979B (en) | Method and device for synchronizing distributed image stitching | |
EP0840279A2 (en) | Method and apparatus for presenting video on a display monitor associated with a computer | |
US5526024A (en) | Apparatus for synchronization and display of plurality of digital video data streams | |
US6894692B2 (en) | System and method for sychronizing video data streams | |
US20160357493A1 (en) | Synchronization of videos in a display wall | |
CN103165104A (en) | Video signal synchronously displaying method of spliced screen | |
CN112217960B (en) | Method for synchronously displaying multi-screen playing pictures | |
US7889191B2 (en) | Method and apparatus for providing a synchronized video presentation without video tearing | |
CN106251825A (en) | Techniques for aligning frame data | |
FR2944662A1 (en) | VIDEO TRANSMISSION ON A SERIAL INTERFACE | |
JPH1152940A (en) | Synchronization of left/right channel display and vertical refresh in multi-display stereoscopic computer graphics system | |
CN103065598B (en) | Control method for preventing liquid crystal display from being blurred | |
EP3644614A1 (en) | Video data processing method and video data processing device | |
CN102427549A (en) | Method for reducing frame crosstalk of 3D television | |
CN107707860A (en) | A kind of video data handling procedure, processing unit and computer-readable recording medium | |
WO2017166879A1 (en) | Channel-locking method and device for use during recording and broadcasting of teaching process | |
CN107277295A (en) | Audio video synchronization processing unit and method | |
CN105847730A (en) | Video code stream output control and processing method, chip and system | |
US20170140735A1 (en) | Method and system for driving display panel | |
CN105721849A (en) | Synchronous display method and system for 3D signals of spliced wall | |
US7425962B2 (en) | Systems and methods for generating a composite video signal from a plurality of independent video signals | |
CN105761705B (en) | Screen wall synchronous display method and system | |
JP3423327B2 (en) | Video signal input / output device | |
CN111124341A (en) | Method and device for synchronous display of double-screen different display |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
TR01 | Transfer of patent right |
Effective date of registration: 20221107 Address after: 250101 4th floor, building 5, zone A2, Hanyu Jingu, Shunhua South Road, high tech Zone, Jinan City, Shandong Province Patentee after: Jinan Yushi Intelligent Technology Co.,Ltd. Address before: 310051 Zhejiang Jiangling Hangzhou Road, Binjiang District, Jiangling, 88, No. 10 South Block 1-11. Patentee before: ZHEJIANG UNIVIEW TECHNOLOGIES Co.,Ltd. |
|
TR01 | Transfer of patent right |