CN106788844B - A kind of MCVF multichannel voice frequency synchronous transfer circuit - Google Patents
A kind of MCVF multichannel voice frequency synchronous transfer circuit Download PDFInfo
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- CN106788844B CN106788844B CN201611175421.3A CN201611175421A CN106788844B CN 106788844 B CN106788844 B CN 106788844B CN 201611175421 A CN201611175421 A CN 201611175421A CN 106788844 B CN106788844 B CN 106788844B
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- encoder
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
- H04J3/0691—Synchronisation in a TDM node
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- G—PHYSICS
- G10—MUSICAL INSTRUMENTS; ACOUSTICS
- G10L—SPEECH ANALYSIS OR SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING; SPEECH OR AUDIO CODING OR DECODING
- G10L19/00—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
- G10L19/04—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis using predictive techniques
- G10L19/16—Vocoder architecture
- G10L19/173—Transcoding, i.e. converting between two coded representations avoiding cascaded coding-decoding
-
- G—PHYSICS
- G10—MUSICAL INSTRUMENTS; ACOUSTICS
- G10L—SPEECH ANALYSIS OR SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING; SPEECH OR AUDIO CODING OR DECODING
- G10L19/00—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
- G10L19/04—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis using predictive techniques
- G10L19/16—Vocoder architecture
- G10L19/18—Vocoders using multiple modes
- G10L19/20—Vocoders using multiple modes using sound class specific coding, hybrid encoders or object based coding
Abstract
The invention discloses a kind of MCVF multichannel voice frequency synchronous transfer circuits, it includes I2S encoder, TDM encoder, the transmission circuit further includes having 4B/5B encoder, NRZ-I encoder, MLT-3 encoder to constitute, the 4B/5B encoder, NRZ-I encoder, MLT-3 encoder are sequentially connected, it is connected to after TDM encoder, multipath audio signal is inputted through I2S encoder, it is digital audio by TDM coder transitions, it is successively handled again by 4B/5B encoder, NRZ-I encoder, MLT-3 encoder, it is synchronous with clock to complete data, is exported.The present invention uses for reference the technology of synchronous ethernet, and 45/5B encoder, NRZ-I encoder, MLT-3 encoder are introduced into TDM audio transmission system, the effective solution synchronous transfer problem of data and clock.
Description
Technical field
It is that one kind can allow clock to synchronize transmission by voice data stream the invention belongs to audio signal processing technique field
Scheme.
Background technique
Analogue audio frequency can not adapt to the most basic requirement of entire sound reinforcement system.In the design of coliseum sound reinforcement system
Extremely crucial problem is how to solve the remote high-quality transmission of faint audio signal.For large stadium, need to transmit
Distance to generally reach several hundred rice remote.Using traditional analogue transmission mode, it is difficult to solve loss of signal and electromagnetic interference and connect
The problems such as ground interference.The various performances of digital audio are far superior to simulation model, therefore the digitlization of radio and television equipment is
At inevitable trend.The advantages of being handled and transmitted using digital signal is that digital signal is insensitive to interfering, entire to be
The noise of system is when distorted unrelated with transmission range, and for long distance transmission, excellent performance indicator is analogue transmission institute nothing
Method analogy.
AES/EBU standard commonly used in the trade at present is the Digital Audio Transmission standard that AES and EBU are developed together, it
It is to transmit and receive the digital facility interface agreement of digital audio and video signals, it is specified that audio data must be encoded with 2 complement code.
It provides the audio data (24 bit quantization of highest) of two channels.However transmitted for MCVF multichannel voice frequency, there are a signal is same
The synchronous transfer problem of the problem of step, especially data and clock.
In MCVF multichannel voice frequency processing system, through being transmitted frequently with TDM, TDM uses time-division multiplex technology, only needs 1 radical
It is believed that number, 1 frame clock signal, 1 bit clock signal the real-time Transmission of MCVF multichannel voice frequency can be completed.But time division multiplexing essence is
Parallel-serial conversion will necessarily increase the rate of bit clock in this way, the transmission in actual MCVF multichannel voice frequency Transmission system, for clock
Just more stringent requirements are proposed, and especially remote transmission also increases difficulty for the synchronization of signal.
Summary of the invention
Based on this, therefore primary mesh of the invention be to provide a kind of MCVF multichannel voice frequency synchronous transfer circuit, which uses for reference
45/5B encoder, NRZ-I encoder, MLT-3 encoder are introduced into TDM audio transmission system by the technology of synchronous ethernet
In, the effective solution synchronous transfer problem of data and clock.
To achieve the above object, the technical solution of the present invention is as follows:
A kind of MCVF multichannel voice frequency synchronous transfer circuit comprising have I2S encoder, TDM encoder, it is characterised in that the transmission
Circuit further includes having 4B/5B encoder, NRZ-I encoder, MLT-3 encoder to constitute, the 4B/5B encoder, NRZ-I coding
Device, MLT-3 encoder are sequentially connected, and are connected to after TDM encoder, and multipath audio signal is inputted through I2S encoder, by TDM
Coder transitions are digital audio, then are successively handled by 4B/5B encoder, NRZ-I encoder, MLT-3 encoder, complete
It is synchronous with clock at data, it is exported.
Further, the multipath audio signal is 16 road analog audio signals, and 16 road analog audio signals are encoded by I2S
Device completes analog-to-digital conversion, 8 road I2S digital audio of parallel output, and 8 tunnel Parallel I 2S digital audio pass through TDM encoder, serial defeated
1 road TDM digital audio out, 1 road TDM digital audio successively pass through 4B/5B encoder, NRZ-I encoder, MLT-3 encoder into
Row processing, finally completes transmission.
Further, the I2S encoder uses Slave operating mode, when this 8 road I2S audio signal shares frame synchronization
Clock signal, bit clock signal；The I2S signal of 8 road 3.072Mbps rates is carried out parallel-serial conversion by TDM encoder, exports 1 tunnel
24.576Mbps the TDM signal of rate；4B/5B encoder by the 48KHZ frame synchronization clock signal of TDM encoder output,
24.576Mbps data-signal is encoded.
Further, the 48KHZ frame synchronization information is encoded to 11000, data 0 to 15 are successively encoded to 11110,
01001、10100、10101、01010、01011、01110、01111、10010、10011、10110、10111、11010、
11011,11100,11101, encoded clock rate is that (1 frame TDM is 8 road I2S parallel-serial conversions to 30.96MHZ, therefore 1 frame TDM is
8*64=512bit is 512*5/4=640bit after 4B/5B is encoded, is multiplexed with after being inserted into the synchronizing information of 5bit
645bit, therefore the rate of encoded clock is (24.576*5/4) * 645/640=30.96MHZ)；NRZ-I encoder is by 5 bits
Serial code is converted to NRZ-I code, then changes into MLT-3 signal by MLT-3 encoder and is transmitted.
The present invention encodes 16 road analog audio signals using 1 road TDM, takes 4B/5B encoder by the frame synchronizing signal of TDM
After being encoded with audio data, the synchronous transfer of clock is carried out by voice data stream.Receiving end passes through clock recovery module
And 4B5B decoder module can recover 30.96MHZ encoded clock, 48KHZ frame synchronization information.
The present invention proposes a solution for MCVF multichannel voice frequency transmission, and multi-channel analog audio signal is compiled by I2S
Code device, completes analog-to-digital conversion, parallel output digital audio, and digital audio passes through TDM encoder, 1 road TDM number sound of Serial output
Frequently, 1 road TDM digital audio is successively passed through 4B/5B encoder, NRZ-I encoder, MLT-3 encoder and is handled, and finally passes through
Route completes transmission.The present invention uses for reference the technology of synchronous ethernet, by 45/5B encoder, NRZ-I encoder, MLT-3 encoder
It is introduced into TDM audio transmission system, the effective solution synchronous transfer problem of data and clock.
Detailed description of the invention
Fig. 1 is the circuit diagram that the present invention is implemented.
Fig. 2 is the process flow diagram that the present invention is implemented.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawings and embodiments, right
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.
It is shown in Figure 1, the MCVF multichannel voice frequency synchronous transfer circuit realized of the present invention, by I2S encoder, TDM encoder,
4B/5B encoder, NRZ-I encoder, MLT-3 encoder are constituted；The 4B/5B encoder, NRZ-I encoder, MLT-3 coding
Device is sequentially connected, and is connected to after TDM encoder.
As shown in connection with fig. 2, input signal is 16 tunnel Parallel Simulation audio signals, and 16 tunnel Parallel Simulation audio signals enter
I2S encoder (successively passes through ∑ Delta modulator, wave digital lowpass filter and decimation filter after 48KHZ is sampled and is encoded
Handled, then adjacent two-way Parallel Simulation audio signal is handled by an I2S interface sequence generator), it is defeated
8 parallel road I2S digital audio and video signals out, I2S encoder use Slave operating mode, this 8 road I2S audio signal shares frame
Synchronizing clock signals, bit clock signal；The I2S signals of 8 road 3.072Mbps rates is carried out parallel-serial conversion and (and gone here and there by TDM encoder
By TDM interface sequence generator input clock signal when conversion, processing is synchronized), 1 road 24.576Mbps rate of output
TDM signal；4B/5B encoder by the 48KHZ frame synchronization clock signal of TDM encoder output, 24.576Mbps data-signal into
Row coding.
Wherein 48KHZ frame synchronization information is encoded to 11000, data 0 to 15 are successively encoded to 11110,01001,10100,
10101、01010、01011、01110、01111、10010、10011、10110、10111、11010、11011、11100、
11101, encoded clock rate be 30.96MHZ (1 frame TDM be 8 road I2S parallel-serial conversions, therefore 1 frame TDM be 8*64=512bit,
It is 512*5/4=640bit after 4B/5B is encoded, when being multiplexed with 645bit after being inserted into the synchronizing information of 5bit, therefore encoding
The rate of clock is (24.576*5/4) * 645/640=30.96MHZ)；Then NRZ-I is transferred to using FIFO output interface to compile
5 bit serial codes are converted to NRZ-I code by code device, then are changed into MLT-3 signal by MLT-3 encoder and transmitted.
Thus 16 road analog audio signals are encoded using 1 road TDM, take 4B/5B encoder by the frame synchronizing signal of TDM and
After audio data is encoded, the synchronous transfer of clock is carried out by voice data stream.Receiving end by clock recovery module and
4B5B decoder module can recover 30.96MHZ encoded clock, 48KHZ frame synchronization information.
When implementing this programme, I2S encoder can be realized using multiple high-speed sampling ADC, TDM encoder, 4B/5B coding
Device, NRZ-I encoder and MLT-3 encoder can be used FPGA or dedicated ASIC and realize.
16 road analog audio signals are passed through I2S encoder by the present invention, complete analog-to-digital conversion, parallel output 8 road I2S number
Audio, 8 tunnel Parallel I 2S digital audio pass through TDM encoder, 1 road TDM digital audio of Serial output, 1 road TDM digital audio according to
It is secondary to be handled by 4B/5B encoder, NRZ-I encoder, MLT-3 encoder, finally transmission is completed by route.The present invention
The technology for using for reference synchronous ethernet, introduces TDM audio transmission system for 45/5B encoder, NRZ-I encoder, MLT-3 encoder
In system, the effective solution synchronous transfer problem of data and clock.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all in essence of the invention
Made any modifications, equivalent replacements, and improvements etc., should all be included in the protection scope of the present invention within mind and principle.
Claims (3)
1. a kind of MCVF multichannel voice frequency synchronous transfer circuit comprising have I2S encoder, TDM encoder, it is characterised in that transmission electricity
Road further includes having 4B/5B encoder, NRZ-I encoder, MLT-3 encoder to constitute, the 4B/5B encoder, NRZ-I coding
Device, MLT-3 encoder are sequentially connected, and are connected to after TDM encoder, and multipath audio signal is digital sound through I2S coder transitions
Frequently, by TDM encoder carry out parallel-serial conversion, then successively by 4B/5B encoder, NRZ-I encoder, MLT-3 encoder into
Row processing, completion data are synchronous with clock, exported；The multipath audio signal is 16 road analog audio signals, 16 tunnels
Analog audio signal passes through I2S encoder, completes analog-to-digital conversion, 8 road I2S digital audio of parallel output, 8 tunnel Parallel I 2S number
Audio pass through TDM encoder, 1 road TDM digital audio of Serial output, 1 road TDM digital audio successively pass through 4B/5B encoder,
NRZ-I encoder, MLT-3 encoder are handled, and transmission is finally completed.
2. MCVF multichannel voice frequency synchronous transfer circuit according to claim 1, it is characterised in that the I2S encoder uses
Slave operating mode, this 8 road I2S audio signal share frame synchronization clock signal, bit clock signal；TDM encoder is by 8 tunnels
The I2S signal of 3.072Mbps rate carries out parallel-serial conversion, exports the TDM signal of 1 road 24.576Mbps rate；4B/5B encoder
48KHZ frame synchronization clock signal, the 24.576Mbps data-signal of TDM encoder output are encoded.
3. MCVF multichannel voice frequency synchronous transfer circuit according to claim 2, it is characterised in that the 48KHZ frame synchronization information is compiled
Code is 11000, data 0 to 15 are successively encoded to 11110,01001,10100,10101,01010,01011,01110,01111,
10010,10011,10110,10111,11010,11011,11100,11101, encoded clock rate is 30.96MHZ；NRZ-I
5 bit serial codes are converted to NRZ-I code by encoder, are then changed into MLT-3 signal by MLT-3 encoder and are transmitted.
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| CN109660933A (en) * | 2019-01-30 | 2019-04-19 | 北京视通科技有限公司 | A kind of device of simultaneous transmission multi-channel analog audio |
| CN110085241B (en) * | 2019-04-28 | 2021-10-08 | 北京地平线机器人技术研发有限公司 | Data encoding method, data encoding device, computer storage medium and data encoding equipment |
| CN112929789B (en) * | 2019-12-05 | 2022-12-13 | 矽统科技股份有限公司 | Audio data processing circuit and audio data processing method |
| CN115794025B (en) * | 2023-02-07 | 2023-05-02 | 南京芯驰半导体科技有限公司 | Vehicle-mounted audio partition output system and method |
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| US8144826B2 (en) * | 2006-05-31 | 2012-03-27 | Siemens Aktiengesellschaft | Clock signal recovery device and method for recovering clock signals |
| CN103313101B (en) * | 2013-05-09 | 2016-04-27 | 青岛橡胶谷知识产权有限公司 | The television signal transmission device of compatible for wired television transmission and network TV transmission |
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