CN106784004A - 一种石墨烯晶体管结构 - Google Patents

一种石墨烯晶体管结构 Download PDF

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CN106784004A
CN106784004A CN201611141257.4A CN201611141257A CN106784004A CN 106784004 A CN106784004 A CN 106784004A CN 201611141257 A CN201611141257 A CN 201611141257A CN 106784004 A CN106784004 A CN 106784004A
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graphene
source
molybdenum bisuphide
layer
transistor structure
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刘丽蓉
王勇
丁超
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Dongguan Guangxin Intellectual Property Services Ltd
Dongguan South China Design and Innovation Institute
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Dongguan Guangxin Intellectual Property Services Ltd
Dongguan South China Design and Innovation Institute
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1029Channel region of field-effect devices of field-effect transistors
    • H01L29/1033Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/1054Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a variation of the composition, e.g. channel with strained layer for increasing the mobility
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/26Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys
    • H01L29/267Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys in different semiconductor regions, e.g. heterojunctions

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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Thin Film Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

本发明公布了一种石墨烯晶体管结构,其包括石墨烯与二硫化钼构成的异质结沟道层;采用二硫化钼构成的源漏外延层;在石墨烯层上沉积的HfAlON栅介质;HfAlON栅介质上的WSi栅金属;以及源漏外延层上的源漏金属。该晶体管结构应用高性能二维结构器件与电路。

Description

一种石墨烯晶体管结构
技术领域
本发明涉及半导体集成电路制造技术领域,具体涉及一种采用石墨烯作为沟道材料的晶体管。
背景技术
在集成电路领域,根据摩尔定律推测,每隔18个月,芯片中晶体管的数量便会提高一倍。随着集成度的提高,硅材料逐渐接近其物理极限。为了维持集成电路的不断发展,需要引进全新的技术和材料,新材料始终是现代电子工业的基础和关注的重点,其中石墨烯作为新一代半导体材料开发潜力巨大,有望取代硅,应用于电子器件中。
石墨烯(Graphene)是一种由碳原子组成的,只有一个原子厚度的六角蜂窝状二维晶体。石墨烯具有优异的力学、热学和电学性能,远远超过硅和其它传统的半导体材料,其中石墨烯的理论载流子迁移率高达2×105cm2/V.s,比硅高两个数量级。利用石墨烯材料,可以研发出更小型,更快速的新型晶体管,晶体管的性能将显著提升,实现硅基晶体管无法完成的性能突破。因此,石墨烯自2004年被发现以来,得到了世界范围内科学界的广泛关注,被认为是下一代集成电路中有望延续摩尔定律的重要材料。CVD法可以制备出高质量大面积的石墨烯,被认为是最有前途的制备方法。目前,石墨烯作为性能优越的半导体材料,已经被应用于场效应晶体管的制备之中。2012年,加州大学洛杉矶分校(UCLA)的科研小组,研发出特征频率(fT)高达427GHz的石墨烯场效应晶体管。
当前,采用CVD法石墨烯制备晶体管时,需要将石墨烯转移到目标衬底上。实验发现,转移的CVD石墨烯容易受到损伤和沾污,同时衬底与石墨烯直接接触产生的界面散射,会严重降低石墨烯中载流子的迁移率,这限制了石墨烯晶体管的高频性能。
发明内容
(一)要解决的技术问题
本发明所要解决的技术问题是提供一种采用二维材料制作的异质结结构器件,所述结构避免了石墨烯受到衬底污染的影响,通过在衬底上先生长一层二维材料二硫化钼,将石墨烯和衬底分离,降低来自衬底的界面散射,同时也可以通过二硫钼的掺杂控制,实现石墨烯中载流子的高迁移率,提高石墨烯晶体管的高频性能。
(二)技术方案
为达到上述目的,本发明提供了一种石墨烯晶体管结构,其包括
一由石墨烯与二硫化钼构成的异质结沟道层;
一由二硫化钼构成的源漏外延层;
一在石墨烯沟道层上沉积的HfAlON栅介质;
一在HfAlON栅介质上沉积的WSi栅金属;
以及源漏外延层上的源漏金属。
在本方案中,所述的异质结沟道层是采用底层二硫化钼和顶层石墨烯构成的;底层二硫化钼的厚度为2-5纳米,为多层材料;顶层石墨烯为单层石墨烯材料。
在本方案中,所述的二硫化钼构成的源漏外延层的掺杂类型为N型,掺杂杂质为钴,其为单层二硫化钼材料。
在本方案中,所述的HfAlON栅介质是采用原子层沉积的方法沉积在石墨烯沟道层上的,其厚度为8纳米。
在本方案中,所述的WSi栅金属是通过溅射法沉积到栅介质层上的,其W与Si的比例是0.15:0.85,其厚度为50纳米。
在本方案中,所述源漏金属为钛/金,厚度为10/50纳米。
(三)有益效果
从上述技术方案可以看出,本发明具有以下有益效果:
所述器件结构可以利用CVD生长的方法生长,实现了石墨烯与衬底的分离,大大降低了载流子散射,实现石墨烯中载流子的高迁移率,提高石墨烯晶体管的高频性能。本发明将二硫化钼与石墨烯材料结合起来,通过二硫化钼的材料属性,提升石墨烯材料的二维电子气浓度,以及改变其能带偏移。这种以石墨烯/二硫化钼为异质结结构形成MOS器件结构的器件,有望改变石墨烯器件本身电流开关比过小,关态性能差的问题。
附图说明
图1是本发明提供的石墨烯晶体管结构的实施例图;101为底层二硫化钼,102为顶层石墨烯,103为源漏外延层,104为HfAlON栅介质层,105为栅金属层,106为源漏金属。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚明白,以下结合具体实施例,并参照附图1,对本发明进一步详细说明。
如图1所示,本实施例提供了一种石墨烯晶体管结构,其结构具体包括:
一由石墨烯(102)与二硫化钼(101)构成的异质结沟道层;
一由二硫化钼构成的源漏外延层(103);
一在石墨烯沟道层(102)上沉积的HfAlON栅介质(104);
一在HfAlON栅介质(104)上沉积的WSi栅金属(105);
以及源漏外延层(103)上的源漏金属(106)。
在本实施例中,异质结沟道层是采用底层二硫化钼和顶层石墨烯构成的;底层二硫化钼(101)的厚度为2-5纳米,为多层材料;顶层石墨烯(102)为单层石墨烯材料;该二维材料构成的异质结结构可以通过机械剥离转移技术集成,也可以在SiC衬底上采用CVD方式生长。
在本实施例中,采用单层的二硫化钼构成的源漏外延层(103),该源漏外延层的掺杂类型为N型,掺杂杂质为钴,该层材料可以通过CVD的方式在源漏选区生长形成。
在本实施例中,HfAlON栅介质(104)是采用原子层沉积的方法沉积在石墨烯沟道层(102)上的,其厚度为8纳米。
在本实施例中,WSi栅金属(105)是通过溅射法沉积到栅介质层上的,其W与Si的比例是0.15:0.85,其厚度为50纳米。
在本实施例中,所述源漏金属(106)为钛/金,厚度为10/50纳米。

Claims (5)

1.一种石墨烯晶体管结构,其包括
一由石墨烯与二硫化钼构成的异质结沟道层;
一由二硫化钼构成的源漏外延层;
一在石墨烯沟道层上沉积的HfAlON栅介质;
一在HfAlON栅介质上沉积的WSi栅金属;
以及源漏外延层上的源漏金属。
2.根据权利要求1所述的一种石墨烯晶体管结构,其特征在于:所述的异质结沟道层是采用底层二硫化钼和顶层石墨烯构成的,这两层材料中的底层二硫化钼是掺杂的,掺杂杂质为碳。
3.根据权利要求1所述一种石墨烯晶体管结构,其特征在于:所述的二硫化钼构成的源漏外延层的掺杂类型为N型,掺杂杂质为硒。
4.根据权利要求1所述一种石墨烯晶体管结构,其特征在于:所述的HfAlON栅介质是采用原子层沉积的方法沉积在石墨烯沟道层上的,厚度为8纳米。
5.根据权利要求1所述一种石墨烯晶体管结构,其特征在于:所述的WSi栅金属是通过溅射法沉积到栅介质层上的,其W与Si的比例是0.15:0.85,厚度为50纳米。
CN201611141257.4A 2016-12-12 2016-12-12 一种石墨烯晶体管结构 Pending CN106784004A (zh)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111628006A (zh) * 2020-05-26 2020-09-04 山东大学 一种数据检索存储阵列
CN114023561A (zh) * 2021-10-29 2022-02-08 华中科技大学 一种非本征二维复合磁性材料、制备方法及应用

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014178016A2 (en) * 2013-05-01 2014-11-06 Indian Institute Of Science Non-volatile opto-electronic device
CN104766888A (zh) * 2015-03-26 2015-07-08 清华大学 高介电常数栅介质复合沟道场效应晶体管及其制备方法
CN105789323A (zh) * 2016-04-06 2016-07-20 清华大学 场效应晶体管以及制备方法
CN105895502A (zh) * 2015-02-13 2016-08-24 台湾积体电路制造股份有限公司 包括2d材料的半导体器件及其制造方法
CN106024861A (zh) * 2016-05-31 2016-10-12 天津理工大学 二维黑磷/过渡金属硫族化合物异质结器件及其制备方法
US20160300958A1 (en) * 2015-04-07 2016-10-13 Research & Business Foundation Sungkyunkwan University Electronic device including 2-dimensional material and method of manufacturing the electronic device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014178016A2 (en) * 2013-05-01 2014-11-06 Indian Institute Of Science Non-volatile opto-electronic device
CN105895502A (zh) * 2015-02-13 2016-08-24 台湾积体电路制造股份有限公司 包括2d材料的半导体器件及其制造方法
CN104766888A (zh) * 2015-03-26 2015-07-08 清华大学 高介电常数栅介质复合沟道场效应晶体管及其制备方法
US20160300958A1 (en) * 2015-04-07 2016-10-13 Research & Business Foundation Sungkyunkwan University Electronic device including 2-dimensional material and method of manufacturing the electronic device
CN105789323A (zh) * 2016-04-06 2016-07-20 清华大学 场效应晶体管以及制备方法
CN106024861A (zh) * 2016-05-31 2016-10-12 天津理工大学 二维黑磷/过渡金属硫族化合物异质结器件及其制备方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111628006A (zh) * 2020-05-26 2020-09-04 山东大学 一种数据检索存储阵列
CN114023561A (zh) * 2021-10-29 2022-02-08 华中科技大学 一种非本征二维复合磁性材料、制备方法及应用
CN114023561B (zh) * 2021-10-29 2022-12-09 华中科技大学 一种非本征二维复合磁性材料、制备方法及应用

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Application publication date: 20170531