CN106783653A - Chip internal temperature monitoring apparatus based on multi-chip stacking technique - Google Patents
Chip internal temperature monitoring apparatus based on multi-chip stacking technique Download PDFInfo
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- CN106783653A CN106783653A CN201611059644.3A CN201611059644A CN106783653A CN 106783653 A CN106783653 A CN 106783653A CN 201611059644 A CN201611059644 A CN 201611059644A CN 106783653 A CN106783653 A CN 106783653A
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- chip
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Automation & Control Theory (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
Abstract
The invention belongs to chip encapsulation technology field, specifically related to a kind of chip internal temperature monitoring apparatus based on multi-chip stacking technique, specifically refer to the high power consumption nude film stacked on top thin-film package type NTC themistor on multi-chip package substrate, by the output monitoring chip internal temperature for monitoring thermal resistor, so as to understand the temperature performance of chip, the internal temperature monitoring to chip is realized.Compared with prior art, it is of the invention it is a technical advantage that:1. the monitoring temperature of the multiple points of MCM chip internals can be realized;2. being capable of flexible configuration monitoring temperature point, the monitoring by the design realization of MCM chips to MCM internal temperature states;3. the maximum temperature worked under MCM chip normal environmental conditions can be measured;4. the temperature-compensating of chip thermocycling condition can be realized so that experimental result is more true and reliable.
Description
Technical field
The invention belongs to chip encapsulation technology field, and in particular to a kind of chip internal temperature based on multi-chip stacking technique
Degree monitoring device, specifically refers to the high power consumption nude film stacked on top thin-film package type NTC thermistor on multi-chip package substrate
Device, by monitoring the output monitoring chip internal temperature of thermal resistor, so as to understand the temperature performance of chip, realizes to chip
Internal temperature monitoring.
Background technology
Multi-chip package is that MCM uses multilayer interconnection substrate, then is collapsed with routing bonding, tape automated bonding or control
Chip connection method is fallen into by multiple IC chips and substrate connection, allows them to turn into the component with specific function.Its major advantage
It is that circuit Connection Density and packaging efficiency are higher, and compared with SMT, MCM package improves reliability.MCM package has a species
Type is deposit film-type multi-chip module, and he is to replace conductor with insulating materials depositing the method for film to build up multilayer interconnection
Substrate, the encapsulation can be considered the application of thin film encapsulation technology, be also the technology that current Electronic Packaging industry is studied, developed energetically.
Because MCM chips are integrated with a fairly large number of various devices in a less space, chip operationally holds
Easy heating, when temperature is raised chip performance can be affected, parameter change, maximum work can be caused when temperature reaches to a certain degree
Working frequency is reduced, regularly exceeds the situations such as regulation.When there are these situations, MCM chips generally can not normal work.In order to ensure
Chip operation is in a state for stabilization, it is necessary to assure the change of chip temperature is within the scope of it may be allowed to.Therefore chip work
The temperature value that can be reached inside when making influences most important to chip performance.Particularly in chip stack package, in chip
Portion's temperature is easy to become uncontrollable.
Traditional MCM chip thermocyclings refer to that chip heating and cooling and then will carry out functional test, once certain high temperature or
MCM chip functions test crash under low temperature is not it is assumed that this piece chip thermocycling passes through.Such experimentation is ignored
The heat that chip is produced when working in itself, but the actually chip heat that its own is produced under the various work is to chip
The temperature of local environment still has certain influence, and especially in -55 DEG C of low-temperature tests, the heat that chip itself is produced causes
Chip local environment does not reach -55 DEG C, and such experimental condition is leaky presence.
The content of the invention
(1) technical problem to be solved
The technical problem to be solved in the present invention is:How a kind of equipment for MCM chip internal monitoring temperatures is provided.
(2) technical scheme
In order to solve the above technical problems, the present invention provides a kind of chip internal monitoring temperature based on multi-chip stacking technique
Equipment, equipment stacked film encapsulation type NTC themistor on the high power consumption nude film in MCM chips, by chip-scale temperature
Control technology, by the whole chip temperature of the output monitoring for monitoring thermal resistor;
Wherein, the chip-scale temperature control technology, is exactly carried out using microthermistor device in chip vacuum chamber to temperature
Measurement, is amplified after measured value signal is extracted and draws temperature value with voltage reference signal conversion of comparing;
The thin-film package type NTC themistor is a chip, and the chip is prepared using briquetting method;The lead of chip
Nude film pin form is fabricated to, is drawn and is connected on BGA balls by bonding line as other nude films and drawn.
Wherein, the thin-film package type NTC themistor quantity depends on the number of high power consumption nude film in MCM chip systems
Amount, the stacked film encapsulation type NTC themistor on each high power consumption nude film;To avoid influencing each other, shown MCM chips system
Each high power consumption nude film is placed around whole MCM chip center in system, and it is naked that thin-film package type NTC themistor is stacked high power consumption
On piece.
Wherein, the thin-film package type NTC themistor size is made as 0.3mm × 0.8mm × 0.3mm, its technique
Flow is welded according to lead, insulation processing, Dies ' Blanking, thin-film package, cutting, and marking note, corner cut carries out
Wherein, the thin-film package type NTC themistor is stacked on high power consumption nude film, and both of which is in bonding line mode
It is connected on substrate, microtemperature sensor has oneself independent circuit, and works independently, and is not related with chip functions.
(3) beneficial effect
The present invention provides a kind of method for MCM chip internal monitoring temperatures, specifically refers to the high power consumption in MCM chips
Stack temperature sensor chip on nude film, by monitoring the output monitoring MCM chip internal temperature of temperature sensor chip, so that
Understand the temperature performance of MCM, realize the monitoring to MCM chip internal temperature.
The present invention adds thermometric design when MCM chips are designed, and can carry out the compensation work under various temperature conditionss, makes
MCM chips input condition in thermocycling more presses close to true temperature value, the experimental result for obtaining is more accurate, can be with
The mistake for reducing MCM chip thermocyclings is rejected.In chip thermocycling, this programme can enter according to the temperature value for obtaining
The compensation of row thermocycling condition so that chip thermocycling result is more true and reliable, for improving chip reliability
There is Auxiliary Significance.
Compared with prior art, it is of the invention it is a technical advantage that:1. the temperature of the multiple points of MCM chip internals can be realized
Degree monitoring;2. being capable of flexible configuration monitoring temperature point, the monitoring by the design realization of MCM chips to MCM internal temperature states;3.
The maximum temperature worked under MCM chip normal environmental conditions can be measured;4. the temperature of chip thermocycling condition can be realized
Degree compensation so that experimental result is more true and reliable.
Brief description of the drawings
Fig. 1 is the theory diagram of this programme;
Fig. 2 is thin-film package type NTC themistor schematic diagram in this programme;
Fig. 3 is this programme citing MCM chip temperatures control point schematic diagram;
Fig. 4 is thin-film package type microtemperature sensor and high power consumption die stack schematic diagram.
Specific embodiment
To make the purpose of the present invention, content and advantage clearer, with reference to the accompanying drawings and examples, to of the invention
Specific embodiment is described in further detail.
In order to solve the above technical problems, as Figure 1-Figure 4, the present invention provides a kind of core based on multi-chip stacking technique
Piece internal temperature monitoring device, equipment stacked film encapsulation type NTC thermistor on the high power consumption nude film in MCM chips
Device, by chip-scale temperature control technology, by the whole chip temperature of the output monitoring for monitoring thermal resistor;
Wherein, the chip-scale temperature control technology, is exactly carried out using microthermistor device in chip vacuum chamber to temperature
Measurement, is amplified after measured value signal is extracted and draws temperature value with voltage reference signal conversion of comparing;
The thin-film package type NTC themistor is a chip, and the chip is prepared using briquetting method;The lead of chip
Nude film pin form is fabricated to, is drawn and is connected on BGA balls by bonding line as other nude films and drawn.
Wherein, the thin-film package type NTC themistor quantity depends on the number of high power consumption nude film in MCM chip systems
Amount, the stacked film encapsulation type NTC themistor on each high power consumption nude film;To avoid influencing each other, shown MCM chips system
Each high power consumption nude film is placed around whole MCM chip center in system, and it is naked that thin-film package type NTC themistor is stacked high power consumption
On piece.
Wherein, the thin-film package type NTC themistor size is made as 0.3mm × 0.8mm × 0.3mm, its technique
Flow is welded according to lead, insulation processing, Dies ' Blanking, thin-film package, cutting, and marking note, corner cut carries out
Wherein, the thin-film package type NTC themistor is stacked on high power consumption nude film, and both of which is in bonding line mode
It is connected on substrate, microtemperature sensor has oneself independent circuit, and works independently, and is not related with chip functions.
The present invention is described in detail with reference to specific embodiment.
Embodiment 1
The present embodiment as shown in figure 1, MCM chips design in add microtemperature sensor chip, it is then micro- by extracting
The conversion compared with voltage reference point of the magnitude of voltage at temperature sensor two ends draws the MCM chips corresponding temperature values of point.
As shown in Fig. 2 thin-film package type NTC themistor chip size is 0.3mm × 0.8mm × 0.3mm.Its technique
Flow is welded according to lead, insulation processing, Dies ' Blanking, thin-film package, cutting, and marking note, corner cut is carried out.
The principle that thin-film package type NTC themistor chip is placed is illustrated, as shown in figure 3, original MCM chips set
Contain two high power consumptions nude film DSP and FPGA in meter, so needing down to monitor the temperature change of this two panels nude film in working order.
But to avoid thin-film package type NTC themistor chip heat from influencing each other, should be naked by high power consumption when chip is designed
Piece is located remotely from each other.
Thin-film package microtemperature sensor stack form in this programme as shown in figure 4, in figure visible microtemperature sensor with
Bonding line mode is connected on substrate, by the output of circuit realiration microtemperature sensor measurement on substrate.
The above is only the preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
For member, on the premise of the technology of the present invention principle is not departed from, some improvement and deformation can also be made, these improve and deform
Also should be regarded as protection scope of the present invention.
Claims (4)
1. a kind of chip internal temperature monitoring apparatus based on multi-chip stacking technique, it is characterised in that the equipment is in MCM chips
In high power consumption nude film on stacked film encapsulation type NTC themistor, by chip-scale temperature control technology, by monitoring temperature-sensitive electricity
Hinder the whole chip temperature of output monitoring of device;
Wherein, the chip-scale temperature control technology, is exactly measured using microthermistor device in chip vacuum chamber to temperature,
It is amplified after measured value signal is extracted and draws temperature value with voltage reference signal conversion of comparing;
The thin-film package type NTC themistor is a chip, and the chip is prepared using briquetting method;The lead of chip makes
Into nude film pin form, drawn and be connected on BGA balls by bonding line as other nude films and drawn.
2. the chip internal temperature monitoring apparatus of multi-chip stacking technique are based on as claimed in claim 1, it is characterised in that institute
Quantity of the thin-film package type NTC themistor quantity depending on high power consumption nude film in MCM chip systems is stated, in each high power consumption
Stacked film encapsulation type NTC themistor on nude film;To avoid influencing each other, each high power consumption is naked in shown MCM chip systems
Piece is placed around whole MCM chip center, and thin-film package type NTC themistor is stacked on high power consumption nude film.
3. the chip internal temperature monitoring apparatus of multi-chip stacking technique are based on as claimed in claim 1, it is characterised in that institute
State thin-film package type NTC themistor size and be made as 0.3mm × 0.8mm × 0.3mm, its technological process is welded according to lead
Connect, insulation processing, Dies ' Blanking, thin-film package, cut, marking note, corner cut is carried out..
4. the chip internal temperature monitoring apparatus of multi-chip stacking technique are based on as claimed in claim 1, it is characterised in that institute
State thin-film package type NTC themistor to be stacked on high power consumption nude film, both of which is connected on substrate in bonding line mode, micro-
Temperature sensor has oneself independent circuit, and works independently, and is not related with chip functions.
Priority Applications (1)
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CN201611059644.3A CN106783653B (en) | 2016-11-24 | 2016-11-24 | Chip interior temperature monitoring apparatus based on multi-chip stacking technique |
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CN201611059644.3A CN106783653B (en) | 2016-11-24 | 2016-11-24 | Chip interior temperature monitoring apparatus based on multi-chip stacking technique |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111446232A (en) * | 2020-04-10 | 2020-07-24 | 中国科学院微电子研究所 | Chip packaging part |
CN112564579A (en) * | 2020-11-30 | 2021-03-26 | 中国航空工业集团公司西安航空计算技术研究所 | Master-slave architecture electromechanical controller and health management method |
CN113031672A (en) * | 2019-12-25 | 2021-06-25 | 中兴通讯股份有限公司 | Temperature control method, system and storage medium |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030092217A1 (en) * | 2001-02-02 | 2003-05-15 | Coyle Anthony L. | Flip chip semiconductor device in a molded chip scale package (CSP) and method of assembly |
CN102593024A (en) * | 2012-01-18 | 2012-07-18 | 中国科学院上海微系统与信息技术研究所 | Method for measuring junction temperature of multi-chip embedded type packaging chip by using integrated resistor |
CN102881602A (en) * | 2012-10-18 | 2013-01-16 | 贵州振华风光半导体有限公司 | Integrating method of working temperature controllable multi-chip component |
CN105023858A (en) * | 2015-06-05 | 2015-11-04 | 南京大学 | An LED device integrating graphene temperature sensing and a manufacturing method thereof |
US20160293573A1 (en) * | 2013-11-12 | 2016-10-06 | Institute of Microelectronics, Chinese Academy of Sciences | Flexible-substrate-based three-dimensional packaging structure and method |
-
2016
- 2016-11-24 CN CN201611059644.3A patent/CN106783653B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030092217A1 (en) * | 2001-02-02 | 2003-05-15 | Coyle Anthony L. | Flip chip semiconductor device in a molded chip scale package (CSP) and method of assembly |
CN102593024A (en) * | 2012-01-18 | 2012-07-18 | 中国科学院上海微系统与信息技术研究所 | Method for measuring junction temperature of multi-chip embedded type packaging chip by using integrated resistor |
CN102881602A (en) * | 2012-10-18 | 2013-01-16 | 贵州振华风光半导体有限公司 | Integrating method of working temperature controllable multi-chip component |
US20160293573A1 (en) * | 2013-11-12 | 2016-10-06 | Institute of Microelectronics, Chinese Academy of Sciences | Flexible-substrate-based three-dimensional packaging structure and method |
CN105023858A (en) * | 2015-06-05 | 2015-11-04 | 南京大学 | An LED device integrating graphene temperature sensing and a manufacturing method thereof |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113031672A (en) * | 2019-12-25 | 2021-06-25 | 中兴通讯股份有限公司 | Temperature control method, system and storage medium |
CN111446232A (en) * | 2020-04-10 | 2020-07-24 | 中国科学院微电子研究所 | Chip packaging part |
CN111446232B (en) * | 2020-04-10 | 2022-03-01 | 中国科学院微电子研究所 | Chip packaging part |
CN112564579A (en) * | 2020-11-30 | 2021-03-26 | 中国航空工业集团公司西安航空计算技术研究所 | Master-slave architecture electromechanical controller and health management method |
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