CN106783623A - 一种倒t型埋栅结构的二维材料场效应晶体管及其制造方法 - Google Patents
一种倒t型埋栅结构的二维材料场效应晶体管及其制造方法 Download PDFInfo
- Publication number
- CN106783623A CN106783623A CN201611170853.5A CN201611170853A CN106783623A CN 106783623 A CN106783623 A CN 106783623A CN 201611170853 A CN201611170853 A CN 201611170853A CN 106783623 A CN106783623 A CN 106783623A
- Authority
- CN
- China
- Prior art keywords
- grid
- prepared
- shape
- dimensional material
- pin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000463 material Substances 0.000 title claims abstract description 50
- 238000000034 method Methods 0.000 title claims abstract description 48
- 230000005669 field effect Effects 0.000 title claims abstract description 32
- 238000004519 manufacturing process Methods 0.000 title description 3
- 238000005516 engineering process Methods 0.000 claims abstract description 39
- 239000002184 metal Substances 0.000 claims abstract description 37
- 229910052751 metal Inorganic materials 0.000 claims abstract description 37
- 239000000758 substrate Substances 0.000 claims abstract description 36
- 238000001459 lithography Methods 0.000 claims abstract description 16
- 238000001259 photo etching Methods 0.000 claims abstract description 12
- 238000002360 preparation method Methods 0.000 claims abstract description 9
- 238000012546 transfer Methods 0.000 claims abstract description 8
- 238000013459 approach Methods 0.000 claims abstract description 6
- 238000005260 corrosion Methods 0.000 claims abstract description 6
- 230000007797 corrosion Effects 0.000 claims abstract description 6
- 239000010931 gold Substances 0.000 claims description 13
- 238000001312 dry etching Methods 0.000 claims description 10
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 10
- 229910052737 gold Inorganic materials 0.000 claims description 10
- 238000001039 wet etching Methods 0.000 claims description 5
- 239000011810 insulating material Substances 0.000 claims description 4
- 238000009413 insulation Methods 0.000 claims description 2
- 150000002739 metals Chemical class 0.000 claims 2
- 230000006641 stabilisation Effects 0.000 abstract description 3
- 238000011105 stabilization Methods 0.000 abstract description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 9
- 229910021389 graphene Inorganic materials 0.000 description 9
- 238000010586 diagram Methods 0.000 description 7
- 238000013461 design Methods 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 239000000377 silicon dioxide Substances 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 229910052681 coesite Inorganic materials 0.000 description 3
- 229910052906 cristobalite Inorganic materials 0.000 description 3
- 238000010894 electron beam technology Methods 0.000 description 3
- 238000011160 research Methods 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910052682 stishovite Inorganic materials 0.000 description 3
- 229910052905 tridymite Inorganic materials 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000005457 optimization Methods 0.000 description 2
- 238000013404 process transfer Methods 0.000 description 2
- 108090000723 Insulin-Like Growth Factor I Proteins 0.000 description 1
- 102000013275 Somatomedins Human genes 0.000 description 1
- 229910003090 WSe2 Inorganic materials 0.000 description 1
- 150000001336 alkenes Chemical class 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 150000001721 carbon Chemical group 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 235000020004 porter Nutrition 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66015—Multistep manufacturing processes of devices having a semiconductor body comprising semiconducting carbon, e.g. diamond, diamond-like carbon, graphene
- H01L29/66037—Multistep manufacturing processes of devices having a semiconductor body comprising semiconducting carbon, e.g. diamond, diamond-like carbon, graphene the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66045—Field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/42376—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Abstract
本发明公开了一种倒T型埋栅结构的二维材料场效应晶体管及其制备方法，首先制备倒T型栅极栅帽和栅脚，然后制备栅介质及二维材料转移，并在衬底表面以平面光刻显影技术制备出隔离区图形，在衬底表面以平面光刻显影技术制备出源漏电极图形，制备出源漏电极；最后在衬底表面以电子束光刻显影技术制备出栅脚图形，与栅脚金属对准，以湿法腐蚀技术来将自对准法中连接源漏电极的金属从栅脚图形下断开，实现自对准，从而得到倒T型埋栅结构的二维材料场效应晶体管。本发明的栅脚栅长可以做到几十纳米量级，栅帽的金属可以使栅极的电阻减小，倒T型的结构使得栅极结构稳定，不会出现T型倒掉的情况。
Description
技术领域
本发明属于微电子技术领域，特别是一种倒T型埋栅结构的二维材料场效应晶体管及其制造方法。
背景技术
石墨烯的出现打破了“二维材料不能在室温下稳定存在”的理论预研，随后因其优异的物理化学性能在各领域的广泛应用而备受关注，在全球掀起了二维材料的研究热潮，之后MoS2，WS2，WSe2，BN等二维材料也相继出现。全新的二维材料进入电子领域的时间不长，取得的成果却相当显著。如石墨烯具有高电子迁移率、高电子饱和速度和高热导率等优良特性，在毫米波、亚毫米波乃至太赫兹器件、超级计算机等方面具有广阔应用前景。基于石墨烯的超高速、超低噪声、超低功耗场效应晶体管及其集成电路，有望突破当前电子器件的高成本、低分辨率及高功耗的瓶颈，为开发更高性能电子器件提供新的思路和方案。
开发二维材料电学性能的研究以二维材料的场效应晶体管的研制为主，就现状而言，二维材料晶体管的电学性能主要受以下几个因素的制约：(1)散射问题。二维材料由单层碳原子构成的二维结构，因而同传统半导体材料相比更易受到与之接触的材料对它的散射而影响其电学性能。对于常规的顶栅结构的场效应晶体管，导电沟道处于衬底和栅介质之间，受到散射也较大，影响了二维材料的电学性能。(2)寄生问题。二维材料晶体管的有源区在栅的正下方，而栅电极和源(漏)电极之间未覆盖的区域则会产生寄生电阻，影响晶体管的电学性能，因而为优化二维材料晶体管的性能，在确保稳定隔离的同时减小栅电极和源(漏)电极的间距是一个关键。(3)栅长问题，栅长越小，二维材料晶体管的fT(电流截至频率)会越大，但是栅长越小，栅金属的电阻会越大，导致fMAX(功率截止频率)会减小，所以设计出T栅的结构，栅帽金属做大，保证栅阻较小，栅脚线宽做小，可以有效提高晶体管频率特性。
在石墨烯埋栅结构设计上，已经有文献报道(RF performance of pre-patternedlocally-embedded-back-gate graphene device,IEDM,2010,23.5.1)，但是该工艺设计仍然不能很好的解决二维材料制作场效应晶体管时遇到的散射及寄生电阻大的技术问题。
发明内容
本发明的目的在于提供一种倒T型埋栅结构的二维材料场效应晶体管及其制造方法，减小二维材料应用于场效应晶体管时普遍存在的散射以及寄生电阻，优化了器件电学性能。
实现本发明目的的技术解决方案为：一种倒T型埋栅结构的二维材料场效应晶体管及其制备方法，由以下步骤按顺序制备而得：
(1)制备倒T型栅极栅帽：在绝缘衬底上以电子束光刻显影技术制备出场效应晶体管的倒T型栅极的栅帽图形，采用干法刻蚀技术在绝缘衬底上刻蚀出栅帽图形的凹槽，再金属化，辅以溶胶剥离技术，将凹槽填满，作为倒T型栅极的栅帽；
(2)制备倒T型栅极栅脚：在绝缘衬底表面生长一层介质层，再以电子束光刻显影技术制备出场效应晶体管的倒T型栅极的栅脚图形，采用干法刻蚀技术刻蚀介质层直至下层金属，再金属化，金属厚度略高于介质层厚度，辅以溶胶剥离技术，制备出倒T型栅极的栅脚；
(3)栅介质制备及二维材料转移：在栅脚上生长一层高k绝缘材料作为栅介质，采用金属转移工艺转移二维材料到衬底表面；
(4)隔离区工艺：在衬底表面以平面光刻显影技术制备出隔离区图形，湿法腐蚀去除其他部分金属，再氧化去除隔离区外的二维材料；
(5)源漏电极制备：在衬底表面以平面光刻显影技术制备出源漏电极图形，金属化，辅以溶胶剥离技术，制备出源漏电极；
(6)自对准工艺：在衬底表面以电子束光刻显影技术制备出栅脚图形，与栅脚金属对准，以湿法腐蚀技术来将自对准法中连接源漏电极的金属从栅脚图形下断开，实现自对准，从而得到倒T型埋栅结构的二维材料场效应晶体管。
本发明与现有技术相比，其显著优点：(1)腐金液的侧向腐蚀形成的对准间距同自对准去金属厚度一致，小于常规工艺中电子束曝光系统形成的对准间距，降低了寄生电阻。(2)埋栅结构从设计上将二维材料受到的散射降到最低，优化了二维材料的电学性能。(3)倒T型栅的结构设计，栅脚的栅长可以做到几十纳米量级，栅帽的金属可以使栅极的电阻减小，倒T型的结构使得栅极结构稳定，不会出现T型倒掉的情况。
下面结合附图对本发明作进一步详细描述。
附图说明
图1是在衬底材料上刻蚀出栅帽凹槽示意图。
图2是蒸发金属填满凹槽示意图。
图3是生长介质层示意图。
图4是栅脚制备示意图。
图5是栅介质生长示意图。
图6是金转移石墨烯示意图。
图7是自对准腐蚀示意图。
图8是本发明的流程图。
具体实施方式
本发明倒T型埋栅结构的二维材料场效应晶体管及其制备方法，步骤如下：
(1)制备倒T型栅极栅帽：在绝缘衬底上以电子束光刻显影技术制备出场效应晶体管的倒T型栅极的栅帽图形，采用干法刻蚀技术在绝缘衬底上刻蚀出栅帽图形的凹槽，再金属化，辅以溶胶剥离技术，将凹槽填满，作为倒T型栅极的栅帽；步骤(1)中的栅长为500nm-2um，凹槽深度为200nm-1um。
(2)制备倒T型栅极栅脚：在绝缘衬底表面生长一层介质层(指氮化硅或氧化硅)，再以电子束光刻显影技术制备出场效应晶体管的倒T型栅极的栅脚图形，采用干法刻蚀技术刻蚀介质层直至下层金属，再金属化，金属厚度略高于介质层厚度，辅以溶胶剥离技术，制备出倒T型栅极的栅脚；步骤(2)中的介质层厚度为50nm-200nm。
(3)栅介质制备及二维材料转移：在栅脚上生长一层高k绝缘材料作为栅介质，采用金属转移工艺转移二维材料到衬底表面；步骤(3)中的高k绝缘材料厚度为5nm-20nm。
(4)隔离区工艺：在衬底表面以平面光刻显影技术制备出隔离区图形，湿法腐蚀去除其他部分金属，再氧化去除隔离区外的二维材料。
(5)源漏电极制备：在衬底表面以平面光刻显影技术制备出源漏电极图形，金属化，辅以溶胶剥离技术，制备出源漏电极。
(6)自对准工艺：在衬底表面以电子束光刻显影技术制备出栅脚图形，与栅脚金属对准，以湿法腐蚀技术来将自对准法中连接源漏电极的金属从栅脚图形下断开，实现自对准，从而得到倒T型埋栅结构的二维材料场效应晶体管。
实施例
本发明基于二维材料的平面制备工艺制作出一种倒T栅埋栅结构的石墨烯场效应晶体管，具体制备步骤如下：
(1)在Si/SiO2衬底上用电子束电子束光刻显影技术制备出场效应晶体管的倒T型栅极的栅帽图形，栅长500nm，采用干法刻蚀技术在Si/SiO2衬底上刻蚀出深度200nm的凹槽，再蒸发200nmAu，辅以溶胶剥离技术，将凹槽填满，作为倒T型栅极的栅帽，如图1、图2所示。
(2)在Si/SiO2衬底表面生长一层氮化硅(生长技术为常规技术即可)，厚度50nm，使表面平坦化，再以电子束光刻显影技术制备出场效应晶体管的倒T型栅极的栅脚图形，栅长100nm，采用干法刻蚀技术刻蚀氮化硅直至下层金属，蒸发100nmAu，辅以溶胶剥离技术，制备出倒T型栅极的栅脚，如图3、图4所示。
(3)采用ALD生长Al2O3作为栅介质，厚度10nm,采用Au转移工艺转移石墨烯到衬底表面，Au厚度30nm，如图5、图6所示。
(4)以平面光刻显影技术制备出隔离区图形，湿法腐蚀去除其他部分Au，再氧化去除隔离区外石墨烯。
(5)以平面光刻显影技术制备出源漏电极图形，蒸发20nmTi/200nmAu作为源漏金属，辅以溶胶剥离技术，制备出源漏电极。
(6)以电子束光刻显影技术制备出栅极图形，栅长100nm，与栅脚金属对准，以湿法腐蚀技术来将自对准法中连接源漏电极的金属从栅脚图形下断开，实现自对准，完成倒T型埋栅结构的二维材料场效应晶体管制备，如图7所示。
通过上述方法制备得到的倒T型埋栅结构的石墨烯FET(场效应晶体管)器件具有如下特性：(1)腐金液的侧向腐蚀形成的对准间距同自对准去金属厚度一致，小于常规工艺中电子束曝光系统形成的对准间距，利于降低寄生电阻。(2)埋栅结构从设计上将二维材料受到的散射降到最低，利于优化二维材料的电学性能。(3)倒T型栅的结构设计，栅脚的栅长可以做到几十纳米量级，栅帽的金属可以使栅极的电阻减小，倒T型的结构使得栅极结构稳定。
Claims (5)
1.一种倒T型埋栅结构的二维材料场效应晶体管，其特征在于由以下步骤按顺序制备而得：
(1)制备倒T型栅极栅帽：在绝缘衬底上以电子束光刻显影技术制备出场效应晶体管的倒T型栅极的栅帽图形，采用干法刻蚀技术在绝缘衬底上刻蚀出栅帽图形的凹槽，再金属化，辅以溶胶剥离技术，将凹槽填满，作为倒T型栅极的栅帽；
(2)制备倒T型栅极栅脚：在绝缘衬底表面生长一层介质层，再以电子束光刻显影技术制备出场效应晶体管的倒T型栅极的栅脚图形，采用干法刻蚀技术刻蚀介质层直至下层金属，再金属化，金属厚度略高于介质层厚度，辅以溶胶剥离技术，制备出倒T型栅极的栅脚；
(3)栅介质制备及二维材料转移：在栅脚上生长一层高k绝缘材料作为栅介质，采用金属转移工艺转移二维材料到衬底表面；
(4)隔离区工艺：在衬底表面以平面光刻显影技术制备出隔离区图形，湿法腐蚀去除其他部分金属，再氧化去除隔离区外的二维材料；
(5)源漏电极制备：在衬底表面以平面光刻显影技术制备出源漏电极图形，金属化，辅以溶胶剥离技术，制备出源漏电极；
(6)自对准工艺：在衬底表面以电子束光刻显影技术制备出栅脚图形，与栅脚金属对准，以湿法腐蚀技术来将自对准法中连接源漏电极的金属从栅脚图形下断开，实现自对准，从而得到倒T型埋栅结构的二维材料场效应晶体管。
2.一种倒T型埋栅结构的二维材料场效应晶体管的制备方法，其特征在于步骤如下：
(1)制备倒T型栅极栅帽：在绝缘衬底上以电子束光刻显影技术制备出场效应晶体管的倒T型栅极的栅帽图形，采用干法刻蚀技术在绝缘衬底上刻蚀出栅帽图形的凹槽，再金属化，辅以溶胶剥离技术，将凹槽填满，作为倒T型栅极的栅帽；
(2)制备倒T型栅极栅脚：在绝缘衬底表面生长一层介质层，再以电子束光刻显影技术制备出场效应晶体管的倒T型栅极的栅脚图形，采用干法刻蚀技术刻蚀介质层直至下层金属，再金属化，金属厚度略高于介质层厚度，辅以溶胶剥离技术，制备出倒T型栅极的栅脚；
(3)栅介质制备及二维材料转移：在栅脚上生长一层高k绝缘材料作为栅介质，采用金属转移工艺转移二维材料到衬底表面；
(4)隔离区工艺：在衬底表面以平面光刻显影技术制备出隔离区图形，湿法腐蚀去除其他部分金属，再氧化去除隔离区外的二维材料；
(5)源漏电极制备：在衬底表面以平面光刻显影技术制备出源漏电极图形，金属化，辅以溶胶剥离技术，制备出源漏电极；
(6)自对准工艺：在衬底表面以电子束光刻显影技术制备出栅脚图形，与栅脚金属对准，以湿法腐蚀技术来将自对准法中连接源漏电极的金属从栅脚图形下断开，实现自对准，从而得到倒T型埋栅结构的二维材料场效应晶体管。
3.根据权利要求2所述的制备方法，其特征在于步骤(1)中的栅长为500nm-2um，凹槽深度为200nm-1um。
4.根据权利要求2所述的制备方法，其特征在于步骤(2)中的介质层厚度为50nm-200nm。
5.根据权利要求2所述的制备方法，其特征在于步骤(3)中的高k绝缘材料厚度为5nm-20nm。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611170853.5A CN106783623B (zh) | 2016-12-16 | 2016-12-16 | 一种倒t型埋栅结构的二维材料场效应晶体管及其制造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611170853.5A CN106783623B (zh) | 2016-12-16 | 2016-12-16 | 一种倒t型埋栅结构的二维材料场效应晶体管及其制造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106783623A true CN106783623A (zh) | 2017-05-31 |
| CN106783623B CN106783623B (zh) | 2019-10-18 |
Family
ID=58892429
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611170853.5A Active CN106783623B (zh) | 2016-12-16 | 2016-12-16 | 一种倒t型埋栅结构的二维材料场效应晶体管及其制造方法 |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106783623B (zh) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108258035A (zh) * | 2018-01-15 | 2018-07-06 | 中国科学院微电子研究所 | 一种GaN基增强型场效应器件及其制作方法 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130082242A1 (en) * | 2011-10-03 | 2013-04-04 | International Business Machines Corporation | Transistor device with reduced gate resistance |
| CN103563080A (zh) * | 2011-05-19 | 2014-02-05 | 国际商业机器公司 | 具有嵌入的栅电极的自对准碳电子装置 |
| CN103700592A (zh) * | 2013-11-29 | 2014-04-02 | 中国电子科技集团公司第五十五研究所 | 基于自对准埋栅结构的二维材料场效应晶体管的制造方法 |
| US20150194619A1 (en) * | 2014-01-08 | 2015-07-09 | International Business Machines Corporation | Semiconductor device with ballistic gate length structure |
-
2016
- 2016-12-16 CN CN201611170853.5A patent/CN106783623B/zh active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103563080A (zh) * | 2011-05-19 | 2014-02-05 | 国际商业机器公司 | 具有嵌入的栅电极的自对准碳电子装置 |
| US20130082242A1 (en) * | 2011-10-03 | 2013-04-04 | International Business Machines Corporation | Transistor device with reduced gate resistance |
| CN103700592A (zh) * | 2013-11-29 | 2014-04-02 | 中国电子科技集团公司第五十五研究所 | 基于自对准埋栅结构的二维材料场效应晶体管的制造方法 |
| US20150194619A1 (en) * | 2014-01-08 | 2015-07-09 | International Business Machines Corporation | Semiconductor device with ballistic gate length structure |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108258035A (zh) * | 2018-01-15 | 2018-07-06 | 中国科学院微电子研究所 | 一种GaN基增强型场效应器件及其制作方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106783623B (zh) | 2019-10-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Xu et al. | High performance indium-zinc-oxide thin-film transistors fabricated with a back-channel-etch-technique | |
| CN103700592B (zh) | 基于自对准埋栅结构的二维材料场效应晶体管的制造方法 | |
| CN105762078B (zh) | GaN基纳米沟道高电子迁移率晶体管及制作方法 | |
| US10312176B2 (en) | Semiconductor device | |
| CN105304689B (zh) | 基于氟化石墨烯钝化的AlGaN/GaN HEMT器件及制作方法 | |
| CN102810564B (zh) | 一种射频器件及其制作方法 | |
| CN106356405A (zh) | 一种异质结碳纳米管场效应晶体管及其制备方法 | |
| CN105895704B (zh) | 一种石墨烯场效应晶体管及其制造方法 | |
| CN103985762A (zh) | 超低欧姆接触电阻石墨烯晶体管及其制备方法 | |
| Zhou et al. | High performance millimeter-wave InAlN/GaN HEMT for low voltage RF applications via regrown Ohmic contact with contact ledge structure | |
| Yu et al. | 650 mW/mm output power density of H‐terminated polycrystalline diamond MISFET at 10 GHz | |
| CN105552047B (zh) | 一种AlGaN/GaN HEMT晶体管制造方法 | |
| Murugapandiyan et al. | Performance analysis of HfO2/InAlN/AlN/GaN HEMT with AlN buffer layer for high power microwave applications | |
| CN105789032A (zh) | 一种石墨烯场效应晶体管及其制造方法 | |
| Fu et al. | High‐frequency InAlN/GaN HFET with fmax over 400 GHz | |
| Betz et al. | High-frequency characterization of thermionic charge transport in silicon-on-insulator nanowire transistors | |
| CN106783623B (zh) | 一种倒t型埋栅结构的二维材料场效应晶体管及其制造方法 | |
| Valasa et al. | Design and performance optimization of junctionless bottom spacer FinFET for digital/analog/RF applications at sub-5nm technology node | |
| Kumar et al. | Reduction of Drain Induced Barrier Lowering in DM‐HD‐NA GAAFET for RF Applications | |
| CN109841581A (zh) | 薄膜晶体管及其制备方法、阵列基板、显示面板及装置 | |
| Lv et al. | High‐frequency AlGaN/GaN HFETs with fT/fmax of 149/263 GHz for D‐band PA applications | |
| Mi et al. | Record combination fmax· Vbr of 25 THz· V in AlGaN/GaN HEMT with plasma treatment | |
| CN111435644B (zh) | 环栅晶体管及其制备方法 | |
| CN104282751A (zh) | 高集成度高迁移率源漏栅辅控型无结晶体管 | |
| JP6764375B2 (ja) | 電界効果型トランジスタ |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |