CN106782952A - Multifunctional multilayer panel array piezoresistor and preparation method thereof - Google Patents
Multifunctional multilayer panel array piezoresistor and preparation method thereof Download PDFInfo
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- CN106782952A CN106782952A CN201611132135.9A CN201611132135A CN106782952A CN 106782952 A CN106782952 A CN 106782952A CN 201611132135 A CN201611132135 A CN 201611132135A CN 106782952 A CN106782952 A CN 106782952A
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- piezoresistor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
- H01C7/1013—Thin film varistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/06—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base
- H01C17/065—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base by thick film techniques, e.g. serigraphy
- H01C17/06506—Precursor compositions therefor, e.g. pastes, inks, glass frits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
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Abstract
The invention discloses Multifunctional multilayer panel array piezoresistor and preparation method thereof, resistor body is made up of multi-layer ceramics diaphragm and interior electrode；Interior electrode includes multiple common ground poles and signal electrode, and multiple common ground poles are alternately arranged with multiple signal electrodes on the stacked direction of ceramic diaphragm, and common ground pole partly overlaps in the stacking direction with signal electrode；Each common ground pole extends from the peripheral surface of resistor body to telltale hole and surplus is left between telltale hole, and from the telltale hole of resistor body, surface extends and leaves between peripheral surface surplus each signal electrode to the periphery；The peripheral surface of resistor body is provided with the ground connection exit for coating all common ground poles extension, and the signal exit for coating all signal electrode extensions is provided with telltale hole.The present invention can effectively increase the ability of the electromagnetism interference of filter connector, solve interface electromagnetic interference problem.
Description
Technical field
The present invention relates to resistor technologies field, more particularly to a kind of filter connector Multifunctional multilayer panel array pressure
Sensitive resistor and preparation method thereof.
Background technology
As the continuous popularization of integrated circuit and large scale integrated circuit in electronic equipment, computer and household electrical appliance should
With the increasingly severe safe handling for having had influence on circuit of the interference of, electromagnetic wave.Particularly transient noise interference, due to thereon
Lifting speed is fast, the duration is short, voltage amplitude amplitude (several hectovolts are to several kilovolts) high, the features such as randomness is strong, to microcomputer and numeral
Circuit is also easy to produce severe jamming, influences the stable operation of circuit.
To an electronic system, various electromagnetic interferences are the most serious at equipment interface, can in interface electromagnetic interference
Device interior is conducted or be radiated, by electromagnetic interference conduction or device external can be radiated to again, therefore equipment room transmission signal
Connector is served and its important effect in electromagnetism interference.
Thus, install filtering unit additional on the metal ferrule of connector and constitute filter connector, so as to solve interface
Electromagnetic interference problem.Multilayer planar array is a kind of specific element design form for being used for EMI filter connectors.One matrix
Inside include various passive devices.Single wiring is all to be connected to each passive device by through hole, and in device context
It is all connected to ground.
Filter connector based on plane is designed suitable for all MIL-STD connectors.The shape of connector (should
The profile of planar array must be unanimously) it is circular or rectangle.Conventional rectangular design includes D-Sub and high density D-Sub
With micro- Ds, Arinc404s and Arinc600.Irregular shape can also.Planar dimension is accordingly：From 5 millimeters of square to 75
Mm dia.
Contact number from 2 to 200 more than.The contact range of standard is from 0.3 mm dia upwards to coaxial cable ---
Can all filter.Standard contact degree is since 0.63 millimeter.
Existing patent CN101667670B is disclosed《A kind of ceramic filter with multilayer plate-type array structure and its technique》, its
In predominantly capacitor and its manufacture craft, its interference product to transient noise is susceptible to puncture failure, and reliability is poor.
Existing patent CN103187668A is disclosed《Filter connector Zinc oxide-base multilayer pressure sensitive planar array》, wherein
The main Zinc-oxide piezoresistor for illustrating, its static capacity is small, and response speed is slow, and noise absorption performance is poor, and loss is larger,
Influence the use of product.
The content of the invention
Weak point present in regarding to the issue above, the present invention provide Multifunctional multilayer panel array piezoresistor and
Its preparation method.
To achieve the above object, the present invention provides a kind of Multifunctional multilayer panel array piezoresistor, including：Resistor
Main body；
The resistor body is the platy structure with multiple telltale holes, and it is by multi-layer ceramics diaphragm and interior electrode structure
Into；
The interior electrode includes multiple common ground poles and signal electrode, multiple common ground poles and multiple letters
Number electrode is alternately arranged on the stacked direction of the ceramic diaphragm, and the common ground pole is with signal electrode in the stacking direction
Partly overlap；Each described common ground pole extends and is stayed between telltale hole from the peripheral surface of resistor body to telltale hole
There is surplus, surface extends and leaves between peripheral surface each described signal electrode to the periphery from the telltale hole of resistor body
Surplus；
The peripheral surface of the resistor body is provided with the grounding lead for coating all common ground poles extension
Go out end, the signal exit for coating all signal electrode extensions is provided with the telltale hole；
The upper and lower surface of the resistor body is provided with surface coating layer.
As a further improvement on the present invention, the resistor body is the circular ceramic wafer with multiple telltale holes,
The axis of the telltale hole is parallel with the axis of ceramic wafer.
As a further improvement on the present invention, the thickness of the ceramic diaphragm is 50um~200um, and the ceramic diaphragm is
The laminated structure that principal component and accessory ingredient are made, the principal component is SrTiO3, the accessory ingredient include Si compounds, Al chemical combination
One or more in thing, Li compounds, rare-earth element compound.
As a further improvement on the present invention, the common ground pole, the thickness of signal electrode are 0.5um~2.0um,
The common ground pole, signal electrode are the laminated structure that Ni or Ni alloys are made.
As a further improvement on the present invention, the ground connection exit, the thickness of signal exit are 5um~50um,
The ground connection exit, signal exit are one or more in Cu, Ag, Ag-Pd alloy, Au, or are closed in Cu, Ag, Ag-Pd
The cyclic structure that glass and/or metal oxide are made is added in one or more in gold, Au.
As a further improvement on the present invention, the surface coating layer includes glass glaze layer and organic coat layer；
The glass glaze layer is arranged in the upper and lower surface of the resistor body；
The organic coat layer is arranged on the glass glaze layer.
The present invention also provides a kind of preparation method of Multifunctional multilayer panel array piezoresistor, including：
Step 1, green compact chip is prepared by wet press or the tape casting；
Step 2, plastic removal, sintering are carried out to green compact chip prepare resistor body；
Step 3, preparation ground connection exit, signal exit and surface coating layer on resistor body, complete multi-functional
The preparation of multi-layer plate-type array piezoresistor.
As a further improvement on the present invention, the step 1 includes：
During using wet press method, ceramic diaphragm slurry and electrode size are successively printed on substrate, by using
Mould punching method or laser formation method are peeled off after raw bar block is processed into the base substrate with telltale hole with substrate, form green compact core
Piece；
During using casting method, ceramic diaphragm slurry is formed into ceramic diaphragm, after printing electrode size thereon, carried out
Stacking；Green compact are carried out into even pressure by the method for isostatic pressed, then being pressed using mould punching method or laser formation method will raw bar block
Be processed into after the base substrate with telltale hole with matrix stripping, form green compact chip.
As a further improvement on the present invention, in step 2：
Plastic removal technique is：Plastic removal is carried out in atmosphere, and the programming rate of plastic removal is 2~100 DEG C/h, plastic removal temperature is
180~400 DEG C, soaking time be 1~200 hour；
Sintering process is：It is sintered in being carried out in reducing atmosphere, the partial pressure of oxygen in reducing atmosphere is 10-7~10-11Air
Pressure, sintering temperature is 1100 DEG C~1400 DEG C, soaking time is 0.5~8 hour, heating rate is 50~500 DEG C/h, cold
But speed is 50~500 DEG C/h.
As a further improvement on the present invention, need to anneal resistor body after the completion of being sintered in reducing atmosphere
Treatment；
Annealing is 10 in partial pressure of oxygen-4~10-6Carried out in the atmosphere of atmospheric pressure or more, annealing temperature be 800 DEG C~
1100 DEG C, annealing soaking time 2~10 hours, cooling velocity be 50 DEG C~500 DEG C/h.
Compared with prior art, beneficial effects of the present invention are：
Multifunctional multilayer panel array piezoresistor disclosed by the invention and preparation method thereof, it effectively increases filtering
The ability of the electromagnetism interference of connector, solves interface electromagnetic interference problem；
The present invention can realize the double effectses of capacitor and piezoresistor, product of the invention have under low pressure compared with
Big capacitance, realizes the function of capacitor, after voltage is higher than certain critical value, the work(with very strong piezoresistor
Energy；
The present invention can provide perfect transient overvoltage defencive function and EMI filtering solutions, and compared with other winks
State protection device has lightweight, small volume, high mechanical strength, impact resistance and the strong advantage of vibration resistance, it is ensured that filtering connects
Connect the reliability of device.
Brief description of the drawings
Fig. 1 is the front view of Multifunctional multilayer panel array piezoresistor disclosed in an embodiment of the present invention；
Fig. 2 is the side view of Multifunctional multilayer panel array piezoresistor disclosed in an embodiment of the present invention；
Fig. 3 is A-A sectional views in Fig. 1；
Fig. 4 is the use schematic diagram of Multifunctional multilayer panel array piezoresistor disclosed in an embodiment of the present invention.
In figure：
1st, resistor body；2nd, ceramic diaphragm；3rd, common ground pole；4th, signal electrode；5th, it is grounded exit；6th, signal draws
Go out end；7th, surface coating layer；8th, telltale hole.
Specific embodiment
To make the purpose, technical scheme and advantage of the embodiment of the present invention clearer, below in conjunction with the embodiment of the present invention
In accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is
A part of embodiment of the invention, rather than whole embodiments.Based on the embodiment in the present invention, ordinary skill people
The every other embodiment that member is obtained on the premise of creative work is not made, belongs to the scope of protection of the invention.
The present invention is described in further detail below in conjunction with the accompanying drawings：
Embodiment 1：
As Figure 1-4, in order to solve problems of the prior art, it is board-like that the present invention provides a kind of Multifunctional multilayer
Array piezoresistor, including：Resistor body 1, ceramic diaphragm 2, common ground pole 3, signal electrode 4, ground connection exit 5,
Signal exit 6, surface coating layer 7 and telltale hole 8；
Resistor body of the invention 1 is the circular ceramic wafer with multiple telltale holes 8, axis and the pottery of telltale hole 8
The axis of porcelain plate is parallel, as shown in Figure 1-2；Resistor body of the invention 1 can be configured as other shapes, resistor body
1 is made up of multi-layer ceramics diaphragm 2 and interior electrode；Wherein：
Ceramic diaphragm of the invention 2 does not carry out circular arc treatment in turning and seamed edge, the thickness of ceramic diaphragm 2 for 50um~
200um, ceramic diaphragm 2 is the laminated structure that principal component and accessory ingredient are made, and principal component is SrTiO3, accessory ingredient include Si chemical combination
One or more in thing, Al compounds, Li compounds, rare-earth element compound etc..
Interior electrode of the invention includes multiple common ground poles 3 and signal electrode 4, common ground pole 3, signal electrode 4
Thickness is 0.5um~2.0um, and common ground pole 3, signal electrode 4 are the laminated structure that Ni or Ni alloys etc. are made.It is multiple public
Earthing pole 3 is alternately arranged with multiple signal electrodes 4 on the stacked direction of ceramic diaphragm 2 altogether, i.e.,：Adjacent two layers ceramic diaphragm
Common ground pole 3 is printed with upper strata ceramic diaphragm 2, signal electrode 4 is printed with lower floor's ceramic diaphragm 2；Common ground pole 3 with
Signal electrode 4 partly overlaps in the stacking direction, i.e.,：Common ground pole 3 and signal electrode 4 are in stacked direction (Vertical Square in Fig. 3
To) on projected when, common ground pole 3 and signal electrode 4 have overlapping area；Common ground pole 3 and the weight of signal electrode 4
Folded area determines the performance of piezoresistor.
Each common ground pole 3 of the invention extend to telltale hole 8 from the peripheral surface of resistor body 1 and with telltale hole 8
Between leave surplus；As shown in figure 3, common ground pole 3 of the present invention is an overall structure, it leaves surplus between telltale hole,
I.e.：Have gap in vain；The size of surplus is designed according to actual piezoresistor demand.
Each signal electrode 4 of the invention from the telltale hole 8 of resistor body 1 to the periphery surface extend and with peripheral surface it
Between leave surplus；As shown in figure 3, signal electrode of the present invention 4 is from telltale hole and stretches out；If closing on the signal of peripheral surface
Hole 8, then leave surplus between signal electrode 4 and peripheral surface；If internal signal hole 8, then do not docked between signal electrode 4.
As shown in figure 3, the peripheral surface of resistor body of the invention 1 is provided with for coating all common ground poles 3
The ground connection exit 5 of extension, is provided with the signal exit for coating the extension of all signal electrodes 4 at telltale hole 8
6；Ground connection exit 5, the thickness of signal exit 6 are 5um~50um, ground connection exit 5, signal exit 6 using Cu,
Ag, Ag-Pd alloy, Au etc..In other outer electrode ground connection exit 5, signal exit 6 and public affairs can be improved comprising glass etc.
The connection reliability of earthing pole 3 and signal electrode 4, adds the densification that metal oxide draws termination electrode to improve in addition altogether
Property, to improve the moisture-proof of product.
The upper and lower surface of resistor body of the present invention 1 is provided with surface coating layer 7, and surface coating layer 7 includes glass glaze layer
With organic coat layer；Glass glaze layer is arranged in the upper and lower surface of resistor body, and organic coat layer is arranged on glass glaze
On layer.Wherein, glass glaze layer belongs to dielectric, and main component is Ca with molar content：40%-50%, Ti：15%-
25%；Si：20-30%；Al：0-3%；Co：0.1-2.0% and other micro Mgs, Li, B etc.；Organic coat layer is prevented for three
Paint, main component is acrylic resin or polyurethane and organosilicon etc..
Embodiment 2：
The present invention provides a kind of preparation method of Multifunctional multilayer panel array piezoresistor, including：
Step 1, green compact chip is prepared by wet press or the tape casting；
Step 2, plastic removal, sintering are carried out to green compact chip prepare resistor body；
Step 3, preparation ground connection exit, signal exit and surface coating layer on resistor body, complete multi-functional
The preparation of multi-layer plate-type array piezoresistor.
Wherein, it is of the invention as existing laminated device, by using wet press or the tape casting, green compact chip is prepared,
Required dimension of picture is pressed by green machined into the base substrate with telltale hole by using mould punching method or laser formation method, to it
After carrying out plastic removal, sintering, external electrode is manufactured by printing or transferring, sinter.Manufacture method is illustrated below：
First, ceramic diaphragm slurry is manufactured
Ceramic diaphragm slurry can be the organic system slurry that piezo-resistance raw material and organic principle are mixed into, or
Water base system's slurry.
Organic bond is that resin is dissolved into resulting in organic solvent, and the resin to being used does not have special limit
System, chooses one or more in the adhesive that can be commonly used for ethyl cellulose, PVB etc..The organic solvent for being used can be with root
Chosen according to wet press and casting method, such as toluene, acetone, alcohol, terpinol；
Water-based adhesive is to be dissolved in water water-soluble resin, dispersant etc. and obtain.To the water-soluble tree for being used
Fat has no particular limits, and can choose one or more from PVA, cellulose, water soluble acrylic resin, latex etc.；
Weight % of content 1~10 of resin or so, weight % of solvent 10~40 or so in slurry.Can be as needed in slurry
From additives such as suitable dispersant, plasticizer, piezo-resistance powder, insulators.
In the method using wet press, piezo-resistance slurry and electrode size are successively printed on the substrates such as PET,
By using mould punching method or laser formation method by required dimension of picture will raw bar block be processed into the base substrate with through hole after with
Matrix stripping, forms green compact chip；When on the other hand, using casting method, piezo-resistance slurry is formed into diaphragm, thereon
After printing internal electrode slurry, they are laminated, green compact are carried out into even pressure by the method for isostatic pressed.Then mould punching is used
Method or laser formation method by required dimension of picture will raw bar block be processed into after the base substrate with through hole with matrix stripping, form green compact
Chip.
Then plastic removal and sintering are carried out to the green compact chip.
Plastic removal treatment is carried out to green compact chip：Generally carry out in atmosphere, preferably programming rate is 2~100 DEG C/h,
More preferably 5~30 DEG C/h, preferably 180~400 DEG C of holding temperature, more preferably 200~300 DEG C, temperature hold-time be 1~
200 hours, more preferably 24~150 hours.
Partial pressure of oxygen after the completion of plastic removal during green sintering in ambiance is preferably 10-7~10-11Atmospheric pressure.Oxygen is pressed through
Height reduces the semiconducting degree of product, and electrode has the risk of oxidation；Partial pressure of oxygen is too low, and abnormal burning occurs in internal electrode
Knot, and interrupt.
Preferably 1100 DEG C~1400 DEG C, preferably 1200 DEG C~1320 DEG C of temperature when burning till in addition.Holding temperature is less than preceding
When stating temperature range, it is densified insufficient；During higher than said temperature scope, abnormal sintering occurs in internal electrode to interrupt, and causes
Electrode material spreads with porcelain body, causes properties of product to deteriorate.
Firing condition in addition, preferably heating rate are 50~500 DEG C/h, more preferably 100~300 DEG C/small
When, preferably soaking time is 0.5~8 hour, and more preferably 1~3 hour, preferably cooling velocity was 50~500 DEG C/h, more excellent
200~300 DEG C/h are selected, the preferred reducing atmosphere of environment is burnt till in addition, reducing atmosphere such as heats H2+N2 mixed gas
Use afterwards or vacuum environment.
After being sintered in reducing atmosphere, resistor body need to be annealed, host dielectric layer is reoxidized, can be obvious
Improve grain boundary layer insulating properties.Partial pressure of oxygen is preferably 10 in anneal environment-6Atmospheric pressure or more, is particularly preferably 10-5~10-4Air
Pressure, when partial pressure of oxygen is less than aforementioned range, main body porcelain body reoxidizes difficulty, there is inclining for interior anodizing during beyond above range
To.
The temperature of annealing is preferably 1100 DEG C and less, and particularly preferred temperature is 800 DEG C~1100 DEG C.Keeping temperature is less than
Host dielectric layer grain boundary oxidation is insufficient during aforementioned range, therefore insulaion resistance is low, influences properties of product.And work as holding temperature and exceed
During aforementioned range, not only capacity reduction after interior electrode layer oxidation, and internal electrode is reacted with medium, easily produces performance to dislike
Change, insulation is reduced, nonlinear factor reduction.Furthermore annealing can also be carried out individually, i.e., be raised to annealing temperature by room temperature, then be dropped
Temperature.
In addition, annealing soaking time be 0~25 hour, preferably 2~10 hours, preferably cooling velocity be 50 DEG C~
500 DEG C/h.
Multilayer Varistor main body obtained above is ground electrode end surface by the way of sandblasting, then by true
Sintered after empty through hole coating external electrode and form ground connection exit, signal exit.Then as needed in outer electrode (grounding lead
Go out end, signal exit) surface using plating etc. formed weld layer.
Embodiment 3：
As Figure 1-4, piezoresistor array of the present invention is shaped as circle, a diameter of 20.95mm, and thickness is
3.00mm.The number of plies of its interior electrode is 8 layers, and two ends end layer (the ceramic lamina membranacea of the superiors/lower floor) thickness is 1000 μm, intermediate layer
(intermediate layer ceramics lamina membranacea) thickness is uniform and be 120 μm；Metal electrode is built between two-layer ceramic matrix；Between signal hole position
Independently of one another, signal pitch of holes uses the standard density of 2.54mm, and exit is that circular pin is drawn, and aperture is 0.95mm, is put down
Face array contact number is 55；Pickup electrode exit is located at the small internal surface of hole in ceramic wafer；Earthing pole exit is located at pottery
The peripheral surface of porcelain plate, earthing pole exit uses continual multi-layer structure design, extends to the housing of connector.Tool
Body manufacture is with embodiment 2.
Piezoresistor array profile such as Fig. 1,2 prepared by the present invention, performance such as table 1.
The piezoresistor array performance of table 1
Multifunctional multilayer panel array piezoresistor disclosed by the invention and preparation method thereof, it effectively increases filtering
The ability of the electromagnetism interference of connector, solves interface electromagnetic interference problem；The present invention can realize capacitor and pressure-sensitive electricity
The double effectses of device are hindered, product of the invention has larger capacitance, realizes the function of capacitor under low pressure, high in voltage
In after certain critical value, the function with very strong piezoresistor；The present invention can provide perfect transient overvoltage protection work(
Energy and EMI filtering solutions, and there is lightweight, small volume, high mechanical strength, resistance to punching compared with other transient protective devices
Hit the advantage strong with vibration resistance, it is ensured that the reliability of filter connector.
The preferred embodiments of the present invention are these are only, is not intended to limit the invention, for those skilled in the art
For member, the present invention can have various modifications and variations.All any modifications within the spirit and principles in the present invention, made,
Equivalent, improvement etc., should be included within the scope of the present invention.
Claims (10)
1. a kind of Multifunctional multilayer panel array piezoresistor, it is characterised in that including：Resistor body (1)；
The resistor body (1) is the platy structure with multiple telltale holes (8), and it is by multi-layer ceramics diaphragm (2) and interior electricity
Pole is constituted；
The interior electrode includes multiple common grounds pole (3) and signal electrode (4), multiple common ground poles (3) and multiple
The signal electrode (4) is alternately arranged on the stacked direction of the ceramic diaphragm (2), the common ground pole (3) and signal
Electrode (4) partly overlaps in the stacking direction；Each described common ground pole (3) from the peripheral surface of resistor body (1) to
Telltale hole (8) extends and leaves surplus between telltale hole (8), letter of each described signal electrode (4) from resistor body (1)
Surface extends and surplus is left between peripheral surface to the periphery for number hole (8)；
The peripheral surface of the resistor body (1) is provided with the ground connection for coating all common ground pole (3) extensions
Exit (5), telltale hole (8) place is provided with the signal exit (6) for coating all signal electrodes (4) extension；
The upper and lower surface of the resistor body (1) is provided with surface coating layer (7).
2. Multifunctional multilayer panel array piezoresistor as claimed in claim 1, it is characterised in that the resistor body
(1) it is the circular ceramic wafer with multiple telltale holes (8), the axis of the telltale hole (8) is parallel with the axis of ceramic wafer.
3. Multifunctional multilayer panel array piezoresistor as claimed in claim 1, it is characterised in that the ceramic diaphragm
(2) thickness be 50um~200um, the laminated structure that the ceramic diaphragm (2) is made for principal component and accessory ingredient, it is described it is main into
It is divided into SrTiO3, the accessory ingredient include Si compounds, Al compounds, Li compounds, rare-earth element compound in one kind
Or it is various.
4. Multifunctional multilayer panel array piezoresistor as claimed in claim 1, it is characterised in that the common ground pole
(3), the thickness of signal electrode (4) is 0.5um~2.0um, and the common ground pole (3), signal electrode (4) are Ni or Ni conjunctions
The laminated structure that gold is made.
5. Multifunctional multilayer panel array piezoresistor as claimed in claim 1, it is characterised in that the ground connection exit
(5), the thickness of signal exit (6) is 5um~50um, the ground connection exit (5), signal exit (6) they are Cu, Ag,
Added in one or more in Ag-Pd alloys, Au, or one or more in Cu, Ag, Ag-Pd alloy, Au glass and/
Or the cyclic structure that metal oxide is made.
6. Multifunctional multilayer panel array piezoresistor as claimed in claim 1, it is characterised in that the surface coating layer
(7) including glass glaze layer and organic coat layer；
The glass glaze layer is arranged in the upper and lower surface of the resistor body；
The organic coat layer is arranged on the glass glaze layer.
7. the preparation method of a kind of Multifunctional multilayer panel array piezoresistor as any one of claim 1-6,
It is characterised in that it includes：
Step 1, green compact chip is prepared by wet press or the tape casting；
Step 2, plastic removal, sintering are carried out to green compact chip prepare resistor body；
Step 3, preparation ground connection exit, signal exit and surface coating layer on resistor body, complete Multifunctional multilayer
The preparation of panel array piezoresistor.
8. the preparation method of Multifunctional multilayer panel array piezoresistor as claimed in claim 7, it is characterised in that described
Step 1 includes：
During using wet press method, ceramic diaphragm slurry and electrode size are successively printed on substrate, by using mould
Pressing or laser formation method are peeled off after raw bar block is processed into the base substrate with telltale hole with substrate, form green compact chip；
During using casting method, ceramic diaphragm slurry is formed into ceramic diaphragm, after printing electrode size thereon, carry out layer
It is folded；Green compact are carried out into even pressure by the method for isostatic pressed, is then added by by raw bar block using mould punching method or laser formation method
Work into telltale hole base substrate after with matrix stripping, formed green compact chip.
9. the preparation method of Multifunctional multilayer panel array piezoresistor as claimed in claim 7, it is characterised in that in step
In rapid 2：
Plastic removal technique is：Plastic removal is carried out in atmosphere, the programming rate of plastic removal is 2~100 DEG C/h, plastic removal temperature be 180~
400 DEG C, soaking time be 1~200 hour；
Sintering process is：It is sintered in being carried out in reducing atmosphere, the partial pressure of oxygen in reducing atmosphere is 10-7~10-11Atmospheric pressure,
Sintering temperature is 1100 DEG C~1400 DEG C, soaking time is 0.5~8 hour, heating rate is 50~500 DEG C/h, cooling speed
Spend is 50~500 DEG C/h.
10. the preparation method of Multifunctional multilayer panel array piezoresistor as claimed in claim 9, it is characterised in that
Need to make annealing treatment resistor body after the completion of being sintered in reducing atmosphere；
Annealing is 10 in partial pressure of oxygen-4~10-6Carried out in the atmosphere of atmospheric pressure or more, annealing temperature is 800 DEG C~1100
DEG C, annealing soaking time 2~10 hours, cooling velocity be 50 DEG C~500 DEG C/h.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108039604A (en) * | 2017-12-14 | 2018-05-15 | 沈阳兴华航空电器有限责任公司 | Four coaxial filter connectors |
| CN111807827A (en) * | 2020-06-08 | 2020-10-23 | 北京七星飞行电子有限公司 | Plate-type array magnetic core for electric connector and preparation method thereof |
| CN111816443A (en) * | 2020-05-11 | 2020-10-23 | 北京七星飞行电子有限公司 | High-temperature ceramic plate type array capacitor and preparation method thereof |
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| CN103187677A (en) * | 2011-12-31 | 2013-07-03 | 辽宁省轻工科学研究院 | Manufacturing method for zinc oxide base multilayer pressure-sensitive planar array for filtering connector |
| CN103187668A (en) * | 2011-12-31 | 2013-07-03 | 辽宁省轻工科学研究院 | Zinc oxide base multilayer pressure-sensitive planar array for filtering connector |
| CN206363821U (en) * | 2016-12-09 | 2017-07-28 | 北京元六鸿远电子科技股份有限公司 | A kind of Multifunctional multilayer panel array piezoresistor |
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| JPH0714704A (en) * | 1993-01-20 | 1995-01-17 | Murata Mfg Co Ltd | Through-type varistor |
| CN103187677A (en) * | 2011-12-31 | 2013-07-03 | 辽宁省轻工科学研究院 | Manufacturing method for zinc oxide base multilayer pressure-sensitive planar array for filtering connector |
| CN103187668A (en) * | 2011-12-31 | 2013-07-03 | 辽宁省轻工科学研究院 | Zinc oxide base multilayer pressure-sensitive planar array for filtering connector |
| CN206363821U (en) * | 2016-12-09 | 2017-07-28 | 北京元六鸿远电子科技股份有限公司 | A kind of Multifunctional multilayer panel array piezoresistor |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108039604A (en) * | 2017-12-14 | 2018-05-15 | 沈阳兴华航空电器有限责任公司 | Four coaxial filter connectors |
| CN111816443A (en) * | 2020-05-11 | 2020-10-23 | 北京七星飞行电子有限公司 | High-temperature ceramic plate type array capacitor and preparation method thereof |
| CN111807827A (en) * | 2020-06-08 | 2020-10-23 | 北京七星飞行电子有限公司 | Plate-type array magnetic core for electric connector and preparation method thereof |
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