CN106777843B - Decoupling design method for board-level power distribution network based on maximum time domain transient noise - Google Patents
Decoupling design method for board-level power distribution network based on maximum time domain transient noise Download PDFInfo
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Abstract
The invention provides a maximum time domain transient noise-based decoupling design method for a board-level power distribution network, which is used for solving the technical problems of over-design in the existing frequency domain PDN decoupling design and poor operability in the time domain PDN decoupling design, and comprises the following implementation steps: 1. calculating the time domain target impedance of the board-level power supply distribution network; 2. calculating a time domain decoupling time range and a time domain decoupling time point of the board-level power distribution network; 3. calculating the time domain transient impedance of the voltage stabilizer model in the time domain decoupling time range of the board-level power distribution network; 4. selecting a time domain decoupling time point of a board-level power distribution network to be decoupled; 5. and selecting a decoupling capacitor of the board-level power distribution network. The invention can simplify the decoupling network, improve the operability and can be used for inhibiting the power supply noise in the design of a high-speed circuit board.
Description
Technical Field
the invention belongs to the technical field of electronic circuits, relates to a decoupling design method for a board-level power distribution network, in particular to a selection method for decoupling capacitors of the board-level power distribution network based on maximum time domain transient noise, and can be used for suppressing power noise in high-speed circuit board design.
Background
the Power Distribution Network (PDN) is a current path through which the output current of the voltage regulator flows into the chip Power pin, and a high-impedance PDN design introduces large voltage fluctuation to form Power noise, which affects the stability of the circuit and even causes the circuit to work abnormally. The reasonable decoupling design of the power distribution network can effectively inhibit power supply noise and ensure that power supply ripple noise meets noise tolerance, so the research on the decoupling design of the power distribution network becomes an important research field. The power distribution network comprises a chip-level power distribution network, a packaging-level power distribution network and a board-level power distribution network, and in view of the fact that decoupling designs of the chip-level power distribution network and the packaging-level power distribution network are mostly integrated in the high-speed chip, a hardware engineer only needs to research the decoupling design of the board-level power distribution network.
At present, researches on PDN decoupling design mainly focus on a frequency domain, a frequency domain target impedance is taken as a decoupling standard, a decoupling capacitor is added to enable the PDN frequency domain impedance to be smaller than the target impedance, the key of the process lies in determination of the type and the number of the decoupling capacitor, however, the frequency domain PDN decoupling design can cause an over-design problem. For example, in a patent entitled "power distribution network design method based on flying capacitor selection algorithm" with publication No. CN 102419790B, the first xiuqin, lugwei et al discloses a method for selecting a decoupling capacitor by using a self-resonant frequency of a capacitor, which first finds a first frequency point that does not satisfy a frequency domain target impedance, selects a capacitor having a self-resonant frequency closest to the frequency point as a decoupling capacitor, and repeats the above operations until the frequency domain impedances of all the frequency points are less than the target impedance in the entire decoupling frequency range. By the method, the decoupling network can be rapidly configured to enable the power noise to meet the requirements, however, the method does not consider the influence of the quality factor of the capacitor and the selection of the decoupling frequency point on the configuration of the decoupling capacitor network, so that the number of the selected decoupling capacitors is large, and the over-design is serious. In order to overcome the above disadvantages, in a patent application with an authorization publication number of CN 104112048B entitled "method for selecting decoupling capacitors for power distribution network based on maximum anti-resonance point", liu yang, original jade chapter, etc., a method for selecting decoupling capacitors by using the maximum anti-resonance point and quality factor is disclosed. The method further reduces the number of decoupling capacitors and alleviates over-design, however, the frequency domain decoupling design obtains the target impedance on the premise of assuming that the worst current occurs at any frequency point of the concerned frequency band, the components of the actual current at different frequency points are different, and the current component at each frequency point cannot reach the worst current, so that the PDN decoupling design by taking the target impedance obtained by the method as the reference inevitably causes over-design problems.
In order to overcome the defects in frequency Domain Design, Mushui Zhan, Hongzhou Tan and the like propose a Power Distribution Network decoupling Design Method based on Time Domain Transient Impedance in a published 'New Power Distribution Network Design Method for Digital Systems Using Time-Domain transfer Impedance' (IEEE Transactions on Components Packaging and manufacturing Technology,2013) paper, the Technology defines an ideal capacitor, an ideal inductor and Time Domain Transient Impedance of the ideal resistor under the condition that input is triangular pulse, the PDN Time Domain Transient Impedance is smaller than target Impedance by adding a decoupling capacitor, and a decoupling scheme with less capacitance decoupling compared with that required by a traditional frequency Domain target Impedance Method is obtained under the condition of meeting the same Power noise. However, the decoupling time range is not limited, the selection standard of the decoupling capacitors and the calculation method of the number of various decoupling capacitors are not given, so that a designer needs to determine the decoupling time range and select the decoupling capacitors according to experience to determine the number of capacitors, and the actual operability is not strong.
In summary, the existing frequency domain PDN decoupling design method has an over-design problem, while the existing time domain PDN decoupling design method has a problem of poor operability.
Disclosure of Invention
The invention aims to provide a decoupling design method of a board-level power distribution network based on maximum time domain transient noise aiming at the defects in the prior art, which is used for solving the technical problems of over design in the existing frequency domain PDN decoupling design and poor operability in the time domain PDN decoupling design.
In order to achieve the purpose, the technical scheme adopted by the invention comprises the following steps:
(1) Calculating time domain target impedance Z of board level power distribution networktime_tarThe method comprises the following concrete steps:
1a) Establishing a decoupling capacitor model in which an ideal capacitor C, an ideal inductor L and an ideal resistor R are connected in series;
1b) Inputting rising edge of T to decoupling capacitor modelrAmplitude of IaveThe plate-level step current I (t),Wherein h isn(t) is a rising edge of 2n-1TrAmplitude of IaveN is the number of the triangular pulse current, t is the action time of the plate-level step current I (t), and the range is [0,2 ]n-1Tr]；
1c) calculating the time domain transient impedance Z of the decoupling capacitor model of the input plate-level step current I (t)cap(t) and using the transient impedance Z in the time domaincap(t) calculating the voltage noise V of the decoupling capacitance model into which the plate-level step current I (t) has been inputcap(t)，Vcap(t)＝Zcap(t)×I(t)；
1d) time range of action on plate-level step current I (t) [0,2 ]n-1Tr]Decomposing to obtain n sub-intervals [0, Tr],(Tr,2Tr],...,(2n-2Tr,2n-1Tr]and decoupling the voltage noise V of the capacitance modelcap(t) maximum value V in each subintervalcap(Tr),Vcap(2Tr),...,Vcap(2n-1Tr) Defining the maximum time domain transient noise of a decoupling capacitor model corresponding to each subinterval;
1e) The maximum time domain transient noise of the decoupling capacitor model corresponding to each subinterval is smaller than the noise margin V of the given board-level power supply distribution networkrippleThen, the maximum time domain transient noises and the given noise margin V of the board-level power distribution network are utilizedrippleDeriving a time-domain target impedance for a board-level power distribution network
(2) Calculating a time domain decoupling time range and a time domain decoupling time point of a board-level power distribution network, and the method comprises the following steps:
2a) Establishing an ideal voltage source VddEquivalent inductance LvrmAnd equivalent resistance RvrmA series connected model of voltage regulators;
2b) The rising edge of the input of the voltage stabilizer model is TrAmplitude of IaveThe plate-level step current I (t),wherein h isn(t) is a rising edge of 2n-1TrAmplitude of IaveN is the number of the triangular pulse current, t is the action time of the plate-level step current I (t), and the range is [0,2 ]n-1Tr]；
2c) voltage stabilizer model equivalent inductance L for calculating inputted board-level step current I (t)vrmTime domain transient impedance ZvrmL(t) and using the transient impedance Z in the time domainvrmL(t) calculating the equivalent inductance L of the voltage stabilizer modelvrmVoltage noise V ofvrmL(t)，VvrmL(t)＝ZvrmL(t)×I(t)；
2d) Time range of action on plate-level step current I (t) [0,2 ]n-1Tr]decomposing to obtain n sub-intervals [0, Tr],(Tr,2Tr],...,(2n-2Tr,2n-1Tr]the voltage stabilizer model is equivalent to the inductance LvrmVoltage noise V ofvrmL(t) maximum value V in each subintervalvrmL(Tr),VvrmL(2Tr),...,VvrmL(2n-1Tr) Defined as the equivalent inductance L of the voltage stabilizer model corresponding to each subintervalvrmAnd defining the time point of the maximum time domain transient noise as a time domain decoupling time point;
2e) Equivalent inductance L of voltage stabilizer model corresponding to each subintervalvrmare less than the noise margin V of the given board-level power distribution networkrippleAnd then the maximum time domain transient noises and the noise margin V of the given board-level power supply distribution network are utilizedripplededucing the decoupling cut-off time Troff，Obtaining the time domain decoupling time range of the board-level power distribution network as Tr,Troff]；
(3) Calculating the voltage stabilizer according to the model of the voltage stabilizer established in the step 2a)time domain decoupling time range [ T ] of model in board-level power distribution networkr,Troff]Internal time domain transient impedance Zvrm(t)；
(4) selecting a time domain decoupling time point of a power distribution network of a stage to be decoupled: selecting the time-domain transient impedance Z of the regulator model at all time-domain decoupling points in timevrm(t) is greater than the time domain target impedance Z of the board-level power distribution networktime_tarThe time domain decoupling time point of (2) is used as a time domain decoupling time point of a board-level power distribution network to be decoupled;
(5) selecting a decoupling capacitor of a board-level power distribution network, and realizing the steps as follows:
5a) calculating time domain transient impedances of all capacitors in a given capacitor bank at the minimum time domain decoupling time point in the time domain decoupling time points of the board-level power distribution network to be decoupled to obtain the time domain transient impedances of all capacitors in the given capacitor bank at the minimum time domain decoupling time points;
5b) Selecting a capacitor corresponding to the minimum time domain transient impedance from the time domain transient impedances at the minimum time domain decoupling time point of each capacitor as an alternative decoupling capacitor;
5c) Judging the number of the selected alternative decoupling capacitors: if one optional decoupling capacitor is selected, taking the optional decoupling capacitor as a decoupling capacitor, and executing the step 5 d); if a plurality of selected alternative decoupling capacitors are available, selecting a capacitor with a gentle time domain transient impedance curve from the alternative decoupling capacitors as a decoupling capacitor;
5d) Calculating the number N of decoupling capacitors needed at the point of time of minimum time domain decouplingC；
5e) Repeatedly executing the steps 5a) to 5d) to other board-level power distribution network time domain decoupling time points to be decoupled except the minimum time domain decoupling time point to obtain decoupling capacitors and the number N of the decoupling capacitors needed at the other board-level power distribution network time domain decoupling time points to be decoupledC；
5f) All decoupling capacitors are connected in parallel, and the decoupling design of the board-level power distribution network is realized.
Compared with the prior art, the invention has the following advantages:
Firstly, the time domain target impedance is calculated on the premise that the actual current is input into the board-level power distribution network, and the decoupling design is carried out on the board-level power distribution network by taking the calculated time domain target impedance as a reference, so that the number of decoupling capacitors is reduced, and compared with the existing frequency domain decoupling design method, the decoupling network is effectively simplified.
Secondly, the time domain decoupling time range and the time domain decoupling time point of the board-level power distribution network are calculated, and the detailed steps of decoupling capacitor selection and the decoupling capacitor quantity calculation method are provided, so that the requirement on the quality of a circuit designer is reduced, and the operability is enhanced.
Drawings
FIG. 1 is a flow chart of an implementation of the present invention;
FIG. 2 is a voltage simulation diagram of a board-level power distribution network obtained by the method of the present invention.
Detailed Description
The invention is described in further detail below with reference to the following figures and examples:
Referring to fig. 1, a decoupling design method for a board-level power distribution network based on maximum time domain transient noise includes the following steps:
Step 1, calculating time domain target impedance Z of board-level power distribution networktime_tarThe method comprises the following concrete steps:
step 1a) establishing a decoupling capacitor model with an ideal capacitor C, an ideal inductor L and an ideal resistor R connected in series;
step 1b) inputting the rising edge of decoupling capacitor model as TrAmplitude of IaveThe plate-level step current I (t),Wherein h isn(t) is a rising edge of 2n-1TrAmplitude of IaveN is the number of the triangular pulse current, t is the action time of the plate-level step current I (t), and the range is [0,2 ]n-1Tr]。
In general, the switching current of a chip can be approximated byPeriodic triangular wave, and the rise time of plate-level current is T through the decoupling effect of chip-level capacitor and packaging-level capacitorrThe step current I (t) can be approximately synthesized by a series of triangular pulse currents, and I (t) can be expressed as
Where u (t) is a unit step signal.
Step 1c) calculating the time domain transient impedance Z of the decoupling capacitor model of the input plate-level step current I (t)cap(t) and using the transient impedance Z in the time domaincap(t) calculating the voltage noise V of the decoupling capacitance model into which the plate-level step current I (t) has been inputcap(t)，Vcap(t)＝Zcap(t)×I(t)；
Time domain transient impedance Z of decoupling capacitor modelcapThe expression of (t) is:
Voltage noise V of decoupling capacitor model inputted with plate-level step current I (t)capThe expression of (t) is:
step 1d) acting time range [0,2 ] on board step current I (t)n-1Tr]Decomposing to obtain n sub-intervals [0, Tr],(Tr,2Tr],...,(2n-2Tr,2n-1Tr]And decoupling the voltage noise V of the capacitance modelcap(t) maximum value V in each subintervalcap(Tr),Vcap(2Tr),...,Vcap(2n-1Tr) And defining the maximum time domain transient noise of the decoupling capacitor model corresponding to each subinterval.
When inputting decoupling capacitance model hn(t) voltage of decoupling capacitor model at triangular pulse currentNoise Vcapn(t) the expression is:
if the interval [0,2 ]n-1Tr]Decomposition into [0, Tr]...(2n-2Tr,2n-1Tr]Sub-interval respective investigation of voltage noise Vcapn(t), re-writeable:
As can be seen from the above formula, within each subinterval, Vcapn(t) each monotonically increases as time t increases, and reaches a maximum at the end of time.
according to the linear superposition principle, when the input current of the capacitance model is I (t), the voltage noise expression of the decoupling capacitance model is as follows:
Vcap(t) also satisfying the monotonic increase with time t in each subinterval, and the maximum at the end of time in each subinterval, and decoupling the voltage noise V of the capacitive modelcap(t) maximum value V in each subintervalcap(Tr)...Vcap(2n-1Tr) And defining the maximum time domain transient noise of the decoupling capacitor model corresponding to each subinterval.
step 1e) making the maximum time domain transient noise of the decoupling capacitor model corresponding to each subinterval smaller than the noise tolerance V of the given board-level power distribution networkrippleThen, the maximum time domain transient noises and the given noise margin V of the board-level power distribution network are utilizedripplederiving a time-domain target impedance Z for a board-level power distribution networktime_tar,
to ensure that voltage noise is less than the noise margin V of board level power distribution networkrippleonly ensuring that the maximum time domain transient noise is less than the noise margin V of the board-level power distribution networkrippleTherefore, as long as t is guaranteed to be 2n-1TrVoltage at time (n-1, 2,3 …) is less than VrippleThe design requirements of the board-level PDN can be met, i.e.
simple and available
Step 2, calculating a time domain decoupling time range and a time domain decoupling time point of the board-level power distribution network, and the implementation steps are as follows:
Step 2a) establishing an ideal voltage source VddEquivalent inductance LvrmAnd equivalent resistance RvrmA series connected model of voltage regulators;
Step 2b) inputting the rising edge of the model of the voltage stabilizer to be TrAmplitude of IaveThe plate-level step current I (t),Wherein h isn(t) is a rising edge of 2n-1TrAmplitude of IaveN is the number of the triangular pulse current, t is the action time of the plate-level step current I (t), and the range is [0,2 ]n-1Tr]；
Step 2c) calculating the equivalent inductance L of the voltage stabilizer model with the input board-level step current I (t)vrmTime domain transient impedance ZvrmL(t) and using the transient impedance Z in the time domainvrmL(t) calculating the equivalent inductance L of the voltage stabilizer modelvrmvoltage noise V ofvrmL(t)，VvrmL(t)＝ZvrmL(t)×I(t)；
According to the fact that the plate-level step current I (t) is formed by a series of triangular pulse currents hn(t) in the synthesis, theoretically, the influence of all triangular pulse currents on power supply noise needs to be considered, but actually, when the rising time of the triangular pulse currents is larger than a certain threshold, even if no decoupling capacitor is added, the voltage stabilizer can ensure that the voltage noise of the board-level power supply distribution network meets the requirement.
For a voltage regulator model, the inductance is the main cause of voltage fluctuation, so that only the time-domain transient impedance influence of the equivalent inductance is considered when calculating voltage noise of the voltage regulator. Voltage stabilizer model equivalent inductance LvrmTime domain transient impedance ZvrmLThe expression of (t) is:
Calculating equivalent inductance L of voltage stabilizer modelvrmVoltage noise V ofvrmLThe expression of (t) is:
Step 2d) acting time range [0,2 ] on board step current I (t)n-1Tr]Decomposing to obtain n sub-intervals [0, Tr],(Tr,2Tr],...,(2n-2Tr,2n-1Tr]The voltage stabilizer model is equivalent to the inductance LvrmVoltage noise V ofvrmL(t) maximum value V in each subintervalvrmL(Tr),VvrmL(2Tr),...,VvrmL(2n-1Tr) Defined as the equivalent inductance L of the voltage stabilizer model corresponding to each subintervalvrmAnd defining the time point of the maximum time domain transient noise as a time domain decoupling time point;
when the input current form of the voltage stabilizer model is hn(t) voltage noise V of the equivalent inductance of the regulator model at the time of the triangular pulse currentvrmLn(t) the expression is:
If the interval [0,2 ]n-1Tr]Decomposition into [0, Tr]...(2n-2Tr,2n-1Tr]Sub-interval respective investigation of voltage noise Vcapn(t), can write again
as can be seen from the above formula, within each subinterval, VvrmLn(t) does not vary with t.
according to the linear superposition principle, when the input current to the voltage regulator model is I (t), the voltage noise expression of the voltage regulator model is as follows:
VvrmL(t) also satisfies the condition that the voltage does not change with t in each subinterval, and for the convenience of research, the voltage noise V of the equivalent inductance of the voltage stabilizer model is considered to be maximum at the time end point of each subinterval and is converted into the voltage noise V of the equivalent inductance of the voltage stabilizer modelvrmL(t) maximum value V in each subintervalvrmL(Tr)...VvrmL(2n-1Tr) The maximum time domain transient noise of the voltage stabilizer model corresponding to each subinterval is defined.
step 2e) making the equivalent inductance L of the voltage stabilizer model corresponding to each subintervalvrmare less than the noise margin V of the given board-level power distribution networkrippleand then the maximum time domain transient noises and the noise margin V of the given board-level power supply distribution network are utilizedrippleDeducing the decoupling cut-off time Troff，Obtaining the time domain decoupling time range of the board-level power distribution network as Tr,Troff]；
To ensure that voltage noise is less than the noise margin V of board level power distribution networkrippleOnly need to ensureVerifying that the maximum time domain transient noise is less than the noise margin V of the board-level power distribution networkrippleTherefore, as long as t is guaranteed to be 2n-1TrVoltage at time (n-1, 2,3 …) is less than Vripplethe design requirements of the board-level PDN can be met, i.e.
Simple and available
as can be seen from the above equation, for rise times greater than the threshold TroffThe influence of the triangular pulse current on the voltage noise is negligible. Therefore, only [ T ] needs to be consideredr,Troff]triangular pulse current in time range.
Step 3, calculating the time domain decoupling time range [ T ] of the voltage stabilizer model in the board-level power distribution network according to the voltage stabilizer model established in the step 2a)r,Troff]Internal time domain transient impedance Zvrm(t)；
Time domain transient impedance Z of voltage stabilizer modelvrmThe expression of (t) is:
Step 4, selecting a time domain decoupling time point of a board-level power distribution network to be decoupled: selecting the time-domain transient impedance Z of the regulator model at all time-domain decoupling points in timevrm(t) is greater than the time domain target impedance Z of the board-level power distribution networktime_tarThe time domain decoupling time point of (2) is used as a time domain decoupling time point of a board-level power distribution network to be decoupled;
And 5, selecting a decoupling capacitor of the board-level power distribution network, and realizing the following steps:
Step 5a) calculating the time domain transient impedance of all capacitors in a given capacitor bank at the minimum time domain decoupling time point in the time domain decoupling time points of the board-level power distribution network to be decoupled to obtain the time domain transient impedance of each capacitor in the given capacitor bank at the minimum time domain decoupling time point;
Step 5b) selecting a capacitor corresponding to the minimum time domain transient impedance from the time domain transient impedances at the minimum time domain decoupling time point of each capacitor as an alternative decoupling capacitor;
Step 5c) judging the number of the selected alternative decoupling capacitors: if one optional decoupling capacitor is selected, taking the optional decoupling capacitor as a decoupling capacitor, and executing the step 5 d); if a plurality of selected alternative decoupling capacitors are available, selecting a capacitor with a gentle time domain transient impedance curve from the alternative decoupling capacitors as a decoupling capacitor;
Step 5d) calculating the number N of decoupling capacitors required at the minimum time-domain decoupling time pointC；
number N of decoupling capacitorsCThe expression of (a) is:
Wherein Z isminRepresenting the time-domain transient impedance value, Z, of the decoupling capacitor at the point of time of minimum time-domain decouplingtime_tarRepresenting the target impedance in the time domain, ceil [ ·]Represents the smallest integer that takes on a value greater than or equal to the value in parentheses.
Step 5e) repeatedly executing the steps 5a) to 5d) to other board-level power distribution network time domain decoupling time points except the minimum time domain decoupling time point to obtain decoupling capacitors and the quantity N of the decoupling capacitors needed by the other board-level power distribution network time domain decoupling time points to be decoupledC；
and step 5f), all decoupling capacitors are connected in parallel, so that the decoupling design of the board-level power distribution network is realized.
The technical effects of the invention are described in detail in combination with simulation experiments as follows:
1. Simulation conditions are as follows:
The supply voltage V of the inventionddSetting the voltage noise margin V with the core voltage 1.2V typical of current high speed microprocessorsripple0.06V, plate levelThe amplitude of the jump current I (t) is 10A, the rise time is 50ns, and the equivalent inductance and the equivalent resistance of the voltage stabilizer model are respectively set to be a typical value Lvrm30nH and Rvrm1m Ω. The library of capacitors used for the decoupling design in this experiment is shown in table 1.
TABLE 1
2. Emulated content
The method and the existing frequency domain decoupling design method are simulated through matlab software, and the type and the number of decoupling capacitors selected in the simulation are shown in table 2; the voltage of the board-level power distribution network added with the decoupling capacitor selected by the invention is simulated by ADS software, and the result is shown in FIG. 2.
3. And (3) simulation result analysis:
Referring to fig. 2, the voltage simulation result of the board-level power distribution network after adding the decoupling capacitor of the invention, the abscissa is time, the ordinate is the output voltage of the board-level power distribution network, and it can be seen that the maximum voltage noise of the board-level power distribution network after adding the decoupling capacitor is 0.016V, which is less than the voltage noise tolerance 0.06V, which proves that the invention can correctly select the decoupling capacitor, design the board-level PDN decoupling network satisfying the voltage noise tolerance, and solve the problem of poor operability in the existing time domain decoupling design method.
Table 2 shows the comparison between the types and the numbers of decoupling capacitors selected by the present invention and the existing frequency domain decoupling design method, which shows that the types of decoupling capacitors used in the present invention are 2, and the number of capacitors is 15; the existing frequency domain decoupling design method uses 11 types of decoupling capacitors, the number of the capacitors is 122, and the comparison shows that the types and the number of the decoupling capacitors used in the method are fewer, so that the over-design problem of the existing frequency domain decoupling design method is solved.
TABLE 2
As can be seen from fig. 2 and table 2, the present invention reduces the number of decoupling capacitors and simplifies the decoupling network compared to the existing frequency domain PDN decoupling design method, while improving the operability compared to the existing time domain PDN decoupling design method.
Claims (4)
1. A decoupling design method for a board-level power distribution network based on maximum time domain transient noise is characterized by comprising the following steps:
(1) calculating time domain target impedance Z of board level power distribution networktime_tarThe method comprises the following concrete steps:
1a) Establishing a decoupling capacitor model in which an ideal capacitor C, an ideal inductor L and an ideal resistor R are connected in series;
1b) Inputting rising edge of T to decoupling capacitor modelrAmplitude of Iavethe plate-level step current I (t),Wherein h isn(t) is a rising edge of 2n-1TrAmplitude of IaveN is the number of the triangular pulse current, t is the action time of the plate-level step current I (t), and the range is [0,2 ]n-1Tr]；
1c) calculating the time domain transient impedance Z of the decoupling capacitor model of the input plate-level step current I (t)cap(t) and using the transient impedance Z in the time domaincap(t) calculating the voltage noise V of the decoupling capacitance model into which the plate-level step current I (t) has been inputcap(t)，Vcap(t)＝Zcap(t)×I(t)；
1d) time range of action on plate-level step current I (t) [0,2 ]n-1Tr]Decomposing to obtain n sub-intervals [0, Tr],(Tr,2Tr],...,(2n-2Tr,2n-1Tr]And decoupling the voltage noise V of the capacitance modelcap(t) maximum value V in each subintervalcap(Tr),Vcap(2Tr),...,Vcap(2n-1Tr) Defined as the corresponding decoupling capacitance mode of each subintervalMaximum time domain transient noise of type;
1e) The maximum time domain transient noise of the decoupling capacitor model corresponding to each subinterval is smaller than the noise margin V of the given board-level power supply distribution networkrippleThen, the maximum time domain transient noises and the given noise margin V of the board-level power distribution network are utilizedripplederiving a time-domain target impedance Z for a board-level power distribution networktime_tar,
(2) Calculating a time domain decoupling time range and a time domain decoupling time point of a board-level power distribution network, and the method comprises the following steps:
2a) establishing an ideal voltage source VddEquivalent inductance LvrmAnd equivalent resistance RvrmA series connected model of voltage regulators;
2b) The rising edge of the input of the voltage stabilizer model is TrAmplitude of IaveThe plate-level step current I (t),Wherein h isn(t) is a rising edge of 2n-1TrAmplitude of IaveN is the number of the triangular pulse current, t is the action time of the plate-level step current I (t), and the range is [0,2 ]n-1Tr]；
2c) Voltage stabilizer model equivalent inductance L for calculating inputted board-level step current I (t)vrmTime domain transient impedance ZvrmL(t) and using the transient impedance Z in the time domainvrmL(t) calculating the equivalent inductance L of the voltage stabilizer modelvrmVoltage noise V ofvrmL(t)，VvrmL(t)＝ZvrmL(t)×I(t)；
2d) Time range of action on plate-level step current I (t) [0,2 ]n-1Tr]decomposing to obtain n sub-intervals [0, Tr],(Tr,2Tr],...,(2n-2Tr,2n-1Tr]The voltage stabilizer model is equivalent to the inductance Lvrmvoltage noise V ofvrmL(t) maximum value V in each subintervalvrmL(Tr),VvrmL(2Tr),...,VvrmL(2n-1Tr) Defined as the equivalent inductance L of the voltage stabilizer model corresponding to each subintervalvrmand defining the time point of the maximum time domain transient noise as a time domain decoupling time point;
2e) Equivalent inductance L of voltage stabilizer model corresponding to each subintervalvrmAre less than the noise margin V of the given board-level power distribution networkrippleAnd then the maximum time domain transient noises and the noise margin V of the given board-level power supply distribution network are utilizedrippleDeducing the decoupling cut-off time Troff，Obtaining the time domain decoupling time range of the board-level power distribution network as Tr,Troff]；
(3) Calculating the time domain decoupling time range [ T ] of the voltage stabilizer model in the board-level power distribution network according to the voltage stabilizer model established in the step 2a)r,Troff]Internal time domain transient impedance Zvrm(t)；
(4) Selecting a time domain decoupling time point of a board-level power distribution network to be decoupled: selecting the time-domain transient impedance Z of the regulator model at all time-domain decoupling points in timevrm(t) is greater than the time domain target impedance Z of the board-level power distribution networktime_tarThe time domain decoupling time point of (2) is used as a time domain decoupling time point of a board-level power distribution network to be decoupled;
(5) selecting a decoupling capacitor of a board-level power distribution network, and realizing the steps as follows:
5a) calculating time domain transient impedances of all capacitors in a given capacitor bank at the minimum time domain decoupling time point in the time domain decoupling time points of the board-level power distribution network to be decoupled to obtain the time domain transient impedances of all capacitors in the given capacitor bank at the minimum time domain decoupling time points;
5b) Selecting a capacitor corresponding to the minimum time domain transient impedance from the time domain transient impedances at the minimum time domain decoupling time point of each capacitor as an alternative decoupling capacitor;
5c) Judging the number of the selected alternative decoupling capacitors: if one optional decoupling capacitor is selected, taking the optional decoupling capacitor as a decoupling capacitor, and executing the step 5 d); if a plurality of selected alternative decoupling capacitors are available, selecting a capacitor with a gentle time domain transient impedance curve from the alternative decoupling capacitors as a decoupling capacitor;
5d) Calculating the number N of decoupling capacitors needed at the point of time of minimum time domain decouplingC；
5e) Repeatedly executing the steps 5a) to 5d) to other board-level power distribution network time domain decoupling time points to be decoupled except the minimum time domain decoupling time point to obtain decoupling capacitors and the number N of the decoupling capacitors needed at the other board-level power distribution network time domain decoupling time points to be decoupledC；
5f) All decoupling capacitors are connected in parallel, and the decoupling design of the board-level power distribution network is realized.
2. The maximum time domain transient noise based decoupling design method for board-level power distribution network of claim 1, wherein the time domain transient impedance Z of the decoupling capacitor model in step 1c)cap(t) the computational expression of which is:
Wherein, C represents the capacitance of the decoupling capacitor model, L represents the inductance of the decoupling capacitor model, and R represents the resistance of the decoupling capacitor model.
3. The maximum time domain transient noise based decoupling design method for board-level power distribution network of claim 1, wherein the time domain transient impedance Z of the equivalent inductance of the voltage stabilizer model in the step 2c) isvrmL(t) the computational expression of which is:
Wherein L isvrmRepresenting the equivalent inductance of the regulator model.
4. The maximum time domain transient noise based decoupling design method for board level power distribution network of claim 1, wherein the time domain transient impedance Z in step (3)vrm(t) the computational expression of which is:
Wherein L isvrmEquivalent inductance, R, representing a model of a voltage regulatorvrmRepresenting the equivalent resistance of the regulator model.
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