CN106775596B - A kind of infrared image linear interpolation expansion hardware processing method - Google Patents

A kind of infrared image linear interpolation expansion hardware processing method Download PDF

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CN106775596B
CN106775596B CN201611045932.3A CN201611045932A CN106775596B CN 106775596 B CN106775596 B CN 106775596B CN 201611045932 A CN201611045932 A CN 201611045932A CN 106775596 B CN106775596 B CN 106775596B
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read
fifo
width
address
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CN106775596A (en
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赵雄波
刘亮亮
吴松龄
范仁浩
严志刚
蒋彭龙
田甜
宋铂
宋一铂
吴平
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China Academy of Launch Vehicle Technology CALT
Beijing Aerospace Automatic Control Research Institute
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Beijing Aerospace Automatic Control Research Institute
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining

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Abstract

The invention discloses a kind of infrared image linear interpolation expand hardware processing method, firstly, establish expansion after between image and original image pixels point between coordinate mapping relations；Then, it is calculated using coordinate, gray scale is read, expansion calculates, gray scale stores four level production lines and realizes algorithm design.Location method is quickly wherein taken using no loss of significance in design process of hardware, and the methods of gray scale of fifo controller realizing, which is quickly read, guarantees assembly line efficient operation, greatly improves algorithm arithmetic speed, reduces hardware resource cost, improve computational accuracy.The present invention is realized at Xilinx virtex5-XC5VFX100T, operates in 100M.To original image 160*128,1.2 times, i.e. 192*153 are expanded, then intercepts original template Fig. 1 .1 times size, that is, 176*140 image in expanding image, completing algorithm operation only needs 0.25ms.

Description

A kind of infrared image linear interpolation expansion hardware processing method
Technical field
The present invention relates to a kind of infrared image linear interpolations to expand hardware processing method, belongs to tailor-made algorithm hardware circuit and sets Meter field.
Background technique
Extensive application, image procossing are had begun in space flight model of new generation based on the information processing technology of images match Real-time directly affect guidance precision.Software realization image processing algorithm was used based on general processor (such as DSP) in the past It is increasingly difficult to meet the requirement of real-time of space flight model.Currently, through coming frequently with the mode for simplifying algorithm sacrifice arithmetic accuracy Reduce algorithm operation time.Realizing that algorithm accelerates by hardware algorithmization is the most effective means for reducing algorithm operation time.
Image procossing is using the matching process based on grayscale information, the high still operation of this method matching precision at present It measures bigger.By to capture, tracking etc. terminal guidances target seeker information process analyze, will wherein consuming time is long, The image algorithm that processing structure is complicated, occupied space is big carries out Hardware Design, and image expansion algorithm is wherein to need to accelerate to locate One of algorithm of reason.
Summary of the invention
Technology of the invention solves the problems, such as: having overcome the deficiencies of the prior art and provide a kind of infrared image linear interpolation Hardware processing method is expanded, by the pipeline design, no loss of significance quickly takes location, gray scale the design such as quickly to read, and greatly mentions High algorithm arithmetic speed, improves computational accuracy, rationally controls hardware resource cost, and in Xilinx virtex5- It is realized under XC5VFX100T, work operates in 100M.
The technical solution of the invention is as follows: a kind of infrared image linear interpolation expansion hardware processing method, this method are adopted With hardware realization, accelerate image expansion processing speed, original image is subjected to the image after expansion amplification is expanded first, it is then right Each pixel p' executes following steps in image after expansion:
(1), coordinate calculate, according to the coordinate p'(m, n in p' upon inflation image coordinate system) it is counter push away the point original image sit Mark the coordinate p (i of system0,j0), to p (i0,j0) coordinate value carry out rounding operation, obtain the upper left that distance p point is nearest in original image Point coordinate (im,jn)；The coordinate origin of image coordinate system is the image upper left corner after expansion after the expansion, and the upper left corner is to the right Image coordinate system horizontal axis X-axis positive direction after expansion, the upper left corner are image coordinate system longitudinal axis Y positive direction after expansion, the original downwards The coordinate origin of figure coordinate system is the upper left corner of original image, and the upper left corner is original image coordinate system horizontal axis X-axis positive direction to the right, and upper left is angular It is down original image coordinate system longitudinal axis Y-axis positive direction.
(2), gray scale read, from original image memory obtain original image in p (i0,j0) point around four points gray value: f (im,jn)、f(im+1,jn)、f(im,jn+1)、f(im+1,jn+ 1) continuous two groups of gradation datas, will be stored and be stored in two respectively In internal FIFO, the f (x, y) is the gradation data in original image at coordinate (x, y)；
(3), expansion calculates, and reads out p (i from two FIFO0,j0) point around four points gray value: f (im,jn)、f (im+1,jn)、f(im,jn+1)、f(im+1,jn+ 1) p'(i, j in the image after expansion, are calculated using bilinear interpolation algorithm) Gray value of image；
(4), gray scale stores, and the gray value of image that step (3) is calculated is saved in the corresponding storage of image after expanding In device, update after expansion p'(i, j in image) gray value of image.
The method is realized in FPGA.
The step (1)~step (4) coordinate calculates, gray scale is read, expansion calculates, gray scale storage uses level Four flowing water Line Parallel Implementation.
When the size of original image is width_src × height_src in the step (1), the size of image is after expansion When width_exp × height_exp, according to coordinate p'(m, n in image after expansion) the anti-corresponding position for pushing away this in original image Set p (i0,j0), obtain the nearest top left pixel point coordinate (i of distance p point in original imagem,jn) using the method for iteration recursion are as follows:
Work as m=0, when n=0, enables i0=0, j0=0, enable intermediate variable R0=0, T0=0；
As m >=1, intermediate variable R is calculatedm=Rm-1+ width_src, m ∈ { 1 ..., width_exp-1 }, if Rm< Width_exp, then im=im-1；If Rm>=width_exp, then im=im-1+ 1, Rm=Rm-1-width_exp；
As n >=1, intermediate variable T is calculatedn=Tn-1+ height_src, n ∈ { 1 ..., height_exp-1 }, if Tn< Height_exp, then jn=jn-1；If Tn>=height_exp, then jn=jn-1+ 1, Tn=Tn-1-height_exp。
Original image memory bit wide is 4 times of pixel gray value width, the corresponding address of every four pixel gray values Memory space, storage address are as follows: (ordinate x × original image width width_src+ abscissa y) > > 2, two FIFO's Width is the width of pixel gray value, and depth is more than or equal to 16.
The specific implementation process that gray scale is read are as follows:
In first pipeline cycle of every row, following steps are executed:
(2.1a), gray value f (i is calculatedm,jn) absolute address in memory, it is denoted as row address addrOn；Calculate f (im+1,jn) absolute address in memory, it is denoted as downlink address addrUnder:
addrOn=im×width_src+jm
addrUnder=(im+1)×width_src+jm
(2.2a), by upper row address addrOnWith downlink address addrUnderIt is converted into binary form, and by binary form Upper row address addrOnWith the downlink address addr of binary formUnderIt carries out low two truncations and obtains memory uplink read address addr_readOnWith downlink read address addr_readUnder；
(2.3a), according to uplink read pointer addr_readOnIt extracts continuous 4 gradation datas in memory and is deposited into FIFO_ In 0, uplink read address addr_readOn1, FIFO_0 write address is added to add 4；According to downlink read pointer addr_readUnderExtract storage Continuous 4 gradation datas are deposited into FIFO_1 in device, downlink read address addr_readUnder1, FIFO_1 write address is added to add 4；
(2.4a), work as addrOnLow 2 be 2 ' b11 when, by addr_readOnOne address of recursion backward, obtains new addr_readOn, it is re-execute the steps (2.3a), then, calculates step into next level production line dilatometer；Otherwise, it is directly entered Next level production line dilatometer calculates step；
In the subsequent pipeline period of every row, following steps are executed:
(2.1b), judge with the presence or absence of at least four free space in FIFO_0, if it is present uplink read address addr_ readOnAdd 1, is sequentially stored into from continuous 4 gradation datas are read in memory into FIFO_0；FIFO_0 write address adds 4；It is no Then, it waits；
(2.2b), judge with the presence or absence of at least four free space in FIFO_1, if it is present downlink read address addr_ readUnderAdd 1, continuous 4 gradation datas are read from memory, are sequentially stored into FIFO_1；FIFO_1 write address adds 4；It is no Then, it waits；
The FIFO_0 and FIFO_1 is cyclic buffer, when FIFO_0 and FIFO_1 has expired, circulation storage.
Expand the specific implementation calculated are as follows:
In first pipeline cycle of every row, following steps are executed:
(3.1a), according to row address addr on binary formOnWith binary form downlink address addrUnderIt is low two work For the initial read address in FIFO_0 and FIFO_1；
(3.2a), f (i is taken out read address since FIFO_0m,jn)、f(im,jn+1)；Read address is opened from FIFO_1 Begin to take out f (im+1,jn)、f(im+1,jn+1)；
(3.3a), moved to right after being added four gray values read in step (3.2a) 2 expanded after figure As in p'(i, j) gray value of image:
F ' (m, n)=(f (im,jn)+f(im+1,jn)+f(im,jn+1)+f(im+1,jn+1))>>2；
Within the subsequent pipeline period of every row, following steps are executed:
(3.1b), according in step (2) in coordinate transform calculate as a result, working as Rm< width_exp, i.e. im=im-1, and Tn< Height_exp, i.e. jn=jn-1When, FIFO_0 and FIFO_1 read address is constant；Work as TnWhen >=height_exp, jn=jn-1+ 1, FIFO_0 and FIFO_1 read address adds 1；
(3.2b), f (i is taken out read address since FIFO_0m,jn)、f(im,jn+1)；Read address is opened from FIFO_1 Begin to take out f (im+1,jn)、f(im+1,jn+1)；
(3.3b), moved to right after being added four gray values read in step (3.2b) 2 expanded after figure As in p'(i, j) gray value of image:
F ' (m, n)=(f (im,jn)+f(im+1,jn)+f(im,jn+1)+f(im+1,jn+1))>>2。
Compared with the prior art, the invention has the advantages that:
(1), present invention employs the designs of 4 level production lines, are calculated by efficient parallel and improve arithmetic speed.
(2), present invention employs no losss of significance quickly to take location method, and this method can obtain gray scale with taking location with the monocycle Location, and calculating process only with simple addition and compares operation, no loss of significance.
(3), the quick reading of gray scale is realized present invention employs two internal fifo controllers.Due to each dilatometer It is discontinuous that gray scale address is read needed for calculating, and is used two independent small FIFO and is saved memory read data, and passes through FIFO Read-write Catrol guarantees that the monocycle provides 4 gradation datas and participates in expansion calculating, maintains the efficiency of assembly line.
(4), by analyzing image bilinear interpolation expansion algorithm, algorithm needs first to being originally inputted figure the present invention As carrying out linear interpolation expansion, the sized image of needs is then intercepted between two parties on the image of expansion again.By assembly line, quickly It takes location, gray scale the design such as quickly to read, optimizes Hardware Design, greatly improve algorithm speed.And it entirely designed Dexterously reduce using operation and translation substitution multiplication and division arithmetic is compared in journey and consume resource and loss of significance.
(5), this algorithm is realized at Xilinx virtex5-XC5VFX100T, operates in 100M, it is this under the conditions of to original Beginning image 160*128 expands 1.2 times, i.e. 192*153, then original template Fig. 1 .1 times size, that is, 176* is intercepted in expanding image 140 image, completing algorithm operation only needs 0.25ms.
Detailed description of the invention
Fig. 1 is schematic diagram before and after image expansion of the present invention；
Fig. 2 is bilinear interpolation expansion algorithm gray count schematic diagram；
Fig. 3 is that infrared image linear interpolation of the present invention expands hardware-accelerated general frame；
Fig. 4 is to calculate the method schematic diagram that original image participates in coordinates computed range according to interception size；
Fig. 5 is the pipeline design schematic diagram；
Fig. 6 is image expansion coordinate calculating process schematic diagram；
Fig. 7 is image expansion algorithm FIFO schematic diagram.
Specific embodiment
The content that description in the present invention is not described in detail belongs to the well-known technique of professional and technical personnel in the field.Below A specific embodiment of the invention is further described in detail in conjunction with attached drawing.
Image bilinear interpolation expansion algorithm is most common image expansion algorithm, is used for pretreatment image resolution ratio tune It is whole extremely identical as real-time figure resolution ratio.
Fig. 1 is schematic diagram before and after image expansion, and left figure is original image, and right figure is image after expansion.P ' are image after expansion A pixel in data, position is p'(m, n in image coordinate system after a ' × b ' expansion), p is corresponding points in original image Point, position in original image coordinate system is p (i0,j0).The coordinate origin of image coordinate system is the figure after expansion after the expansion As the upper left corner, the upper left corner is image coordinate system X-axis positive direction after expansion to the right, and the upper left corner is image coordinate system Y after expansion downwards Axis positive direction, the coordinate origin of the original image coordinate system are the upper left corner of original image, and the upper left corner is that original image coordinate system X-axis is square to the right To the upper left corner is original image coordinate system Y-axis positive direction downwards.
The basic principle of bilinear interpolation expansion algorithm are as follows:
According to the coordinate p'(m, n in p' upon inflation image coordinate system) counter this is pushed away in the coordinate p of original image coordinate system (i0,j0).According to p point in Fig. 1 and p ' relationships it is found that enabling r is the coefficient of expansion, then Obtaining the seat of p point After mark, it is clear that the coordinate of p point is not necessarily integer, in order to accurately describe the gray value of p' point, to (i0,j0) carry out rounding fortune It calculates, obtains the nearest upper left point coordinate (i of distance p point in original imagem,jn), (im,jn)、(im,jn+1)、(im+1,jn)、(im+1,jn It+1) is (i0,j0) around four pixel coordinates.If f (x, y) is original image gradation data, f (im,jn)、f(im+1, jn)、f(im,jn+1)、f(im+1,jnIt+1) is p0The gray value of four points around point, as shown in Figure 2.It is calculated using bilinear interpolation Method calculate expansion after image in p'(m, n) gray value of image, then p ' gray values may be expressed as: f ' (m, n)=(f (im,jn)+f(im+1,jn)+f(im,jn+1)+f(im+1,jn+1))/4。
Fig. 3 is that infrared image linear interpolation proposed by the present invention expands hardware-accelerated general frame.Algorithm input has original Picture size: width_src × height_src, width_src are original graph image width, and height_src is original graph image height, Picture size width_exp × height_exp and interception image size width_icpt × height_icpt after expansion, Width_exp is that image is wide after expanding, and height_exp is image height after expansion, and width_icpt is that image is wide after intercepting, Height_icpt is image height after interception.
The position range that interception image exports image image upon inflation can be calculated according to these parameters first, is only needed The pixel within the scope of this is calculated to carry out coordinate conversion and calculate gray value.
Fig. 4 is to calculate the method schematic diagram that original image participates in coordinates computed range according to interception size.As shown in figure 4, Image is exported in image upon inflation and is intercepted from center, intercepts range are as follows:
Matrix wide scope: (width_exp-width_icpt)/2, (width_exp+width_icpt)/2
Matrix high scope: (height_exp-height_icpt)/2, (height_exp+height_icpt)/2
After obtaining output image range, carries out coordinate conversion retrospectively calculate output image expansion calculating and need original image grey Coordinate is spent, the address of gray value in memory is calculated according to original image gray scale coordinate, reads number from memory 1 According to then the expansion of progress gray-level interpolation calculates, write-in memory 2 after the completion of calculating.
To improve data throughout and treatment effeciency, realize that process uses algorithm according to infrared image dilation operation IP kernel Hardware realization accelerates expansion process speed.Firstly, by original image carry out expansion amplification expanded after image, then, line by line according to Secondary to handle pixel p' each in image after expansion, each pixel p' realizes that procedure decomposition is coordinate calculating, gray scale It reads, expansion calculates, gray scale stores four level production lines.As shown in Figure 5.Each operation time in stage is analyzed, is rationally evenly distributed on In each level production line, every level production line task can be completed the monocycle, realize the work of level Four pipeline parallel method.
Specific implementation process introduced below:
1, coordinate calculates
It is to calculate the position of pretreatment image in memory that first order coordinate, which calculates, in four level production lines.Coefficient of expansion r It is wide in pretreatment image for being rounded for width_exp/width_src, i* (1/r)=i* (width_src/width_exp) Degree takes location coordinate, and wherein i is sequentially increased.Hardware divider consuming resource is big, and operation time is long (needing multiple periods).It takes every time Location, which all carries out i* (width_src/width_exp) calculating, will greatly reduce pipeline efficiency；And take every time location according to The cumulative rounding of width_src/width_exp, which will be brought, takes location error, this is because divider bit wide is limited, it is repeatedly cumulative to make At the accumulation of error, it is likely that cause to take location mistake.This algorithm is realized using coordinate comparison method quickly takes location to calculate without loss of significance, Only need simple plus-minus compare operation can, consume that resource is few, and speed is fast, and absolutely not loss of significance.
Coordinate calculates calculating process schematic diagram as shown in fig. 6, needing to obtain the original of interception image gray count needs Whether image grayscale coordinate, next gray scale expansion will determine to take location coordinate right in original image according to coordinate transformation result It moves/moves down.
Image expansion coefficient r be width_exp/width_src (or height_exp/height_src, it is horizontal and vertical Image expansion coefficient can be inconsistent), it is coordinate after expanding that i (1/r), which is rounded,.In turn, image grayscale calculating needs after expansion The original image gray scale coordinate wanted is that i* (1/r) is rounded.
The present invention devises a kind of no loss of significance and quickly takes location method, takes location to calculate and does not use multiplication and division operation, only uses Simple addition and comparison operation, guarantee that the monocycle completes the level production line.
The image expansion Formula of Coordinate System Transformation improved such as front:In this way, expansion after the every row lateral coordinates i of image with Coordinates of original image coordinates i0Mapping relations beDenominator is unanimously in the formula Width_exp, image coordinate is mobile each time after expansion indicates that molecule adds width_src, is compared to molecule denominator Judge whether abscissa moves.
When i=0, molecule initial value is 0, [i0]=0；
When i=1, molecule width_src+0, due to width_src < width_exp, then [i0] it is constant still be 0；
When i=2, molecule width_src+width_src, if width_src+width_src < width_exp, [i0] it is constant still be 0；If width_src+width_src >=width_exp, [i0] plus 1 and molecule subtract width_exp and be It is next time the numerator value of i=3 comparison operation；
……
When i=n, compare the sum of molecule and width_src and width_exp, if the sum of molecule and width_src are less than Width_exp then [i0] constant；If the sum of molecule and width_src are greater than width_exp, [i0] plus 1 and molecule subtract Width_exp is as the numerator value for being next time i=n+1 comparison operation；
Ordinate similarly, the every row longitudinal coordinate j of image and coordinates of original image coordinates j after expansion0Mapping relations beIn the same manner by vertical to compare the judgement of molecule denominator Whether coordinate moves, mapping of the image to original image ordinate after being expanded.
After image is to the mapping of original image abscissa and ordinate after being expanded, it can be obtained to original image address Location is taken, location address=ordinate × width_src+ abscissa is taken.This method does not use divide operations, only simple to add Method and compare operation, therefore there is no loss of significance, may be implemented to take location to the quick of coordinates of original image coordinates.
2, gray scale is read
Treatment effeciency is improved for the reduction processing time, only carries out the dilation operation of final interception image.Dilation operation It reads and needs four gradation datas.If only reading a gradation data every time, each dilation operation is needed to read 4 times, that is, is needed Four clock cycle.This algorithm uses high-order wide memory, and the bus bit wide of memory 1 is 4 times of gray scale bit wide in Fig. 3, this Sample can once read 4 gradation datas.By taking gray scale bit wide 8bit as an example, memory bus bit wide is taken as 32bit.Every four pictures The corresponding storage address of the gray value of vegetarian refreshments.In addition, since four gradation data addresses that expansion calculates needs are discontinuous, In continuous in pairs, two groups of data break width_src.The design uses two depth as 16, and width is gray scale bit wide Inside FIFO (FIFO_0 and FIFO_1).The gray scale deposit FIFO read from memory, expansion calculate from FIFO and read ash Degree completes the FIFO space release after expansion calculates.There are can read from memory automatically when 4 or more free spaces by FIFO Gray scale is taken, as shown in Figure 6.If gray scale bit wide is 8bit, two FIFO sizes are 16*8bit, i.e., a FIFO can store 16 A gradation data.When reading external address, two row data up and down are read by turns, two FIFO are respectively written into.In this way, being stored reading Address needs not move through complicated operation when the data of the every row of device, and sequentially plus 1 can.
In view of the randomness of interception image, need to consider to read the effective of gray scale when reading the data in memory Property.Since image alignment influences, the every row first count gray scale of original image need to consider to deviate significance bit, effectively grey to the first beat of data Degree judgement.It is actually that low two truncations have been carried out to storage address due to taking location address, low two of storage address are just It is the significance bit for reading data.4 gradation datas read when being 2 ' b00 for low two are all effective.When being 2 ' b01 for low two Rear 3 gradation datas read are effective.Rear 2 gradation datas read when being 2 ' b10 for low two are effective.It is 2 ' when low two Last 1 gradation data read when b11 is all effective.When low two are 2 ' b00, when 2 ' b01,2 ' b10, first time gray scale is read 2 periods are needed, assembly line works normally later.When being 2 ' b11 for low two, first time gray scale, which is read, needs 4 periods.Often 4 FIFO gray scale memory spaces are written in secondary FIFO write operation, and FIFO read operation reads 2 data fifos, sentence according to taking location to deviate It is disconnected whether to discharge FIFO gray scale memory space.By FIFO Read-write Catrol, when there are 4 for data completion calculating release resource in FIFO It is a or above can with gray scale memory space reading memory data be written FIFO, iterative cycles.It is read more since FIFO writes than FIFO Fastly, it is ensured that each clk of subsequent pipeline can read data from FIFO and carry out expansion calculating, guarantee assembly line smoothly into Row.
Specific implementation process are as follows:
In first pipeline cycle of every row, following steps are executed:
(2.1a), gray value f (i is calculatedm,jn) absolute address in memory, it is denoted as row address addrOn；Calculate f (im+1,jn) absolute address in memory, it is denoted as downlink address addrUnder:
addrOn=im×width_src+jm
addrUnder=(im+1)×width_src+jm
(2.2a), by upper row address addrOnWith downlink address addrUnderIt is converted into binary form, and by binary form Upper row address addrOnWith the downlink address addr of binary formUnderIt carries out low two truncations and obtains memory uplink read address addr_readOnWith downlink read address addr_readUnder；
(2.3a), according to uplink read pointer addr_readOnExtract a data (continuous 4 gradation datas) in memory It is deposited into FIFO_0, uplink read address addr_readOn1, FIFO_0 write address is added to add 4；According to downlink read pointer addr_ readUnderA data (continuous 4 gradation datas) in memory is extracted to be deposited into FIFO_1, downlink read address addr_readUnder 1, FIFO_1 write address is added to add 4；
(2.4a), work as addrOnLow 2 be 2 ' b11 when, by addr_readOnOne address of recursion backward, obtains new addr_readOn, it is re-execute the steps (2.3a), then, calculates step into next level production line dilatometer；Otherwise, it is directly entered Next level production line dilatometer calculates step；
That is, working as the upper row address addr of binary formOnLow 2, it is complete when 2 ' b00,2 ' b01 or 2 ' b10 Next level production line dilatometer can be started at above-mentioned steps (2.3a) to calculate；Work as addrOnLow 2 when being 2 ' b11, need from depositing Reservoir reads data could start next level production line dilatometer calculation twice, need to wait 1 period, by above-mentioned steps (2.3a) It carries out twice；
In the subsequent pipeline period of every row, following steps are executed:
(2.1b), by whether there is at least four free space in FIFO_0 read/write address multilevel iudge FIFO_0, if In the presence of then uplink read address addr_readOnAdd 1, a data (continuous 4 gradation datas) is read from memory and is successively deposited Enter into FIFO_0；FIFO_0 write address adds 4；Otherwise, it waits；
(2.2b), by whether there is at least four free space in FIFO_1 read/write address multilevel iudge FIFO_1, if In the presence of then downlink read address addr_readUnderAdd 1, a data (continuous 4 gradation datas) is read from memory and is successively deposited Enter into FIFO_1；FIFO_1 write address adds 4；Otherwise, it waits；
The FIFO_0 and FIFO_1 is cyclic buffer, when FIFO_0 and FIFO_1 has expired, circulation storage.
3, expansion calculates
Expansion is calculated according to p (i0,j0) point around four points gray value: f (im,jn)、f(im+1,jn)、f(im,jn+1)、 f(im+1,jn+ 1) p'(i, j in the image after expansion, are calculated using bilinear interpolation algorithm) gray value of image, it is specific real It is existing are as follows:
In first pipeline cycle of every row, following steps are executed:
(3.1a) is extracted according to row address addr on binary formOnWith binary form downlink address addrUnderLow two Position is as the initial read address in FIFO_0 and FIFO_1；
(3.2a), f (i is taken out read address since FIFO_0m,jn)、f(im,jn+1)；Read address is opened from FIFO_1 Begin to take out f (im+1,jn)、f(im+1,jn+1)；
(3.3a), moved to right after being added four gray values read in step (3.2a) 2 expanded after figure As in p'(i, j) gray value of image:
F ' (m, n)=(f (im,jn)+f(im+1,jn)+f(im,jn+1)+f(im+1,jn+1))>>2；
Within the subsequent pipeline period of every row, following steps are executed:
(3.1b) is calculated according in coordinate transform as a result, working as Rm< width_exp, i.e. im=im-1, and Tn< height_exp, That is jn=jn-1When, FIFO_0 and FIFO_1 read address is constant；Work as TnWhen >=height_exp, jn=jn-1+ 1, FIFO_0 and FIFO_1 read address adds 1；
(3.2b), f (i is taken out read address since FIFO_0m,jn)、f(im,jn+1)；Read address is opened from FIFO_1 Begin to take out f (im+1,jn)、f(im+1,jn+1)；
(3.3b), moved to right after being added four gray values read in step (3.2b) 2 expanded after figure As in p'(i, j) gray value of image:
F ' (m, n)=(f (im,jn)+f(im+1,jn)+f(im,jn+1)+f(im+1,jn+1))>>2；
It is above-mentioned to remove 2 operations also by moving to right 1 to realize during this hardware algorithmization.
4, gray scale stores
The gray value of image f ' (m, n) of expansion calculating obtained p'(m, n) is saved into specified memory, that is, is schemed Memory 2 in 3.
When being interception image after expanding image, generally intercepted between two parties on image upon inflation, for adjusting image resolution Rate.Interception image is having a size of width_icpt × height_icpt.The wide coordinate range of interception area matrix: (width_exp- Width_icpt)/2, (width_exp+width_icpt)/2；The high coordinate range of matrix: (height_exp-height_ Icpt)/2, (height_exp+height_icpt)/2.Only need to calculate the expanding image gray scale of the interception area.It sits Since mark transformation intercept figure calculate first pixel mapping point in original image of the first row in interception image first number of row As to map ordinate in original image consistent for first pixel of every row, expanding image ash is calculated according to above-mentioned pipeline system later Degree.
Embodiment
Present invention FPGA at Xilinx virtex5-XC5VFX100T is realized, is worked in 100M.To original image 160* 128,1.2 times, i.e. 192*153 are expanded, then original template Fig. 1 .1 times size, that is, 176*140 image is intercepted in expanding image, it is complete 0.25ms is only needed at algorithm operation.
The above, optimal specific embodiment only of the invention, but scope of protection of the present invention is not limited thereto, In the technical scope disclosed by the present invention, any changes or substitutions that can be easily thought of by anyone skilled in the art, It should be covered by the protection scope of the present invention.
The content that description in the present invention is not described in detail belongs to the well-known technique of professional and technical personnel in the field.

Claims (6)

1.一种红外图像线性插值膨胀硬件处理方法，该方法采用硬件实现，加快图像膨胀处理速度，其特征在于：首先将原图进行膨胀放大得到膨胀后的图像，然后对膨胀后图像中每个像素点p'执行如下步骤：1. an infrared image linear interpolation expansion hardware processing method, the method adopts hardware to realize, accelerates the image expansion processing speed, it is characterized in that: at first, the original image is expanded and enlarged to obtain the expanded image, and then each image in the expanded image is expanded. The pixel point p' performs the following steps: (1)、坐标计算，根据p'在膨胀后图像坐标系中的坐标p'(m,n)反推该点在原图坐标系的坐标p(i0,j0)，对p(i0,j0)的坐标值进行取整运算，得到原图中距离p点最近的左上点坐标(im,jn)；所述膨胀后图像坐标系的坐标原点为膨胀后的图像左上角，左上角向右为膨胀后图像坐标系横轴X轴正方向，左上角向下为膨胀后图像坐标系纵轴Y正方向，所述原图坐标系的坐标原点为原图的左上角，左上角向右为原图坐标系横轴X轴正方向，左上角向下为原图坐标系纵轴Y轴正方向；(1) Coordinate calculation, according to the coordinate p'(m,n) of p' in the image coordinate system after expansion, inversely deduce the coordinate p(i 0 ,j 0 ) of the point in the original image coordinate system, for p(i 0 , j 0 ) coordinate values are rounded to obtain the coordinates (im , j n ) of the upper left point closest to point p in the original image; the coordinate origin of the expanded image coordinate system is the upper left corner of the expanded image, The upper left corner to the right is the positive direction of the horizontal axis X axis of the image coordinate system after expansion, the upper left corner downward is the positive Y direction of the vertical axis Y axis of the image coordinate system after expansion, the coordinate origin of the original image coordinate system is the upper left corner of the original image, and the upper left corner is the upper left corner of the original image. The right corner is the positive direction of the X-axis of the horizontal axis of the original image coordinate system, and the upper left corner down is the positive direction of the Y-axis of the vertical axis of the original image coordinate system; 当原图的尺寸为width_src×height_src，膨胀后图像的尺寸为width_exp×height_exp时，根据膨胀后图像中坐标p'(m,n)反推该点在原图中的对应的位置p(i0,j0)，得到原图中距离p点最近的左上像素点坐标(im,jn)采用迭代递推的方法为：When the size of the original image is width_src×height_src and the size of the expanded image is width_exp×height_exp, the corresponding position p(i 0 , j 0 ), the coordinates of the upper left pixel point (im , j n ) closest to point p in the original image are obtained by iterative recursion: 当m＝0，n＝0时，令i0＝0,j0＝0，令中间变量R0＝0，T0＝0；When m=0, n=0, let i 0 =0, j 0 =0, let intermediate variables R 0 =0, T 0 =0; 当m≥1时，计算中间变量Rm＝Rm-1+width_src,m∈{1,…,width_exp-1}，如果Rm&lt;width_exp，则im＝im-1；如果Rm≥width_exp，则im＝im-1+1，Rm＝Rm-1-width_exp；When m≥1, calculate the intermediate variable R m =R m-1 +width_src,m∈{1,...,width_exp-1}, if R m &lt; width_exp , then im =im -1 ; if R m ≥width_exp, then im =im -1 +1, R m =R m -1 -width_exp; 当n≥1时，计算中间变量Tn＝Tn-1+height_src,n∈{1,…,height_exp-1}，如果Tn&lt;height_exp，则jn＝jn-1；如果Tn≥height_exp，则jn＝jn-1+1，Tn＝Tn-1-height_exp；When n≥1, calculate the intermediate variable T n =T n-1 +height_src,n∈{1,...,height_exp-1}, if T n &lt;height_exp, then j n =j n-1 ; if T n ≥height_exp, then j n =j n-1 +1, T n =T n-1 -height_exp; (2)、灰度读取，从原图存储器中获取原图中p(i0,j0)点周围四个点的灰度值：f(im,jn)、f(im+1,jn)、f(im,jn+1)、f(im+1,jn+1)，将存储连续的两组灰度数据分别存入两个内部FIFO中，所述f(x,y)为原始图像中坐标(x,y)处的灰度数据；(2) Grayscale reading, obtain the grayscale values of the four points around the p(i 0 , j 0 ) point in the original image from the original image memory: f(im , j n ) , f (im + 1,j n ), f(im ,j n +1), f(im +1,j n +1 ) , two consecutive groups of grayscale data are stored in two internal FIFOs, respectively. f(x,y) is the grayscale data at coordinates (x,y) in the original image; (3)、膨胀计算，从两个FIFO中读取出p(i0,j0)点周围四个点的灰度值：f(im,jn)、f(im+1,jn)、f(im,jn+1)、f(im+1,jn+1)，采用双线性插值算法计算膨胀后的图像中p'(i,j)的图像灰度值；(3) Dilation calculation, read the grayscale values of four points around p(i 0 ,j 0 ) from the two FIFOs: f(im , j n ) , f(im +1, j n ), f(im , j n +1), f(im +1, j n +1), the image gray level of p'(i, j) in the expanded image is calculated by bilinear interpolation algorithm value; (4)、灰度存储，将步骤(3)计算出来的图像灰度值保存到膨胀后图像对应的存储器中，更新膨胀后图像中p'(i,j)的图像灰度值。(4) Grayscale storage, save the image grayscale value calculated in step (3) into the memory corresponding to the expanded image, and update the image grayscale value of p'(i,j) in the expanded image. 2.根据权利要求1中的一种红外图像线性插值膨胀硬件处理方法，其特征在于：所述方法在FPGA中实现。2. A hardware processing method for linear interpolation expansion of an infrared image according to claim 1, wherein the method is implemented in an FPGA. 3.根据权利要求1中的一种红外图像线性插值膨胀硬件处理方法，其特征在于：所述步骤(1)～步骤(4)的坐标计算、灰度读取、膨胀计算、灰度存储采用四级流水线并行实现。3. according to a kind of infrared image linear interpolation expansion hardware processing method in claim 1, it is characterized in that: the coordinate calculation of described step (1)～step (4), grayscale reading, expansion calculation, grayscale storage adopt A four-stage pipeline is implemented in parallel. 4.根据权利要求1中的一种红外图像线性插值膨胀硬件处理方法，其特征在于：原图存储器位宽为像素点灰度值宽度的4倍，每四个像素点灰度值对应一个地址存储空间，其存储地址为：(纵坐标x×原始图像宽度width_src+横坐标y)&gt;&gt;2，两个FIFO的宽度均为像素点灰度值的宽度，深度大于等于16。4. according to a kind of infrared image linear interpolation expansion hardware processing method in claim 1, it is characterized in that: original image memory bit width is 4 times of pixel point gray value width, and every four pixel point gray value corresponds to an address Storage space, its storage address is: (ordinate x × original image width width_src + abscissa y) &gt;&gt; 2, the width of the two FIFOs are the width of the gray value of the pixel point, and the depth is greater than or equal to 16. 5.根据权利要求4所述的一种红外图像线性插值膨胀硬件处理方法，其特征在于灰度读取的具体实现过程为：5. a kind of infrared image linear interpolation expansion hardware processing method according to claim 4 is characterized in that the concrete realization process of grayscale reading is: 在每行的第一个流水线周期内，执行如下步骤：During the first pipeline cycle of each row, the following steps are performed: (2.1a)、计算灰度值f(im,jn)在存储器中的绝对地址，记为上行地址addr上；计算f(im+1,jn)在存储器中的绝对地址，记为下行地址addr下：(2.1a), calculate the absolute address of the gray value f(im , j n ) in the memory, denoted as the upstream address addr; calculate the absolute address of f(im +1, j n ) in the memory , denoted For the downstream address addr: addr上＝im×width_src+jm addr=i m × width_src +j m addr下＝(im+1)×width_src+jm addr down =(i m +1)×width_src+j m (2.2a)、将上行地址addr上和下行地址addr下转换成二进制形式，并将二进制形式的上行地址addr上和二进制形式的下行地址addr下进行低两位截短得到存储器上行读地址addr_read上和下行读地址addr_read下；(2.2a) Convert the upstream address addr and the downstream address addr into binary form, and truncate the lower two bits of the binary upstream address addr and the binary downstream address addr to obtain the memory upstream read address addr_read and the downstream read address addr_read ; (2.3a)、根据上行读指针addr_read上提取存储器中连续4个灰度数据存入到FIFO_0中，上行读地址addr_read上加1，FIFO_0写地址加4；根据下行读指针addr_read下提取存储器中连续4个灰度数据存入到FIFO_1中，下行读地址addr_read下加1，FIFO_1写地址加4；(2.3a), according to the upstream read pointer addr_read , extract 4 consecutive grayscale data in the memory and store them in FIFO_0, add 1 to the upstream read address addr_read , and add 4 to the FIFO_0 write address; extract the continuous data in the memory according to the downstream read pointer addr_read The 4 grayscale data are stored in FIFO_1, the downlink read address addr_read is incremented by 1, and the FIFO_1 write address is incremented by 4; (2.4a)、当addr上的低2位为二进制数值11时，将addr_read上往后递推一个地址，得到新的addr_read上，重新执行步骤(2.3a)，然后，进入下一级流水线膨胀计算步骤；否则，直接进入下一级流水线膨胀计算步骤；(2.4a), when the lower 2 bits on addr are binary value 11, push addr_read backward by an address to get a new addr_read , re-execute step (2.3a), and then enter the next level of pipeline expansion calculation step; otherwise, directly enter the next-stage pipeline expansion calculation step; 在每行的后续流水线周期，执行如下步骤：On subsequent pipeline cycles for each line, the following steps are performed: (2.1b)、判断FIFO_0中是否存在至少4个空闲空间，如果存在，则上行读地址addr_read上加1，从存储器中读取连续4个灰度数据依次存入到FIFO_0中；FIFO_0写地址加4；否则，等待；(2.1b), determine whether there are at least 4 free spaces in FIFO_0, if so , add 1 to the upstream read address addr_read, read 4 consecutive grayscale data from the memory and store them in FIFO_0 in turn; FIFO_0 write address plus 4; otherwise, wait; (2.2b)、判断FIFO_1中是否存在至少4个空闲空间，如果存在，则下行读地址addr_read下加1，从存储器中读取连续4个灰度数据，依次存入到FIFO_1中；FIFO_1写地址加4；否则，等待；(2.2b), determine whether there are at least 4 free spaces in FIFO_1, if so , add 1 to the downlink read address addr_read, read 4 consecutive grayscale data from the memory, and store them in FIFO_1 in turn; FIFO_1 write address add 4; otherwise, wait; 所述FIFO_0和FIFO_1均为循环缓冲区，当FIFO_0和FIFO_1已满时，循环存储。The FIFO_0 and FIFO_1 are both circular buffers, and when FIFO_0 and FIFO_1 are full, they are stored circularly. 6.根据权利要求5中的一种红外图像线性插值膨胀硬件处理方法，其特征在于膨胀计算的具体实现为：6. according to a kind of infrared image linear interpolation expansion hardware processing method in claim 5, it is characterized in that the concrete realization of expansion calculation is: 在每行的第一个流水线周期内，执行如下步骤：During the first pipeline cycle of each row, the following steps are performed: (3.1a)、根据二进制形式上行地址addr上和二进制形式下行地址addr下的低两位作为FIFO_0和FIFO_1中的初始读地址；(3.1a), according to the lower two bits on the binary form upstream address addr and the binary form downstream address addr as the initial read address in FIFO_0 and FIFO_1; (3.2a)、从FIFO_0中读地址开始取出f(im,jn)、f(im,jn+1)；从FIFO_1中读地址开始取出f(im+1,jn)、f(im+1,jn+1)；(3.2a), start to read the address from FIFO_0 and take out f (im,jn), f (im,jn + 1); start to read the address from FIFO_1 and take out f (im + 1,jn), f (im+1,jn + 1); (3.3a)、将步骤(3.2a)中读取的四个灰度值进行相加后右移2位得到膨胀后的图像中p'(i,j)的图像灰度值：(3.3a), add the four grayscale values read in step (3.2a), and then shift 2 bits to the right to obtain the image grayscale value of p'(i,j) in the expanded image: f′(m,n)＝(f(im,jn)+f(im+1,jn)+f(im,jn+1)+f(im+1,jn+1))&gt;&gt;2；f'( m , n )=(f(im,jn)+ f (im+1, jn )+f(im, jn + 1)+ f (im+1,jn + 1)) &gt;&gt;2; 在每行的后续流水线周期内，执行如下步骤：On subsequent pipeline cycles for each row, the following steps are performed: (3.1b)、根据步骤(2)中坐标变换中计算结果，当Rm&lt;width_exp，即im＝im-1，且Tn&lt;height_exp，即jn＝jn-1时，FIFO_0和FIFO_1读地址不变；当Tn≥height_exp时，jn＝jn-1+1，FIFO_0和FIFO_1读地址加1；(3.1b), according to the calculation result in the coordinate transformation in step (2), when R m &lt;width_exp, i.e. im =im -1 , and T n &lt;height_exp, i.e. j n =j n -1 , The read addresses of FIFO_0 and FIFO_1 remain unchanged; when T n ≥height_exp, j n =j n-1 +1, and the read addresses of FIFO_0 and FIFO_1 increase by 1; (3.2b)、从FIFO_0中读地址开始取出f(im,jn)、f(im,jn+1)；从FIFO_1中读地址开始取出f(im+1,jn)、f(im+1,jn+1)；( 3.2b ), start to read f(im,jn), f (im,jn + 1) from FIFO_0 ; start to read f(im + 1,jn) from FIFO_1 f (im+1,jn + 1); (3.3b)、将步骤(3.2b)中读取的四个灰度值进行相加后右移2位得到膨胀后的图像中p'(i,j)的图像灰度值：(3.3b), add the four grayscale values read in step (3.2b), and then shift right by 2 bits to obtain the image grayscale value of p'(i,j) in the expanded image: f′(m,n)＝(f(im,jn)+f(im+1,jn)+f(im,jn+1)+f(im+1,jn+1))&gt;&gt;2。f'( m , n )=(f(im,jn)+ f (im+1, jn )+f(im, jn + 1)+ f (im+1,jn + 1)) &gt;&gt; 2.
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