CN106774282A - A kind of on-line parameter identification circuit - Google Patents
A kind of on-line parameter identification circuit Download PDFInfo
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- CN106774282A CN106774282A CN201710071324.8A CN201710071324A CN106774282A CN 106774282 A CN106774282 A CN 106774282A CN 201710071324 A CN201710071324 A CN 201710071324A CN 106774282 A CN106774282 A CN 106774282A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B23/00—Testing or monitoring of control systems or parts thereof
- G05B23/02—Electric testing or monitoring
- G05B23/0205—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
- G05B23/0259—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterized by the response to fault detection
- G05B23/0275—Fault isolation and identification, e.g. classify fault; estimate cause or root of failure
- G05B23/0278—Qualitative, e.g. if-then rules; Fuzzy logic; Lookup tables; Symptomatic search; FMEA
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- Engineering & Computer Science (AREA)
- Fuzzy Systems (AREA)
- Mathematical Physics (AREA)
- Quality & Reliability (AREA)
- General Physics & Mathematics (AREA)
- Automation & Control Theory (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Dc Digital Transmission (AREA)
Abstract
A kind of on-line parameter identification circuit, is related to isolation and the diagnostic field of flying vehicles control rudder face failure;Including computing unit circuit, debug circuit, the first communication chip, the second communication chip, data storage card interface circuit, interface circuit, 5V mu balanced circuits and 3.3V mu balanced circuits;Wherein, data storage card interface circuit is connected with computing unit circuit;Debug circuit is connected with computing unit circuit;Interface circuit is connected with the first communication chip, while the first communication chip is connected with computing unit circuit;Interface circuit is connected with the second communication chip, while the second communication chip is connected with computing unit circuit;Interface circuit is connected with 5V mu balanced circuits;5V mu balanced circuits are connected with 3.3V mu balanced circuits;The present invention be suitable for Width funtion external power source input, be easy to it is integrated with flight control system, be easy to store flying quality and Identification Data, improve the reliability and accuracy of identification result.
Description
Technical field
Isolation and diagnostic field the present invention relates to a kind of flying vehicles control rudder face failure, particularly a kind of on-line parameter are distinguished
Know circuit.
Background technology
When vehicle rudder occurs catastrophe failure, such as steering wheel is stuck or during Control Surface Damage, classical control system is difficult in adapt to
And stabilization, On-line Estimation and identification need to be carried out to the stuck position of steering wheel, Control Surface Damage situation by on-line Algorithm, according to failure feelings
Condition flight control system is controlled the online of rudder face and redistributes in time, or further implementation control law resets the control such as meter system online
System reconstruct measure, will otherwise cause the serious consequence for being difficult to retrieve.Carried out the research of on-line parameter identification technique both at home and abroad,
But on-line parameter identification algorithm is typically directly realized on winged control machine, so occupies the computing resource of winged control machine;Parameter identification
The degree of accuracy compare rely on for recognize kinetic model the degree of accuracy, will be difficult to obtain based on inaccurate kinetic model
Correct identification result;The identification result reliability obtained using only a kind of Identification of parameter is relatively low.
The content of the invention
Above-mentioned deficiency it is an object of the invention to overcome prior art, there is provided a kind of on-line parameter identification circuit, hardware
System cost is low, be suitable for Width funtion external power source input, be easy to it is integrated with flight control system, be easy to store flying quality and identification
Data, are easy to program to update;Algorithm is based on wave filter-identifier group, by first failure judgement pattern, then carries out parameter identification
Mode is carried out, and improves the reliability of identification result, and parameter identification is put to the vote using double remaining algorithms and obtained with arithmetic average
To identification result, the accuracy of parameter identification is improve.
Above-mentioned purpose of the invention is achieved by following technical solution:
A kind of on-line parameter identification circuit, including computing unit circuit, debug circuit, the first communication chip, the second communication
Chip, data storage card interface circuit, interface circuit, 5V mu balanced circuits and 3.3V mu balanced circuits;Wherein, data storage card interface
Circuit is connected with computing unit circuit;Debug circuit is connected with computing unit circuit;Interface circuit is connected with the first communication chip,
The first communication chip is connected with computing unit circuit simultaneously;Interface circuit is connected with the second communication chip, while the second communication core
Piece is connected with computing unit circuit;Interface circuit is connected with 5V mu balanced circuits;5V mu balanced circuits are connected with 3.3V mu balanced circuits.
In a kind of above-mentioned on-line parameter identification circuit, 5V mu balanced circuits receive external power source, 3.3V by interface circuit
The Power convert that mu balanced circuit transmits 5V mu balanced circuits into 3.3V power supplys, and for computing unit circuit, debug circuit, first lead to
News chip, the second communication chip and data memory card interface circuit are powered.
In a kind of above-mentioned on-line parameter identification circuit, the debug circuit is provided with VDD interfaces, TRST interfaces, TDI and connects
Mouth, TMS/SWDIO interfaces, TCK/SWCLK interfaces, NC interfaces, TDO/SWO interfaces, RESET# interfaces, NC interfaces, VDD interfaces and
GND interfaces;Wherein, TRST interfaces, TDI interfaces, TMS/SWDIO interfaces, TCK/SWCLK interfaces, TDO/SWO interfaces and RESET#
Interface is connected with computing unit circuit;VDD interfaces connect 3.3V mu balanced circuits;TCK/SWCLK interfacing grounds;GND interfacing grounds.
In a kind of above-mentioned on-line parameter identification circuit, first communication chip is provided with V+ interfaces, V- interfaces, R1IN
Interface, R2IN interfaces, T1IN interfaces, T2IN interfaces, C1+ interfaces, C1- interfaces, VCC interfaces, GND interfaces, R1OUT interfaces,
R2OUT interfaces, T1OUT interfaces, T2OUT interfaces, C2+ interfaces and C2- interfaces;Wherein, T1OUT interfaces, T2OUT interfaces, R1IN
Interface and R2IN interfaces are connected with interface circuit;T1IN interfaces, T2IN interfaces, R1OUT interfaces and R2OUT interfaces and computing unit
Circuit is connected;V- interfaces are grounded after being connected with external capacitive C2;V+ interfaces are grounded after being connected with external capacitive C1;C1+ interfaces with
It is connected with C1- interfaces after external capacitive C4 series connection;C2+ interfaces are connected after being connected with external capacitive C5 with C2- interfaces;VCC interfaces
It is connected with 3.3V mu balanced circuits, while being grounded after VCC interfaces are connected with external capacitive C3;GND interfacing grounds.
In a kind of above-mentioned on-line parameter identification circuit, second communication chip be provided with R1IN interfaces, R2IN interfaces,
T1OUT interfaces, T2OUT interfaces, IN interfaces, OUT interfaces and GND interfaces;Wherein, R1IN interfaces, R2IN interfaces, T1OUT interfaces
It is connected with interface circuit with T2OUT interfaces;IN interfaces and OUT interfaces are connected with computing unit circuit;GND interfacing grounds.
In a kind of above-mentioned on-line parameter identification circuit, the 5V mu balanced circuits are provided with Vo+ interfaces;The 3.3V voltage stabilizings
Circuit is provided with IN interfaces;The Vo+ interfaces of 5V mu balanced circuits are connected with the IN interfaces of 3.3V mu balanced circuits.
In a kind of above-mentioned on-line parameter identification circuit, the data storage card interface circuit be provided with DATA2 interfaces,
CD/DATA3 interfaces, CMD interfaces, VSS interfaces, VDD interfaces, CLK interfaces, DATA0 interfaces, DATA1 interfaces, CD interfaces, GND connect
Mouth and WP interfaces;Wherein, DATA2 interfaces, CD/DATA3 interfaces, CMD interfaces, CLK interfaces, DATA0 interfaces and DATA1 interfaces with
Computing unit circuit is connected;VSS interfacing grounds;VDD interfaces are connected with 3.3V mu balanced circuits.
The present invention has the following advantages that compared with prior art:
(1) hardware system in the present invention, using high efficiency, low cost on the premise of it efficiently can perform identification algorithm
STM32F407 chips, reduce hardware system cost;Comprising DC-DC power source management module, the Width funtion of 9V~18V is suitable for
Input, and by output voltage stabilization in 3.3V and 5V;Comprising RS232 and two kinds of communication interfaces of RS422, it is easy to and flight control system collection
Into;Comprising SD card interface, substantial amounts of flying quality and Identification Data can be stored;Comprising jtag interface, facilitate program programming and
Debugging;
(2) inventive algorithm is by Kalman filter group elder generation failure judgement pattern, and is selected based on corresponding fault mode
Corresponding kinetic model is selected, identifier is reused and is carried out parameter identification, the reliability of identification result can be improved.
Brief description of the drawings
Fig. 1 is on-line parameter identification circuit figure of the present invention;
Fig. 2 is debug circuit figure of the present invention;
Fig. 3 is the first communication chip of the invention;
Fig. 4 is the second communication chip of the invention;
Fig. 5 is data storage card interface circuit of the present invention.
Specific embodiment
The present invention is described in further detail with specific embodiment below in conjunction with the accompanying drawings:
A kind of on-line parameter identification circuit is provided, is not take up flying the computing resource of control machine, independent operating algorithm, by communication
Interface carries out data exchange with winged control machine;Device uses the computing chip of high efficiency, low cost, and is input into comprising Width funtion is suitable for
Power management module, conventional communication interface and external storage interface, program burn writing and debugging interface.
It is as shown in Figure 1 on-line parameter identification circuit figure, as seen from the figure, a kind of on-line parameter identification circuit, including it is efficient
The computing unit circuit of low cost, debug circuit, the first communication chip and the second communication chip are easy to integrated with flight control system;Number
According to memory card interface circuit, substantial amounts of flying quality and Identification Data, interface circuit can be stored, the 5V of Width funtion input is suitable for
Mu balanced circuit and 3.3V mu balanced circuits;Wherein, data storage card interface circuit is connected with computing unit circuit;Debug circuit and meter
Calculate element circuit connection;Interface circuit is connected with the first communication chip, while the first communication chip is connected with computing unit circuit;
Interface circuit is connected with the second communication chip, while the second communication chip is connected with computing unit circuit;Interface circuit is steady with 5V
Volt circuit is connected;5V mu balanced circuits are connected with 3.3V mu balanced circuits.
Wherein, 5V mu balanced circuits receive external power source by interface circuit, and 3.3V mu balanced circuits transmit 5V mu balanced circuits
Power convert into 3.3V power supplys, and be computing unit circuit, debug circuit, the first communication chip, the second communication chip sum
Powered according to memory card interface circuit.5V mu balanced circuits are provided with Vo+ interfaces;The 3.3V mu balanced circuits are provided with IN interfaces;5V
The Vo+ interfaces of mu balanced circuit are connected with the IN interfaces of 3.3V mu balanced circuits.
Debug circuit figure is illustrated in figure 2, as seen from the figure, debug circuit is provided with VDD interfaces, TRST interfaces, TDI and connects
Mouth, TMS/SWDIO interfaces, TCK/SWCLK interfaces, NC interfaces, TDO/SWO interfaces, RESET# interfaces, NC interfaces, VDD interfaces and
GND interfaces;Wherein, TRST interfaces, TDI interfaces, TMS/SWDIO interfaces, TCK/SWCLK interfaces, TDO/SWO interfaces and RESET#
Interface is connected with computing unit circuit;VDD interfaces connect 3.3V mu balanced circuits;TCK/SWCLK interfacing grounds;GND interfacing grounds.
The first communication chip is illustrated in figure 3, as seen from the figure, the first communication chip is provided with V+ interfaces, V- interfaces, R1IN
Interface, R2IN interfaces, T1IN interfaces, T2IN interfaces, C1+ interfaces, C1- interfaces, VCC interfaces, GND interfaces, R1OUT interfaces,
R2OUT interfaces, T1OUT interfaces, T2OUT interfaces, C2+ interfaces and C2- interfaces;Wherein, T1OUT interfaces, T2OUT interfaces, R1IN
Interface and R2IN interfaces are connected with interface circuit;T1IN interfaces, T2IN interfaces, R1OUT interfaces and R2OUT interfaces and computing unit
Circuit is connected;V- interfaces are grounded after being connected with external capacitive C2;V+ interfaces are grounded after being connected with external capacitive C1;C1+ interfaces with
It is connected with C1- interfaces after external capacitive C4 series connection;C2+ interfaces are connected after being connected with external capacitive C5 with C2- interfaces;VCC interfaces
It is connected with 3.3V mu balanced circuits, while being grounded after VCC interfaces are connected with external capacitive C3;GND interfacing grounds.
Be illustrated in figure 4 the second communication chip, as seen from the figure, the second communication chip be provided with R1IN interfaces, R2IN interfaces,
T1OUT interfaces, T2OUT interfaces, IN interfaces, OUT interfaces and GND interfaces;Wherein, R1IN interfaces, R2IN interfaces, T1OUT interfaces
It is connected with interface circuit with T2OUT interfaces;IN interfaces and OUT interfaces are connected with computing unit circuit;GND interfacing grounds.
Data storage card interface circuit is illustrated in figure 5, as seen from the figure, data storage card interface circuit is provided with DATA2
Interface, CD/DATA3 interfaces, CMD interfaces, VSS interfaces, VDD interfaces, CLK interfaces, DATA0 interfaces, DATA1 interfaces, CD interfaces,
GND interfaces and WP interfaces;Wherein, DATA2 interfaces, CD/DATA3 interfaces, CMD interfaces, CLK interfaces, DATA0 interfaces and DATA1
Interface is connected with computing unit circuit;VSS interfacing grounds;VDD interfaces are connected with 3.3V mu balanced circuits.
On-line parameter identification need to include the movement-state (angle of attack, yaw angle, three axis angular rates) of aircraft with input, with
The inclined control instruction of rudder of vehicle rudder, by flight control computer or used group connecing by the first communication chip or the second communication chip
Mouth input, flight control computer is fed back to after the parameter of identification also by RS232 or RS422.
Occur that rudder face is stuck or during rudder face damage failure when a certain rudder face of unmanned plane, to should failure wave filter residual error phase
It is smaller than for other wave filters, larger probability of malfunction can obtain according to Conditional Probability Computing Method.Algorithm monitor compared with
After major break down probability, suitable Active spurring signal will be applied to failure rudder face, to inspire enough body dynamic characteristics, carried
The degree of accuracy of Fault Isolation high.After rudder face Active spurring is carried out, algorithm can accurately position failure, and activate the failure pair
The identifier answered.Rudder face effect of the identifier after on-line parameter identification obtains the stuck position of accurate rudder face or rudder face damage
Rate.
The content not being described in detail in description of the invention belongs to the known technology of those skilled in the art.
Claims (7)
1. a kind of on-line parameter identification circuit, it is characterised in that:Including computing unit circuit, debug circuit, the first communication chip,
Second communication chip, data storage card interface circuit, interface circuit, 5V mu balanced circuits and 3.3V mu balanced circuits;Wherein, data are deposited
Card storage interface circuit is connected with computing unit circuit;Debug circuit is connected with computing unit circuit;Interface circuit and the first communication
Chip is connected, while the first communication chip is connected with computing unit circuit;Interface circuit is connected with the second communication chip, while the
Two communication chips are connected with computing unit circuit;Interface circuit is connected with 5V mu balanced circuits;5V mu balanced circuits and 3.3V voltage stabilizings electricity
Road connects.
2. a kind of on-line parameter identification circuit according to claim 1, it is characterised in that:5V mu balanced circuits are by interface electricity
Road receives external power source, and the Power convert that 3.3V mu balanced circuits transmit 5V mu balanced circuits is computing unit into 3.3V power supplys
Circuit, debug circuit, the first communication chip, the second communication chip and data memory card interface circuit are powered.
3. a kind of on-line parameter identification circuit according to claim 1, it is characterised in that:The debug circuit is provided with
VDD interfaces, TRST interfaces, TDI interfaces, TMS/SWDIO interfaces, TCK/SWCLK interfaces, NC interfaces, TDO/SWO interfaces,
RESET# interfaces, NC interfaces, VDD interfaces and GND interfaces;Wherein, TRST interfaces, TDI interfaces, TMS/SWDIO interfaces, TCK/
SWCLK interfaces, TDO/SWO interfaces and RESET# interfaces are connected with computing unit circuit;VDD interfaces connect 3.3V mu balanced circuits;
TCK/SWCLK interfacing grounds;GND interfacing grounds.
4. a kind of on-line parameter identification circuit according to claim 1, it is characterised in that:First communication chip is set
Have V+ interfaces, V- interfaces, R1IN interfaces, R2IN interfaces, T1IN interfaces, T2IN interfaces, C1+ interfaces, C1- interfaces, VCC interfaces,
GND interfaces, R1OUT interfaces, R2OUT interfaces, T1OUT interfaces, T2OUT interfaces, C2+ interfaces and C2- interfaces;Wherein, T1OUT connects
Mouth, T2OUT interfaces, R1IN interfaces and R2IN interfaces are connected with interface circuit;T1IN interfaces, T2IN interfaces, R1OUT interfaces and
R2OUT interfaces are connected with computing unit circuit;V- interfaces are grounded after being connected with external capacitive C2;V+ interfaces connect with external capacitive C1
It is grounded after connecing;C1+ interfaces are connected after being connected with external capacitive C4 with C1- interfaces;C2+ interfaces connected with external capacitive C5 after with
C2- interfaces are connected;VCC interfaces are connected with 3.3V mu balanced circuits, while being grounded after VCC interfaces are connected with external capacitive C3;GND connects
Mouth ground connection.
5. a kind of on-line parameter identification circuit according to claim 1, it is characterised in that:Second communication chip is set
There are R1IN interfaces, R2IN interfaces, T1OUT interfaces, T2OUT interfaces, IN interfaces, OUT interfaces and GND interfaces;Wherein, R1IN connects
Mouth, R2IN interfaces, T1OUT interfaces and T2OUT interfaces are connected with interface circuit;IN interfaces and OUT interfaces and computing unit circuit
Connection;GND interfacing grounds.
6. a kind of on-line parameter identification circuit according to claim 2, it is characterised in that:The 5V mu balanced circuits are provided with
Vo+ interfaces;The 3.3V mu balanced circuits are provided with IN interfaces;The Vo+ interfaces of 5V mu balanced circuits connect with the IN of 3.3V mu balanced circuits
Mouth connection.
7. a kind of on-line parameter identification circuit according to claim 1, it is characterised in that:The data storage card interface electricity
Road be provided with DATA2 interfaces, CD/DATA3 interfaces, CMD interfaces, VSS interfaces, VDD interfaces, CLK interfaces, DATA0 interfaces,
DATA1 interfaces, CD interfaces, GND interfaces and WP interfaces;Wherein, DATA2 interfaces, CD/DATA3 interfaces, CMD interfaces, CLK interfaces,
DATA0 interfaces and DATA1 interfaces are connected with computing unit circuit;VSS interfacing grounds;VDD interfaces are connected with 3.3V mu balanced circuits.
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CN201710071324.8A CN106774282B (en) | 2017-02-09 | 2017-02-09 | A kind of on-line parameter identification circuit |
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CN201710071324.8A CN106774282B (en) | 2017-02-09 | 2017-02-09 | A kind of on-line parameter identification circuit |
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CN106774282B CN106774282B (en) | 2019-09-06 |
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Cited By (1)
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CN109343507A (en) * | 2018-10-16 | 2019-02-15 | 北京理工大学 | A kind of fault detection and shielding system and method |
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