CN106654851A - Semiconductor-laser narrow pulse driving circuit and working method thereof - Google Patents
Semiconductor-laser narrow pulse driving circuit and working method thereof Download PDFInfo
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- CN106654851A CN106654851A CN201611031442.8A CN201611031442A CN106654851A CN 106654851 A CN106654851 A CN 106654851A CN 201611031442 A CN201611031442 A CN 201611031442A CN 106654851 A CN106654851 A CN 106654851A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
- H01S5/042—Electrical excitation ; Circuits therefor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
- H01S5/042—Electrical excitation ; Circuits therefor
- H01S5/0428—Electrical excitation ; Circuits therefor for applying pulses to the laser
Abstract
The invention relates to a semiconductor-laser narrow pulse driving circuit and a working method thereof. The semiconductor-laser narrow pulse driving circuit comprises an external power supply interface circuit, a narrow pulse generating circuit and a MOSFET pulse driving circuit. The external power supply interface circuit provides power for the narrow pulse generating circuit and the MOSFET pulse driving circuit respectively. Through controlling a pulse width and a repetition frequency of a narrow pulse generating circuit trigger signal, a semiconductor laser can acquire a light pulse signal with the continuous adjustable pulse width and the repetition frequency. The trigger signal generated by the narrow pulse generating circuit directly drives a drain electrode switch of a MOSFET driving chip field effect transistor and a grid electrode of the field effect transistor is connected to a stable voltage so that a problem that signal rise time and fall time are too long when a pulse signal is directly used to drive the grid electrode of the field effect transistor can be avoided.
Description
Technical field
The present invention relates to a kind of semiconductor laser burst pulse drive circuit and its method of work, belong to semiconductor laser
Technical field.
Background technology
In recent years, semiconductor laser burst pulse drive circuit with compact conformation, stability is high, pulse width is narrow, repeat
The features such as frequency height, pulse width and adjustable repetition rate, it is widely used in optic communication, single photon detection, fiber amplifier kind
The fields such as component.Either in optic communication, single photon detection, or fiber amplifier seed source domain, pulse laser it is smooth
The performances such as waveform, stable centre wavelength, high-output power, narrow pulse width, all rely on swashing for semiconductor laser
Light pulse quality, and the light pulse of semiconductor laser is direct by the electric pulse of semiconductor laser device driving circuit generation
What modulation was obtained, i.e., the quality of the pulse power directly decides the quality of laser pulse quality；Therefore, semiconductor laser pulse
The quality of design of drive circuit has in the related art conclusive effect.
Chinese patent document CN101895058A, discloses a kind of high-speed narrow pulse modulation for semiconductor laser and drives
Galvanic electricity source, the power supply is switched using high speed MOSFET, by the supply voltage in change driving power supply, resistance and electric capacity, is made
Frequency required for the output of powered semiconductor laser is high, forward position is fast, pulse width, peak value of pulse are controllable, waveform is smooth
Laser pulse.Chinese patent document CN103227413A, discloses a kind of semiconductor laser device driving circuit, and the circuit passes through arteries and veins
The width that shaping circuit further compresses narrow pulse signal is rushed, the power of narrow pulse signal is improved by power amplification circuit, and
The adjustable square wave of dutycycle is produced by way of discharge and recharge, final to obtain pulse width most narrow for 20ns and repetition frequency range
For the optical signal of 100Hz-100KHz.Two above patent all directly by the grid of narrow pulse signal driving FET, but
Because MOSFET has parasitic parameter, this can increase the rising and falling time of signal, and the pulse width for making signal broadens, condition
And need to provide very high voltage obtaining peak value narrow pulse signal by way of to capacitor charge and discharge, this needs to add arteries and veins
Rush shaping circuit module or boost module improves voltage, to capacitor charge and discharge, the complexity of system can be so increased so as to quickly
Degree；So, the semiconductor laser that overall structure is simple, compact and integrated level is high cannot be obtained by the method for above patent
Drive circuit, cannot also realize the light pulse signal output of subnanosecond level pulse width.
The content of the invention
For the deficiencies in the prior art, the present invention provides a kind of semiconductor laser burst pulse drive circuit.
The present invention also provides a kind of method of work of above-mentioned semiconductor laser burst pulse drive circuit.
The technical scheme is that：
A kind of semiconductor laser burst pulse drive circuit, including external power source interface circuit, narrow-pulse generation circuit and
MOSFET pulse driving circuits；External power source interface circuit is respectively narrow-pulse generation circuit and MOSFET pulse driving circuits are supplied
Electricity.
External power source interface circuit, for being connected with external power input, introduces external power source；Burst pulse produces electricity
Road, for producing required narrow pulse signal, controls the switch mosfet in MOSFET drive circuits；MOSFET pulsed drive electricity
Road, for driving laser instrument, there is provided the running voltage and operating current of semiconductor laser, drives laser instrument to produce institute's light requirement arteries and veins
Rush signal.
Preferably, the narrow-pulse generation circuit includes CPLD control chips U6 and door chip U7, crystal oscillator clock U8, prolongs
When chip U9, delay chip U10 and electrical level transferring chip U11；The MOSFET pulse driving circuits include that MOSFET drives core
Piece U4；
It is further preferred that No. 2 pins of crystal oscillator clock U8 connect No. 12 pins of CPLD control chip U6, crystal oscillator clock
No. 1 pin of U8 connects+3.3V power supplys, and No. 1 pin of crystal oscillator clock U8 is also grounded by electric capacity C13, and No. 4 of crystal oscillator clock U8 are drawn
Foot is grounded；
1, No. 3 pins ground connection of electrical level transferring chip U11, No. 2 pins of electrical level transferring chip U11 connect+3.3V power supplys, electricity
No. 4 pins of flat conversion chip U11 connect No. 26 pins of CPLD control chip U6；10,13, the 18 of electrical level transferring chip U11
Number pins in parallel is followed by+3.3V power supplys；After 10,13, No. 18 pins in parallel of electrical level transferring chip U11 respectively by electric capacity C14,
C15, C16, C17 are grounded；No. 19 pins of electrical level transferring chip U11 connect No. 5 pins of delay chip U10；Level conversion core
No. 20 pins of piece U11 connect No. 4 pins of delay chip U10；19, No. 20 pins of electrical level transferring chip U11 pass through respectively
Resistance R14, resistance R13 connect+1.3V power supplys；No. 11 pins of electrical level transferring chip U11 connect No. 5 pins of delay chip U9；
No. 12 pins of electrical level transferring chip U11 connect No. 4 pins of delay chip U9,11, No. 12 pins of electrical level transferring chip U11
Respectively+1.3V power supplys are connect by resistance R15, resistance R16；
1,2,23,25,26,27,29,30,31, No. 32 pins of delay chip U10 connect respectively CPLD control chip U6
38,37,50,49,48,47,42,41,40, No. 39 pins；3,9,10,11,12,16,24, No. 28 of delay chip U10 are drawn
Foot is grounded；No. 8 pins of delay chip U10 are connected by resistance R12 with No. 9 pins of delay chip U10；Delay chip U10
13,18,19, No. 22 pins connection+3.3V power supplys；No. 20 pins connection of delay chip U10 is drawn with No. 2 of door chip U7
Foot；No. 21 pins connection of delay chip U10 and No. 1 pin of door chip U7；20, No. 21 pins difference of delay chip U10
+ 1.3V power supplys are connect by resistance R8, resistance R10；
No. 8 pins of delay chip U9 connect No. 9 pins of delay chip U9 by resistance R11；Delay chip U9 9,
10th, 12,16,24, No. 28 pin ground connection；11,13,18,19, No. 22 pins connection+3.3V power supplys of delay chip U9；Time delay core
No. 20 pins connection of piece U9 and No. 3 pins of door chip U7；No. 21 pins of delay chip U9 connect No. 4 with door chip U7
Pin；20, No. 21 pins of delay chip U9 connect+1.3V power supplys by resistance R7, resistance R9 respectively；
It is grounded with No. 5 pins of door chip U7；Be connected with No. 6 pins of door chip U7 MOSFET driving chip U4 14,
16th, the port after No. 20 pins in parallel；It is connected 15,17, No. 21 pins of MOSFET driving chips with No. 7 pins of door chip U7 simultaneously
Port after connection；7, No. 6 pins with door chip connect+1.3V power supplys by resistance R5, resistance R6 respectively；With the 8 of door chip U7
Number pin connection+3.3V power supplys.
4,8,10,12,24,26,28, No. 29 pins ground connection of MOSFET driving chip U4；MOSFET driving chip U4's
18th, No. 19 pins connect+5V power supplys；After 1,2,3,5,6, No. 7 pins in parallel of MOSFET driving chip U4 by resistance R3 with
The adjustable foot connection of adjustable resistance R2, the fixed resistance value end of adjustable resistance R2 connects respectively+5V power supplys and ground connection；MOSFET drives
Also it is grounded by electric capacity C7 after 1,2,3,5,6, No. 7 pins in parallel of chip U4；15,17, No. 21 of MOSFET driving chip U4
It is connected with one end of resistance R4 after pins in parallel, with resistance R4's after 14,16, No. 20 pins in parallel of MOSFET driving chip U4
The other end connects；Electric capacity C1 is in parallel with electric capacity C2, Zener diode D1 and laser instrument D2 respectively after connecting with resistance R1 to be formed simultaneously
Connection circuit, the port after 9,11,13,23,25, No. 27 pins in parallel of MOSFET driving chip U4 is connected by the parallel circuit
Connect+VLD power supplys.The CLX ends control of stable voltage connection MOSFET driving chip U4 is flowed through into the electric current of semiconductor laser.
Preferably, the external power source interface circuit includes four interfaces U1, U2, U3 and U5；U1, U2, U3 and U5 distinguish
+ 1.3V ,+3.3V ,+5V ,+VLD power supplys outside introducing；The electric capacity C18, the C19 of+1.3V power supplys for introducing Jing after parallel connection is followed by
The ground ,+3.3V power supplys of introducing are grounded after electric capacity C10, C11, the C12 Jing after parallel connection, the electric capacity of+5V power supplys of introducing Jing after parallel connection
It is grounded after C8, C9 ,+VLD the power supplys of introducing are grounded after electric capacity C3, C4, C5, the C6 Jing after parallel connection.Wherein, the voltage of+VLD power supplys
Determined according to the running voltage of laser instrument, be well-known to those skilled in the art.
External power source interface circuit, for being connected with external power input, introduces external power source, provides for whole circuit
Required burning voltage；Narrow-pulse generation circuit, for producing pulse width and the adjustable trigger of repetition rate.
Preferably, the LDKX outfans of MOSFET driving chips U4 connect the negative electrode of semiconductor laser, semiconductor laser
Anode connection+VLD the power supplys of device；The voltage of the CLX ends stable connection of MOSFET driving chip U4.+ VLD power supplys swash for quasiconductor
Light device provides required running voltage；Stable voltage, the operating current for needed for semiconductor laser is provided.
A kind of method of work of above-mentioned semiconductor laser burst pulse drive circuit, including step is as follows：
1) CPLD control chips U6 produces pumping signal, and the pumping signal that CPLD control chips U6 is produced is divided into into two-way,
Wherein pumping signal Jing delay chip U9 all the way, but not time delay directly reaches and door chip U7, and another road pumping signal is through prolonging
When chip U10 and time delay enter back into and door chip U7, carry out and narrow arteries and veins exported after computing with the two paths of signals of door chip U7 inputs
Rush trigger；
2) the burst pulse trigger that narrow-pulse generation circuit is produced is used to trigger the switch of MOSFET driving chip U4；When
When burst pulse trigger is low level, MOSFET driving chip U4 path blockades, semiconductor laser does not work；Work as burst pulse
When trigger is high level, the conducting of MOSFET driving chip U4 paths, semiconductor laser normal work.Pulse width and weight
The adjustable burst pulse trigger of complex frequency triggers the switch of MOSFET driving chip U4 so that semiconductor laser produces parameter
Adjustable light pulse signal.
Preferably, CPLD control chips U6 pumping signals according to needed for the offer of external crystal-controlled oscillation clock division.
Preferably, trigger connects the ENX inputs of MOSFET driving chip U4, for triggering MOSFET driving chips
The switch of U4.
By the pulse width and repetition rate that control trigger produced by narrow-pulse generation circuit, semiconductor laser
Pulse width and the adjustable light pulse signal of repetition rate can be obtained；Narrow-pulse generation circuit mainly using delay chip and with door
Chip is realized.
Beneficial effects of the present invention are：
1. semiconductor laser burst pulse drive circuit of the present invention, by controlling narrow-pulse generation circuit trigger
Pulse width and repetition rate, semiconductor laser can obtain pulse width and repetition rate continuously adjustable light pulse letter
Number；The trigger that narrow-pulse generation circuit is produced directly drives the drain switch of MOSFET driving chip field effect transistor, its
The voltage of the grid stable connection of effect pipe, when so can avoid directly using pulse signal driving FET grid on signal
The time of liter and fall time excessive problem；Moreover by the voltage and semiconductor laser that control MOSFET driving chip CLX ends
The anode voltage of device, can drive the semiconductor laser of the different model of running voltage 0-12V and operating current 0-3A；Pass through
The method, can finally obtain pulse width for 538ps-10ns and continuously adjustable light pulse signal；
2. semiconductor laser burst pulse drive circuit of the present invention, is that a kind of simple structure, response speed be fast, pulse
The semiconductor laser burst pulse that narrow width, pulse width and repetition rate are adjustable, driving current is big, controllability is strong drives electricity
Road.
Description of the drawings
Fig. 1 is the structural representation of semiconductor laser burst pulse drive circuit of the present invention；
Fig. 2 is the circuit structure diagram of external power source interface U1 of the present invention；
Fig. 3 is the circuit structure diagram of external power source interface U2 of the present invention；
Fig. 4 is the circuit structure diagram of external power source interface U3 of the present invention；
Fig. 5 is the circuit structure diagram of external power source interface U5 of the present invention；
Fig. 6 is the circuit structure diagram of CPLD control chip U6；
Fig. 7 is the circuit diagram of electrical level transferring chip U11；
Fig. 8 is the circuit diagram of delay chip U9；
Fig. 9 is a circuit diagram of chip U7；
Figure 10 is the circuit diagram of delay chip U10；
Figure 11 is the circuit diagram of MOSFET pulse driving circuits；
Figure 12 is the most narrow 538ps light pulses letter produced by semiconductor laser burst pulse drive circuit of the present invention
Number figure.
Specific embodiment
With reference to embodiment and Figure of description, the present invention will be further described, but not limited to this.
Embodiment 1
As shown in Figure 1.
A kind of semiconductor laser burst pulse drive circuit, including external power source interface circuit, narrow-pulse generation circuit and
MOSFET pulse driving circuits；External power source interface circuit is respectively narrow-pulse generation circuit and MOSFET pulse driving circuits are supplied
Electricity.
External power source interface circuit, for being connected with external power input, introduces external power source；Burst pulse produces electricity
Road, for producing required narrow pulse signal, controls the switch mosfet in MOSFET drive circuits；MOSFET pulsed drive electricity
Road, for driving laser instrument, there is provided the running voltage and operating current of semiconductor laser, drives laser instrument to produce institute's light requirement arteries and veins
Rush signal.
Embodiment 2
Semiconductor laser burst pulse drive circuit as described in Example 1, except that, the burst pulse produces electricity
Road includes CPLD control chips U6 and door chip U7, crystal oscillator clock U8, delay chip U9, delay chip U10 and level conversion core
Piece U11；The MOSFET pulse driving circuits include MOSFET driving chip U4；
Embodiment 3
As illustrated in figs. 6-11.
Semiconductor laser burst pulse drive circuit as described in Example 2, except that, No. 2 of crystal oscillator clock U8
Pin connects No. 12 pins of CPLD control chip U6, and No. 1 pin of crystal oscillator clock U8 connects+3.3V power supplys, and the 1 of crystal oscillator clock U8
Number pin is also grounded by electric capacity C13, No. 4 pins ground connection of crystal oscillator clock U8；
1, No. 3 pins ground connection of electrical level transferring chip U11, No. 2 pins of electrical level transferring chip U11 connect+3.3V power supplys, electricity
No. 4 pins of flat conversion chip U11 connect No. 26 pins of CPLD control chip U6；10,13, the 18 of electrical level transferring chip U11
Number pins in parallel is followed by+3.3V power supplys；After 10,13, No. 18 pins in parallel of electrical level transferring chip U11 respectively by electric capacity C14,
C15, C16, C17 are grounded；No. 19 pins of electrical level transferring chip U11 connect No. 5 pins of delay chip U10；Level conversion core
No. 20 pins of piece U11 connect No. 4 pins of delay chip U10；19, No. 20 pins of electrical level transferring chip U11 pass through respectively
Resistance R14, resistance R13 connect+1.3V power supplys；No. 11 pins of electrical level transferring chip U11 connect No. 5 pins of delay chip U9；
No. 12 pins of electrical level transferring chip U11 connect No. 4 pins of delay chip U9,11, No. 12 pins of electrical level transferring chip U11
Respectively+1.3V power supplys are connect by resistance R15, resistance R16；
1,2,23,25,26,27,29,30,31, No. 32 pins of delay chip U10 connect respectively CPLD control chip U6
38,37,50,49,48,47,42,41,40, No. 39 pins；3,9,10,11,12,16,24, No. 28 of delay chip U10 are drawn
Foot is grounded；No. 8 pins of delay chip U10 are connected by resistance R12 with No. 9 pins of delay chip U10；Delay chip U10
13,18,19, No. 22 pins connection+3.3V power supplys；No. 20 pins connection of delay chip U10 is drawn with No. 2 of door chip U7
Foot；No. 21 pins connection of delay chip U10 and No. 1 pin of door chip U7；20, No. 21 pins difference of delay chip U10
+ 1.3V power supplys are connect by resistance R8, resistance R10；
No. 8 pins of delay chip U9 connect No. 9 pins of delay chip U9 by resistance R11；Delay chip U9 9,
10th, 12,16,24, No. 28 pin ground connection；11,13,18,19, No. 22 pins connection+3.3V power supplys of delay chip U9；Time delay core
No. 20 pins connection of piece U9 and No. 3 pins of door chip U7；No. 21 pins of delay chip U9 connect No. 4 with door chip U7
Pin；20, No. 21 pins of delay chip U9 connect+1.3V power supplys by resistance R7, resistance R9 respectively；
It is grounded with No. 5 pins of door chip U7；Be connected with No. 6 pins of door chip U7 MOSFET driving chip U4 14,
16th, the port after No. 20 pins in parallel；It is connected 15,17, No. 21 pins of MOSFET driving chips with No. 7 pins of door chip U7 simultaneously
Port after connection；7, No. 6 pins with door chip connect+1.3V power supplys by resistance R5, resistance R6 respectively；With the 8 of door chip U7
Number pin connection+3.3V power supplys.
4,8,10,12,24,26,28, No. 29 pins ground connection of MOSFET driving chip U4；MOSFET driving chip U4's
18th, No. 19 pins connect+5V power supplys；After 1,2,3,5,6, No. 7 pins in parallel of MOSFET driving chip U4 by resistance R3 with
The adjustable foot connection of adjustable resistance R2, the fixed resistance value end of adjustable resistance R2 connects respectively+5V power supplys and ground connection；MOSFET drives
Also it is grounded by electric capacity C7 after 1,2,3,5,6, No. 7 pins in parallel of chip U4；15,17, No. 21 of MOSFET driving chip U4
It is connected with one end of resistance R4 after pins in parallel, with resistance R4's after 14,16, No. 20 pins in parallel of MOSFET driving chip U4
The other end connects；Electric capacity C1 is in parallel with electric capacity C2, Zener diode D1 and laser instrument D2 respectively after connecting with resistance R1 to be formed simultaneously
Connection circuit, the port after 9,11,13,23,25, No. 27 pins in parallel of MOSFET driving chip U4 is connected by the parallel circuit
Connect+VLD power supplys.The CLX ends control of stable voltage connection MOSFET driving chip U4 is flowed through into the electric current of semiconductor laser.
Embodiment 4
As shown in Figure 2-5.
Semiconductor laser burst pulse drive circuit as described in Example 1, except that, the external power source interface
Circuit includes four interfaces U1, U2, U3 and U5；It is electric that U1, U2, U3 and U5 introduce respectively outside+1.3V ,+3.3V ,+5V ,+VLD
Source；+ 1.3V the power supplys for introducing are grounded after electric capacity C18, the C19 Jing after parallel connection, the electric capacity of+3.3V power supplys of introducing Jing after parallel connection
It is grounded after C10, C11, C12 ,+5V the power supplys of introducing are grounded after electric capacity C8, the C9 Jing after parallel connection, and+VLD power supplys the Jing of introducing is in parallel
It is grounded after electric capacity C3, C4, C5, C6 afterwards.Wherein, the voltage of+VLD power supplys determines according to the running voltage of laser instrument, is this
Known to art personnel.
External power source interface circuit, for being connected with external power input, introduces external power source, provides for whole circuit
Required burning voltage；Narrow-pulse generation circuit, for producing pulse width and the adjustable trigger of repetition rate.
Embodiment 5
Semiconductor laser burst pulse drive circuit as described in Example 1, except that, MOSFET driving chip U4
LDKX outfans connect semiconductor laser negative electrode, semiconductor laser anode connection+VLD power supplys；MOSFET drives
The voltage of the CLX ends stable connection of chip U4.
Embodiment 6
A kind of method of work of the semiconductor laser burst pulse drive circuit as described in embodiment 1-5, including step is such as
Under：
1) CPLD control chips U6 produces pumping signal, and the pumping signal that CPLD control chips U6 is produced is divided into into two-way,
Wherein pumping signal Jing delay chip U9 all the way, but not time delay directly reaches and door chip U7, and another road pumping signal is through prolonging
When chip U10 and time delay enter back into and door chip U7, carry out and narrow arteries and veins exported after computing with the two paths of signals of door chip U7 inputs
Rush trigger；
2) the burst pulse trigger that narrow-pulse generation circuit is produced is used to trigger the switch of MOSFET driving chip U4；When
When burst pulse trigger is low level, MOSFET driving chip U4 path blockades, semiconductor laser does not work；Work as burst pulse
When trigger is high level, the conducting of MOSFET driving chip U4 paths, semiconductor laser normal work.Pulse width and weight
The adjustable burst pulse trigger of complex frequency triggers the switch of MOSFET driving chip U4 so that semiconductor laser produces parameter
Adjustable light pulse signal.
Embodiment 7
The method of work of semiconductor laser burst pulse drive circuit as described in Example 5, except that, CPLD controls
Coremaking piece U6 pumping signals according to needed for the offer of external crystal-controlled oscillation clock division.
Embodiment 8
The method of work of semiconductor laser burst pulse drive circuit as described in Example 5, except that, triggering letter
Number connection MOSFET driving chip U4 ENX inputs, for triggering the switch of MOSFET driving chip U4.
Using semiconductor laser burst pulse drive circuit of the present invention, pulse width can be finally obtained for 538ps-
10ns and continuously adjustable light pulse signal, are as shown in figure 12 to be driven by the semiconductor laser burst pulse described in embodiment
The most narrow 538ps light pulse signal figures that circuit and its method of work are produced.
Claims (8)
1. a kind of semiconductor laser burst pulse drive circuit, it is characterised in that produce including external power source interface circuit, burst pulse
Raw circuit and MOSFET pulse driving circuits；External power source interface circuit is respectively narrow-pulse generation circuit and MOSFET pulses are driven
Galvanic electricity road powers.
2. semiconductor laser burst pulse drive circuit according to claim 1, it is characterised in that the burst pulse is produced
Circuit includes CPLD control chips U6 and door chip U7, crystal oscillator clock U8, delay chip U9, delay chip U10 and level conversion
Chip U11；The MOSFET pulse driving circuits include MOSFET driving chip U4.
3. semiconductor laser burst pulse drive circuit according to claim 2, it is characterised in that the 2 of crystal oscillator clock U8
Number pin connects No. 12 pins of CPLD control chip U6, and No. 1 pin of crystal oscillator clock U8 meets+3.3V power supplys, crystal oscillator clock U8
No. 1 pin be also grounded by electric capacity C13, No. 4 pins of crystal oscillator clock U8 ground connection；
1, No. 3 pins ground connection of electrical level transferring chip U11, No. 2 pins of electrical level transferring chip U11 connect+3.3V power supplys, and level turns
No. 4 pins for changing chip U11 connect No. 26 pins of CPLD control chip U6；10,13, No. 18 of electrical level transferring chip U11 are drawn
Foot parallel connection is followed by+3.3V power supplys；After 10,13, No. 18 pins in parallel of electrical level transferring chip U11 respectively by electric capacity C14, C15,
C16, C17 are grounded；No. 19 pins of electrical level transferring chip U11 connect No. 5 pins of delay chip U10；Electrical level transferring chip U11
No. 20 pins connect delay chip U10 No. 4 pins；19, No. 20 pins of electrical level transferring chip U11 pass through respectively resistance
R14, resistance R13 connect+1.3V power supplys；No. 11 pins of electrical level transferring chip U11 connect No. 5 pins of delay chip U9；Level
No. 12 pins of conversion chip U11 connect No. 4 pins of delay chip U9,11, No. 12 pins difference of electrical level transferring chip U11
+ 1.3V power supplys are connect by resistance R15, resistance R16；
1,2,23,25,26,27,29,30,31, No. 32 pins of delay chip U10 connect respectively CPLD control chip U6 38,
37th, 50,49,48,47,42,41,40, No. 39 pins；3,9,10,11,12,16,24, No. 28 pins of delay chip U10 connect
Ground；No. 8 pins of delay chip U10 are connected by resistance R12 with No. 9 pins of delay chip U10；Delay chip U10 13,
18th, 19, No. 22 pins connect+3.3V power supplys；No. 20 pins connection of delay chip U10 and No. 2 pins of door chip U7；Time delay
No. 21 pins connection of chip U10 and No. 1 pin of door chip U7；20, No. 21 pins of delay chip U10 pass through respectively resistance
R8, resistance R10 connect+1.3V power supplys；
No. 8 pins of delay chip U9 connect No. 9 pins of delay chip U9 by resistance R11；Delay chip U9 9,10,
12nd, 16,24, No. 28 pin ground connection；11,13,18,19, No. 22 pins connection+3.3V power supplys of delay chip U9；Delay chip
No. 20 pins connection of U9 and No. 3 pins of door chip U7；No. 21 pins connection of delay chip U9 is drawn with No. 4 of door chip U7
Foot；20, No. 21 pins of delay chip U9 connect+1.3V power supplys by resistance R7, resistance R9 respectively；
It is grounded with No. 5 pins of door chip U7；It is connected 14,16, the 20 of MOSFET driving chip U4 with No. 6 pins of door chip U7
Port after number pins in parallel；After being connected 15,17, No. 21 pins in parallel of MOSFET driving chips with No. 7 pins of door chip U7
Port；7, No. 6 pins with door chip connect+1.3V power supplys by resistance R5, resistance R6 respectively；Draw with No. 8 of door chip U7
Foot connects+3.3V power supplys；
4,8,10,12,24,26,28, No. 29 pins ground connection of MOSFET driving chip U4；18, the 19 of MOSFET driving chip U4
Number pin connection+5V power supplys；By resistance R3 and adjustable electric after 1,2,3,5,6, No. 7 pins in parallel of MOSFET driving chip U4
The adjustable foot connection of resistance R2, the fixed resistance value end of adjustable resistance R2 connects respectively+5V power supplys and ground connection；MOSFET driving chip U4
1,2,3,5,6, No. 7 pins in parallel after be also grounded by electric capacity C7；15,17, No. 21 pins of MOSFET driving chip U4 are simultaneously
It is connected with one end of resistance R4 after connection, the other end after 14,16, No. 20 pins in parallel of MOSFET driving chip U4 with resistance R4
Connection；Electric capacity C1 is in parallel with electric capacity C2, Zener diode D1 and laser instrument D2 respectively after connecting with resistance R1 to form parallel circuit,
Port after 9,11,13,23,25, No. 27 pins in parallel of MOSFET driving chip U4 is by the parallel circuit connection+VLD
Power supply.
4. semiconductor laser burst pulse drive circuit according to claim 1, it is characterised in that the external power source connects
Mouth circuit includes four interfaces U1, U2, U3 and U5；U1, U2, U3 and U5 introduce respectively+1.3V ,+3.3V ,+the 5V ,+VLD of outside
Power supply；+ 1.3V the power supplys for introducing are grounded after electric capacity C18, the C19 Jing after parallel connection, the electric capacity of+3.3V power supplys of introducing Jing after parallel connection
It is grounded after C10, C11, C12 ,+5V the power supplys of introducing are grounded after electric capacity C8, the C9 Jing after parallel connection, and+VLD power supplys the Jing of introducing is in parallel
It is grounded after electric capacity C3, C4, C5, C6 afterwards.
5. semiconductor laser burst pulse drive circuit according to claim 1, it is characterised in that MOSFET driving chips
The LDKX outfans of U4 connect the negative electrode of semiconductor laser, the anode connection+VLD power supplys of semiconductor laser；MOSFET drives
The voltage of the CLX ends stable connection of dynamic chip U4.
6. a kind of method of work of the semiconductor laser burst pulse drive circuit as described in claim 1-5 any one, it is special
Levy and be, including step is as follows：
1) CPLD control chips U6 produces pumping signal, and the pumping signal that CPLD control chips U6 is produced is divided into into two-way, wherein
Pumping signal Jing delay chip U9, but not time delay all the way is directly reached and door chip U7, and another road pumping signal is through time delay core
Simultaneously time delay is entered back into and door chip U7 piece U10, carries out being touched with output burst pulse after computing with the two paths of signals of door chip U7 inputs
Signal；
2) the burst pulse trigger that narrow-pulse generation circuit is produced is used to trigger the switch of MOSFET driving chip U4；When narrow arteries and veins
Rush trigger for low level when, MOSFET driving chip U4 path blockades, semiconductor laser does not work；When burst pulse triggering
When signal is high level, the conducting of MOSFET driving chip U4 paths, semiconductor laser normal work.
7. the method for work of semiconductor laser burst pulse drive circuit according to claim 6, it is characterised in that CPLD
Control chip U6 pumping signals according to needed for the offer of external crystal-controlled oscillation clock division.
8. the method for work of semiconductor laser burst pulse drive circuit according to claim 6, it is characterised in that triggering
Signal connects the ENX inputs of MOSFET driving chip U4, for triggering the switch of MOSFET driving chip U4.
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| CN107356937A (en) * | 2017-08-25 | 2017-11-17 | 长春德信光电技术有限公司 | A kind of walking robot collision warning device based on Laser Detection Technique |
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| CN108321676A (en) * | 2018-01-25 | 2018-07-24 | 燕山大学 | Semiconductor laser pulse power Weak current pretrigger method |
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Application publication date: 20170510 |