CN106653869A - Power diode - Google Patents
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- CN106653869A CN106653869A CN201611155764.3A CN201611155764A CN106653869A CN 106653869 A CN106653869 A CN 106653869A CN 201611155764 A CN201611155764 A CN 201611155764A CN 106653869 A CN106653869 A CN 106653869A
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- 229910052751 metal Inorganic materials 0.000 claims abstract description 45
- 239000002184 metal Substances 0.000 claims abstract description 45
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 239000011159 matrix material Substances 0.000 claims description 45
- 239000000463 material Substances 0.000 claims description 9
- 229910018594 Si-Cu Inorganic materials 0.000 claims description 4
- 229910008465 Si—Cu Inorganic materials 0.000 claims description 4
- VDGJOQCBCPGFFD-UHFFFAOYSA-N oxygen(2-) silicon(4+) titanium(4+) Chemical compound [Si+4].[O-2].[O-2].[Ti+4] VDGJOQCBCPGFFD-UHFFFAOYSA-N 0.000 claims 1
- 238000011084 recovery Methods 0.000 abstract description 14
- 238000000034 method Methods 0.000 description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 11
- 230000008569 process Effects 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 6
- 235000012239 silicon dioxide Nutrition 0.000 description 6
- 239000000377 silicon dioxide Substances 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000000969 carrier Substances 0.000 description 3
- 230000000875 corresponding effect Effects 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 229910018182 Al—Cu Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 229910018125 Al-Si Inorganic materials 0.000 description 1
- 229910018520 Al—Si Inorganic materials 0.000 description 1
- 241000790917 Dioxys <bee> Species 0.000 description 1
- 229910003978 SiClx Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- HIVGXUNKSAJJDN-UHFFFAOYSA-N [Si].[P] Chemical compound [Si].[P] HIVGXUNKSAJJDN-UHFFFAOYSA-N 0.000 description 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000002372 labelling Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000005360 phosphosilicate glass Substances 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 241000894007 species Species 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
Abstract
The invention provides a power diode. The power diode comprises an N-type substrate, at least two P-type doped regions, N-type doped regions and metal layers, wherein the P-type doped regions are arranged in the N-type substrate at intervals; the N-type doped regions are arranged on the surfaces, far away from the N-type substrate, of the P-type doped regions; the metal layers are arranged on the surfaces, far away from the N-type substrate, of the N-type doped regions; and the metal layers and the P-type doped regions are arranged in an isolated manner. The power diode has good reverse recovery and high reverse voltage.
Description
Technical field
The application is related to power semiconductor power diode, in particular to a kind of power diode.
Background technology
With the development of high power electronic power diode, high-voltage diode is increasingly becoming one in applied power electronics
Core parts.The high-voltage diode species that existing market is adopted mainly has high pressure PN junction diode, Schottky-barrier diode
With high pressure JBS diodes.
The structural representation of high pressure PN junction diode is shown in Fig. 1, and the high pressure PN junction diode is from the bottom to top successively including N+ linings
Bottom 01, N- epitaxial layers 02, P+ layers 03 and metal level 04.But the characteristics of this high pressure PN junction diode, is high pressure reversely extensive
Multiple poor-performing.When the power diode adds backward voltage, due to the presence of a large amount of minority carriers, need these minorities
Carrier depletion falls or neutralizes, and high pressure PN junction diode could be caused reversely to end.Due to these minority carriers being disappeared
It is a time-consuming process to consume or neutralize, therefore, reverse current increases to maximum to the process for being reduced to minima
Than relatively time-consuming, i.e. the reverse recovery time of high pressure PN junction diode is longer, and Reverse recovery speed is slow, power diode it is reverse extensive
Multiple poor performance.
A kind of structure such as Fig. 2 of existing Schottky-barrier diode (SchottkyBarrier Diode, abbreviation SBD)
It is shown.The power diode includes successively from the bottom to top stacked N+ substrates 01, N- epitaxial layers 02 and metal level 04.This Xiao
Special base barrier diode is to touch the metal -- semiconductor Schottky knot for being formed with partly connecting using metal, because it is in forward conduction
When, there is no the note people of minority carrier, therefore, when reverse biased is added, there is no consumption or neutralize a large amount of minority carriers
The process of son, therefore, the Reverse recovery speed of the power diode is fast, has the advantages that switching speed is fast, but the power two
The disadvantage of pole pipe is that backward voltage is very low, and the general manufacture reversed bias voltage that is difficult is in the pole of Schottky barrier two of more than 300V
Pipe.
A kind of structure of existing high pressure JBS diodes is as shown in figure 3, the power diode is included outside N+ substrates 01, N-
Prolong layer 02, P+ layers 03 and metal level 04.The JBS diodes introduce a PN junction in original Schottky-barrier diode
Commutation diode protecting Schottky barrier, although it solves the problems, such as that the backward voltage of Schottky-barrier diode is low,
It is, due to the presence of minority carrier in PN junction commutation diode, also to cause its reverse recovery characteristic poor.
The content of the invention
The main purpose of the application is to provide a kind of power diode, to solve power diode of the prior art not
The Reverse recovery having concurrently and the problem of high backward voltage.
To achieve these goals, according to the one side of the application, there is provided a kind of power diode, the pole of power two
Pipe includes：N-type matrix；At least two p-type doped regions, in being disposed on above-mentioned N-type matrix；N-type doping area, is arranged on each
State on the surface away from above-mentioned N-type matrix of p-type doped region；Metal level, be arranged on above-mentioned n-type doping area away from above-mentioned N-type
On the surface of matrix, wherein, above-mentioned metal level isolates setting with each aforementioned p-type doped region.
Further, above-mentioned power diode includes at least two above-mentioned n-type doping areas, and each above-mentioned n-type doping area is arranged
In above-mentioned N-type matrix and with aforementioned p-type doped region correspond arrange, and each above-mentioned n-type doping area away from each aforementioned p-type
The surface of doped region is concordant with the flat surface of above-mentioned N-type matrix.
Further, first surface is the surface vertical with the thickness direction of above-mentioned N-type matrix, each above-mentioned n-type doping area
Projection on above-mentioned first surface is located at the inside of projection of the corresponding aforementioned p-type doped region on above-mentioned first surface, and
Above-mentioned power diode also includes：At least four dielectric areas, each above-mentioned dielectric area covers the close metal of each aforementioned p-type doped region
The surface of layer is arranged and for isolating each aforementioned p-type doped region and above-mentioned metal level.
Further, above-mentioned N-type matrix includes：N+ substrate layers；N- epitaxial layers, are arranged on the surface of above-mentioned N+ substrate layers
On, and aforementioned p-type doped region is arranged in above-mentioned N- epitaxial layers and away from above-mentioned N+ substrate layers.
Further, aforementioned p-type doped region is P+ doped regions.
Further, above-mentioned n-type doping area is N+ doped regions.
Further, the material of above-mentioned dielectric area includes silicon dioxide.
Further, the material of above-mentioned metal level is included for Al-Cu and/or Al-Si-Cu.
Using the technical scheme of the application, in positive work, i.e., metal level adds malleation, N-type matrix to the power diode
Plus negative pressure, now, two PN junctions do not work, and in work, such minority carrier is not involved in work to only Schottky diode,
And then cause, in reverse operation, there is no the process that minority carrier is neutralized or consumed, and then cause the pole of power two
The Reverse recovery speed of pipe is fast, Reverse recovery better performances.
In reverse operation, i.e., metal level adds negative pressure, N-type matrix to add malleation to the power diode, p-type in power diode
The PN junction diode reverse bias that doped region is formed with N-type matrix, it is reversely inclined that metal level forms Schottky diode with N-type matrix
Put, formed depletion region, and when it is reverse-biased to certain voltage when, the depletion region of p-type doped region both sides links together, by Schottky electricity
Stream raceway groove pinch off, backward voltage is not undertaken by Schottky diode, the pole of PN junction two for only being formed by p-type doped region and N-type matrix
Pipe undertakes, so that it is guaranteed that power diode can work under very high reverse bias voltage.
Description of the drawings
The Figure of description for constituting the part of the application is used for providing further understanding of the present application, and the application's shows
Meaning property embodiment and its illustrated for explaining the application, does not constitute the improper restriction to the application.In the accompanying drawings：
Fig. 1 shows the structural representation of high pressure PN junction diode of the prior art；
Fig. 2 shows the structural representation of Schottky-barrier diode of the prior art；
Fig. 3 shows the structural representation of high pressure JBS diodes of the prior art；And
Fig. 4 shows a kind of structural representation of the power diode of embodiment of the application.
Wherein, above-mentioned accompanying drawing includes the following drawings labelling：
01st, N+ substrates；02nd, N- epitaxial layers；03rd, P+ layers；04th, metal level；10th, N-type matrix；20th, p-type doped region；30、N
Type doped region；40th, dielectric area；50th, metal level；11st, N+ substrate layers；12nd, N- epitaxial layers.
Specific embodiment
It is noted that described further below is all exemplary, it is intended to provide further instruction to the application.Unless another
Indicate, all technologies used herein and scientific terminology are with usual with the application person of an ordinary skill in the technical field
The identical meanings of understanding.
It should be noted that term used herein above is merely to describe specific embodiment, and be not intended to restricted root
According to the illustrative embodiments of the application.As used herein, unless the context clearly indicates otherwise, otherwise singulative
It is also intended to include plural form, additionally, it should be understood that, when in this manual using term "comprising" and/or " bag
Include " when, it indicates existing characteristics, step, operation, power diode, component and/or combinations thereof.
As background technology is introduced, Reverse recovery and height that power diode of the prior art does not have concurrently
Backward voltage, in order to solve technical problem as above, present applicant proposes a kind of power diode.
In a kind of typical embodiment of the application, there is provided a kind of power diode, as shown in figure 4, the power two
Pole pipe includes N-type matrix 10, at least two p-type doped regions 20, n-type doping area 30 and metal level 50.Wherein, at least two
State p-type doped region 20 to be disposed in above-mentioned N-type matrix 10；N-type doping area 30 is arranged on the remote of each aforementioned p-type doped region 20
On the surface of above-mentioned N-type matrix 10；Metal level 50 is arranged on the table away from above-mentioned N-type matrix 10 in above-mentioned n-type doping area 30
On face, wherein, above-mentioned metal level 50 isolates setting with each aforementioned p-type doped region 20.
In positive work, i.e., metal level adds malleation, N-type matrix to add negative pressure to the power diode, due to metal level with it is each
The isolation of individual p-type doped region is arranged, thus two PN junctions forward conduction, i.e. minority carrier are not involved in work, only Xiao Te
Based diode causes, in reverse operation, there is no the process that minority carrier is neutralized or consumed in work, and then
So that the Reverse recovery speed of the power diode is fast, Reverse recovery better performances.
In reverse operation, i.e., metal level adds negative pressure, N-type matrix to add malleation to the power diode, p-type in power diode
The PN junction diode reverse bias that doped region is formed with N-type matrix, it is reversely inclined that metal level forms Schottky diode with N-type matrix
Put, formed depletion region, and when it is reverse-biased to certain voltage when, the depletion region of p-type doped region both sides links together, by Schottky electricity
Stream raceway groove pinch off, backward voltage is not undertaken by Schottky diode, the pole of PN junction two for only being formed by p-type doped region and N-type matrix
Pipe undertakes, so that it is guaranteed that power diode can work under very high reverse bias voltage.
But above-mentioned n-type doping area is not limited to the structure of Fig. 4, those skilled in the art can be according to practical situation by N
Type doped region is arranged on the surface of p-type doped region and realizes corresponding effect.For example, n-type doping area is arranged on into N-type
In matrix, and projection of the n-type doping area with p-type doped region on the first surface can be completely superposed, and first surface is and above-mentioned N
The vertical surface of the thickness direction of mold base.
In a kind of embodiment of the application, as shown in figure 4, above-mentioned power diode includes at least two above-mentioned n-type dopings
Area 30, each above-mentioned n-type doping area 30 is arranged on above-mentioned N-type matrix 10 and corresponds with aforementioned p-type doped region 20 and arranges, and on
The flat surface on the surface away from each aforementioned p-type doped region 20 and above-mentioned N-type matrix 10 of stating each above-mentioned n-type doping area 30 is put down
Together.The power diode of this spline structure is more easy to prepare.
In order to further ensure that the realizability of preparation technology, it is ensured that the power diode for preparing has preferable work(
Rate diode characteristic, in a kind of embodiment of the application, as shown in figure 4, the thickness direction of first surface and above-mentioned N-type matrix 10
Vertical surface, projection of each above-mentioned n-type doping area 30 on above-mentioned first surface exists positioned at corresponding aforementioned p-type doped region 20
The inside of the projection on above-mentioned first surface, and above-mentioned power diode also includes at least four dielectric areas 40, each above-mentioned medium
Area 40 cover the close metal level of each aforementioned p-type doped region 20 surface arrange and for isolate each aforementioned p-type doped region 20 with
Above-mentioned metal level 50.In the power diode, because dielectric area 40 covers the surface of the close metal level 50 of p-type doped region 20,
And then power diode is positive work when, due to the presence in dielectric area 40 and n-type doping area 30 so that p-type doped region 20 with
Metal level 50 is isolated.
In another kind of embodiment of the application, as shown in figure 4, above-mentioned N-type matrix 10 includes：N+ substrate layers 11 and N- extensions
Layer 12, wherein, N- epitaxial layers 12 are arranged on the surface of above-mentioned N+ substrate layers 11, and aforementioned p-type doped region 20 is mixed with above-mentioned N-type
Miscellaneous area 30 is arranged in above-mentioned N- epitaxial layers 12 and away from above-mentioned N+ substrate layers 11.In the positive work of power diode, metal
The Schottky diode work that layer is formed with N- epitaxial layers, when power diode reverse operation, p-type doped region and N- epitaxial layers
The PN junction diode reverse operation of formation forms depletion region, the reverse work of Schottky diode that metal level is formed with N- epitaxial layers
Make.
In order to further ensure that the power diode has larger depleted region in N-type matrix, so as to further protect
Depletion region in the N-type matrix of the p-type doped region both sides for demonstrate,proving the power diode quickly links together, one kind of the application
In embodiment, aforementioned p-type doped region 20 is P+ doped regions.
In the case of without specified otherwise, the "+" in P+, N+ and N- and "-" in the application represents respectively heavily doped
It is miscellaneous be lightly doped, P+ represents p-type heavy doping, and N+ represents N-type heavy doping, and N- represents that N-type is lightly doped.
In the another embodiment of the application, above-mentioned n-type doping area 30 is N+ doped regions.
Dielectric area in the application can be that any material is formed, and for example, the material of the dielectric area can include nitridation
Silicon and silicon dioxide, it is also possible to only include silicon dioxide, can also be PSG (Phospho-Silicate-Glass, abbreviation phosphorus silicon
Glass) or BPSG (Boro-Phospho-Silicate-Glass, abbreviation boron-phosphorosilicate glass).
Those skilled in the art can select suitable material to form dielectric area according to practical situation.In order to be further ensured that
The dielectric area of formation has preferable isolation effect, and in a kind of embodiment of the application, the material of above-mentioned dielectric area includes dioxy
SiClx.
In order to simplify the formation process of dielectric area, in a kind of embodiment of the application, above-mentioned dielectric area is silicon dioxide
Dielectric area.
Metal level in the application can be the metal level in any Schottky diode of the prior art, for example can be with
It is Al-Si-Cu, or Al-Si, can also be Al-Cu, can also be the metal level that arbitrarily several metal mixeds are formed.
Those skilled in the art can select suitable material to form metal level according to practical situation.
The processing technology of the power diode in the application adopts technique of the prior art, with the structure shown in Fig. 4
As a example by illustrating the concrete manufacture method of the power diode of the application.
The processing technology of power diode includes：
First, N-type matrix 10 is made.
In the surface Epitaxial growth N- epitaxial layer 12 of N+ substrate layers 11, N-type matrix 10 is formed.
Secondly, p-type doped region 20 is formed.
P-type doped region 20 is formed in N-type matrix 10 by the propulsion of photoetching, etching, ion implantation and diffusion furnace.
Again, n-type doping area 30 and dielectric area are formed.
Using the silicon dioxide of diffusion furnace growth in the forming process of p-type doped region 20, by photoetching, etching, N+ ions note
Enter and the technique such as diffusion furnace propulsion, form n-type doping area 30 as shown in Figure 4 and dielectric area 40.
Finally, on the exposed surface of dielectric area 40, on the exposed surface of N- epitaxial layers 12 and n-type doping area 30 it is naked
Sputtering on dew surface is formed and arranges Al-Si-Cu metal levels.
As can be seen from the above description, the application the above embodiments realize following technique effect：
In positive work, i.e., metal level adds malleation, N-type matrix to add negative pressure to the power diode of the application, now, two
PN junction does not work, and in work, such minority carrier is not involved in work to only Schottky diode, and then causes in reverse work
When making, there is no the process that minority carrier is neutralized or consumed, and then cause the Reverse recovery speed of the power diode
Hurry up, Reverse recovery better performances.
In reverse operation, i.e., metal level adds negative pressure, N-type matrix to add malleation to the power diode, p-type in power diode
The PN junction diode reverse bias that doped region is formed with N-type matrix, it is reversely inclined that metal level forms Schottky diode with N-type matrix
Put, formed depletion region, and when it is reverse-biased to certain voltage when, the depletion region of p-type doped region both sides links together, by Schottky electricity
Stream raceway groove pinch off, backward voltage is not undertaken by Schottky diode, the pole of PN junction two for only being formed by p-type doped region and N-type matrix
Pipe undertakes, so that it is guaranteed that power diode can work under very high reverse bias voltage, its reversely it is pressure can reach 600V,
1200V even more high voltages, and then cause the power diode that not only there is preferable reverse recovery characteristic can also bear very high
Reverse biased.
The preferred embodiment of the application is the foregoing is only, the application is not limited to, for the skill of this area
For art personnel, the application can have various modifications and variations.It is all within spirit herein and principle, made any repair
Change, equivalent, improvement etc., should be included within the protection domain of the application.
Claims (8)
1. a kind of power diode, it is characterised in that the power diode includes：
N-type matrix (10)；
At least two p-type doped regions (20), in being disposed on the N-type matrix (10)；
N-type doping area (30), is arranged on the surface away from the N-type matrix (10) of each p-type doped region (20)；And
Metal level (50), is arranged on the surface away from the N-type matrix (10) of the n-type doping area (30), wherein, it is described
Metal level (50) isolates setting with each p-type doped region (20).
2. power diode according to claim 1, it is characterised in that the power diode is included described at least two
N-type doping area (30), each n-type doping area (30) be arranged in the N-type matrix (10) and with the p-type doped region (20)
Correspond and arrange, and the surface away from each p-type doped region (20) and the N-type base of each n-type doping area (30)
The flat surface of body (10) is concordant.
3. power diode according to claim 2, it is characterised in that first surface is and the N-type matrix (10)
The vertical surface of thickness direction, each n-type doping area (30) projection on the first surface is located at the corresponding p-type
The inside of doped region (20) projection on the first surface, and the power diode also includes：
At least four dielectric areas (40), each dielectric area (40) covers the close metal level of each p-type doped region (20)
Surface is arranged and for isolating each p-type doped region (20) and the metal level (50).
4. power diode according to claim 1, it is characterised in that the N-type matrix (10) includes：
N+ substrate layers (11)；And
N- epitaxial layers (12), are arranged on the surface of the N+ substrate layers (11), and the p-type doped region (20) be arranged on it is described
In N- epitaxial layers (12) and away from the N+ substrate layers (11).
5. power diode according to claim 1, it is characterised in that the p-type doped region (20) is P+ doped regions.
6. power diode according to claim 1, it is characterised in that the n-type doping area (30) is N+ doped regions.
7. power diode according to claim 3, it is characterised in that the material of the dielectric area (40) includes titanium dioxide
Silicon.
8. power diode according to claim 1, it is characterised in that the material of the metal level (50) is included for Al-
Cu and/or Al-Si-Cu.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611155764.3A CN106653869A (en) | 2016-12-14 | 2016-12-14 | Power diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611155764.3A CN106653869A (en) | 2016-12-14 | 2016-12-14 | Power diode |
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| Publication Number | Publication Date |
|---|---|
| CN106653869A true CN106653869A (en) | 2017-05-10 |
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ID=58822080
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| CN201611155764.3A Pending CN106653869A (en) | 2016-12-14 | 2016-12-14 | Power diode |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116072708A (en) * | 2023-03-07 | 2023-05-05 | 青岛嘉展力芯半导体有限责任公司 | Diode, preparation method thereof and electronic device |
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| US20130105820A1 (en) * | 2011-10-31 | 2013-05-02 | Hitachi, Ltd. | Trench type schottky junction semiconductor device and manufacturing method thereof |
| CN102412268A (en) * | 2011-12-06 | 2012-04-11 | 绍兴旭昌科技企业有限公司 | Flat-type one-way trigger diode chip and manufacturing method thereof |
| CN102789979A (en) * | 2012-08-22 | 2012-11-21 | 上海宏力半导体制造有限公司 | Schottky diode and method of formation of Schottky diode |
| CN103413836A (en) * | 2013-05-27 | 2013-11-27 | 上海恺创电子有限公司 | Trench gate Schottky barrier diode |
| CN204088329U (en) * | 2014-05-30 | 2015-01-07 | 杭州士兰集成电路有限公司 | Bidirectional trigger diode chip |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116072708A (en) * | 2023-03-07 | 2023-05-05 | 青岛嘉展力芯半导体有限责任公司 | Diode, preparation method thereof and electronic device |
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