CN106653684A - Three-dimensional memory and formation method of channel pore structure thereof - Google Patents

Three-dimensional memory and formation method of channel pore structure thereof Download PDF

Info

Publication number
CN106653684A
CN106653684A CN201710134783.6A CN201710134783A CN106653684A CN 106653684 A CN106653684 A CN 106653684A CN 201710134783 A CN201710134783 A CN 201710134783A CN 106653684 A CN106653684 A CN 106653684A
Authority
CN
China
Prior art keywords
layer
hole
channel
area
side wall
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201710134783.6A
Other languages
Chinese (zh)
Other versions
CN106653684B (en
Inventor
吕震宇
施文广
吴关平
潘锋
万先进
陈保友
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yangtze Memory Technologies Co Ltd
Original Assignee
Yangtze Memory Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yangtze Memory Technologies Co Ltd filed Critical Yangtze Memory Technologies Co Ltd
Priority to CN201710134783.6A priority Critical patent/CN106653684B/en
Priority to CN201910114048.8A priority patent/CN109920790B/en
Publication of CN106653684A publication Critical patent/CN106653684A/en
Priority to JP2019570608A priority patent/JP6978643B2/en
Priority to KR1020217020259A priority patent/KR102439554B1/en
Priority to PCT/CN2018/077785 priority patent/WO2018161846A1/en
Priority to CN201880009111.5A priority patent/CN110313061B/en
Priority to CN202010655153.5A priority patent/CN111933576B/en
Priority to KR1020197029465A priority patent/KR102273416B1/en
Priority to TW107107700A priority patent/TWI665786B/en
Priority to US16/046,847 priority patent/US10886291B2/en
Application granted granted Critical
Publication of CN106653684B publication Critical patent/CN106653684B/en
Priority to US16/951,141 priority patent/US11482532B2/en
Priority to US17/934,161 priority patent/US11956953B2/en
Priority to US18/431,112 priority patent/US20240188291A1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Abstract

The embodiment of the invention discloses a three-dimensional memory and a formation method of a channel pore structure thereof. According to the method, the channel pore structure in the three-dimensional memory is formed through a twice through-hole formation technology of a first through hole and a second through hole, so that the process difficulty and cost of the channel pore structure are greatly reduced, the problems of high process difficulty and high cost caused by ultrahigh through hole depth-to-width ratio under the same caliber are solved, and meanwhile the manufacturing process difficulty and cost of the three-dimensional memory are also reduced.

Description

The forming method of three-dimensional storage and its channel pore structure
Technical field
The present invention relates to three-dimensional storage technical field, more particularly to the shape of a kind of three-dimensional storage and its channel pore structure Into method.
Background technology
With the stacking number of ON (Oxide/Nitride) in three-dimensional storage (such as 3D NAND) it is more and more so that The depth of the access opening formed in three-dimensional storage is increasing, and when access opening is formed using single etching technics, identical In the case of aperture, the bigger etching difficulty of depth of access opening is bigger.Especially, when the layer number in three-dimensional storage reaches 120 and during the above, then using single etching method formed through the access opening of each lamination when, there is etch period and be exponentially increased Phenomenon, process efficiency is relatively low, relatively costly.
The content of the invention
To solve above-mentioned technical problem, the shape of a kind of three-dimensional storage and its channel pore structure is embodiments provided Into method, to reduce three-dimensional storage in channel pore structure technology difficulty and cost.
To solve the above problems, following technical scheme is embodiments provided：
A kind of forming method of channel pore structure in three-dimensional storage, the method includes：
Substrate is provided, the substrate surface is formed with the first stack layer and the first insulation connecting layer, first stack layer It is made up of the oxide layer and nitration case of multiple staggeredly superpositions；
Formed completely through first stack layer and first insulation connecting layer, and extended in the substrate surface First through hole；
The substrate surface exposed to the open air in first through hole forms first passage structure；
In the first through hole side, wall forms the first functional layer；
Second channel structure is formed in the first functional layer side wall and the first passage body structure surface, described second leads to The surface of road structure is less than the first insulation connecting layer surface；
The first groove is formed in first insulation connecting layer, first groove projection on the substrate is complete Cover first through hole projection on the substrate；
Third channel structure, the third channel structure and the second channel structure phase are formed in first groove Contact；
The second stack layer and the second insulation connecting layer are sequentially formed away from the substrate side in the third channel structure, Second stack layer is made up of the oxide layer and nitration case of multiple staggeredly superpositions；
Formed completely through second stack layer and second insulation connecting layer, and extend to the third channel knot The second through hole in structure surface, second through hole projection on the substrate and the first through hole are on the substrate Projection is at least partly overlapping；
The second functional layer is formed in second through-hole side wall；
The second channel structure, the third channel structure and second protective layer, first protective layer are removed, Form the third through-hole that the first through hole is connected with second through hole；
Fourth lane structure and the first interstitital texture are sequentially formed in third through-hole side wall and bottom, described first fills out Fill the surface of the surface less than the fourth lane structure of structure；
Five-channel structure is formed in the second groove that the fourth lane structure is formed with first interstitital texture, The Five-channel structure contacts with the fourth lane structure.
Optionally, forming the first functional layer in first through hole side wall includes：
The first tunnel layer is formed in the side wall of the first through hole and the surface of the first passage structure, for producing electricity Lotus；
The first accumulation layer is formed in the first tunnelling layer surface, for storing electric charge；
Described first storage layer surface formed the first barrier layer, for stopping first accumulation layer in electric charge stream Go out；
The first protective layer is formed in first barrier layer surface, for protecting first barrier layer to remove work follow-up Do not sustain damage in skill；
First protective layer, the first barrier layer, first accumulation layer and first tunnel layer are removed positioned at described The part of first passage body structure surface, forms the first functional layer.
Optionally, second channel structure, institute are formed in the first functional layer side wall and the first passage body structure surface State the surface of second channel structure includes less than the first insulation connecting layer surface：
Formed and cover the second of the first protective layer side wall, the first through hole bottom and the first insulation connecting layer surface Channel layer；
Remove the part second channel layer so that the second channel layer surface is less than first insulation connecting layer, Form second channel structure.
Optionally, forming the second functional layer in second through-hole side wall includes：
The second tunnel layer is formed in the side wall of second through hole and the surface of the second channel structure, for producing electricity Lotus；
The second accumulation layer is formed in the second tunnelling layer surface, for storing electric charge；
Described second storage layer surface formed the second barrier layer, for stopping second accumulation layer in electric charge stream Go out；
The second protective layer is formed in second barrier layer surface, for protecting second barrier layer to remove work follow-up Do not sustain damage in skill；
Remove second protective layer, the second barrier layer, second accumulation layer and second tunnel layer and described Two channel designs are located at the part of second via bottoms, the second functional layer are formed, while so that second through hole and institute First through hole is stated to connection.
Optionally, fourth lane structure and the first interstitital texture, institute are sequentially formed in third through-hole side wall and bottom State the surface of the first interstitital texture includes less than the surface of the fourth lane structure：
Fourth lane layer is formed in third through-hole side wall and bottom and the first insulation connecting layer surface；
The first packed layer for covering the fourth lane layer is formed in the fourth lane layer surface；
Remove part first packed layer so that the surface of first packed layer is less than first insulation connecting layer Surface, formed the first interstitital texture；
The part that the part fourth lane layer is located at the first insulation connecting layer surface is removed, retains the threeway The part of hole side wall, forms fourth lane structure, and the bottom of the fourth lane structure directly connects with the first passage structure Touch, the surface of the fourth lane structure is higher than the surface of first interstitital texture.
A kind of three-dimensional storage, including：
Substrate, the substrate surface is formed with the first stack layer and the first insulation connecting layer, and first stack layer is by more The oxide layer and nitration case of individual staggeredly superposition is constituted；
Through first stack layer and first insulation connecting layer, and first extended in the substrate surface is led to Hole；
It is formed at the first passage structure of the substrate surface that first through hole exposes to the open air；
It is formed at the first functional layer of first through hole side wall；
It is sequentially formed in second stack layer and second insulation company of first insulation connecting layer away from the substrate side Layer is connect, second stack layer is made up of the oxide layer and nitration case of multiple staggeredly superpositions；
Through second stack layer and second insulation connecting layer, and extend to what is be connected with the first through hole Second through hole, the first through hole and second through hole constitute third through-hole；
It is formed at the second functional layer of second through-hole side wall；
It is sequentially formed in the fourth lane structure and the first interstitital texture of third through-hole side wall and bottom, the described 4th Channel design contacts with the first passage structure, and the surface of second interstitital texture is less than the fourth lane structural table Face；
The Five-channel knot being formed in the second groove that the fourth lane structure and first interstitital texture are formed Structure, the Five-channel structure contacts with the fourth lane structure.
A kind of forming method of channel pore structure in three-dimensional storage, the three-dimensional storage includes being arranged along word-line direction First area, second area and the 3rd region, wherein, the first area is used to form channel pore structure, the 3rd area Domain is used to form insulation ring structure, and the method includes：
Substrate is provided, the substrate surface is formed with the first stack layer and the first insulation connecting layer, first stack layer It is made up of the oxide layer and nitration case of multiple staggeredly superpositions；
Formed completely through first stack layer in the first area, the second area and the 3rd region and First insulation connecting layer, and extend to the first through hole in the substrate surface；
The substrate surface exposed to the open air in first through hole forms first passage structure；
In the first through hole side, wall forms the first functional layer；
Second channel structure is formed in the first functional layer side wall and the first passage body structure surface, described second leads to The surface of road structure is less than the first insulation connecting layer surface；
The first groove is formed in first insulation connecting layer, first groove projection on the substrate is complete Cover first through hole projection on the substrate；
Third channel structure, the third channel structure and the second channel structure phase are formed in first groove Contact；
The second stack layer and the second insulation connecting layer are sequentially formed away from the substrate side in the third channel structure, Second stack layer is made up of the oxide layer and nitration case of multiple staggeredly superpositions；
Formed completely through second stack layer in the first area, the second area and the 3rd region and Second insulation connecting layer, and the second through hole in the third channel body structure surface is extended to, second through hole is in institute State projection of the projection in substrate with the first through hole on the substrate at least partly to overlap；
The second functional layer is formed in second through-hole side wall；
The second channel structure, the third channel structure and second protective layer, first protective layer are removed, Form the third through-hole that the first through hole is connected with second through hole；
In the side wall and bottom formation fourth lane structure of the third through-hole positioned at the first area, and described first First interstitital texture is formed on region, the corresponding third through-hole side wall of the second area and the 3rd region and bottom, Surface of the surface of first interstitital texture less than the fourth lane structure；
Five-channel structure is formed in the second groove that the fourth lane structure and first interstitital texture are formed, The Five-channel structure contacts with the fourth lane structure.
Optionally, forming the first functional layer in first through hole side wall includes：
The first tunnel layer is formed in the side wall of the first through hole and the surface of the first passage structure, for producing electricity Lotus；
The first accumulation layer is formed in the first tunnelling layer surface, for storing electric charge；
Described first storage layer surface formed the first barrier layer, for stopping first accumulation layer in electric charge stream Go out；
The first protective layer is formed in first barrier layer surface, for protecting first barrier layer to remove work follow-up Do not sustain damage in skill；
First protective layer, the first barrier layer, first accumulation layer and first tunnel layer are removed positioned at described The part of first passage body structure surface, forms the first functional layer.
Optionally, second channel structure, institute are formed in the first functional layer side wall and the first passage body structure surface State the surface of second channel structure includes less than the first insulation connecting layer surface：
Formed and cover the second of the first protective layer side wall, the first through hole bottom and the first insulation connecting layer surface Channel layer；
Remove the part second channel layer so that the second channel layer surface is less than first insulation connecting layer, Form second channel structure.
Optionally, forming the second functional layer in second through-hole side wall includes：
The second tunnel layer is formed in the side wall and second via bottoms of second through hole, for producing electric charge；
The second accumulation layer is formed in the second tunnelling layer surface, for storing electric charge；
Described second storage layer surface formed the second barrier layer, for stopping second accumulation layer in electric charge stream Go out；
The second protective layer is formed in second barrier layer surface, for protecting second barrier layer to remove work follow-up Do not sustain damage in skill；
Remove second protective layer, the second barrier layer, second accumulation layer, second tunnel layer and the described 3rd Channel design be located at second via bottoms part, formed the second functional layer, while so that second through hole with it is described First through hole is connected.
Optionally, in the side wall and bottom formation fourth lane structure of the third through-hole positioned at the first area, and The first area, the corresponding third through-hole side wall of the second area and the 3rd region and bottom form first and fill out Structure is filled, the surface of first interstitital texture includes less than the surface of the fourth lane structure：
Formed in the first area, the second area and the 3rd region and cover third through-hole side wall and bottom Portion and the fourth lane layer on the first insulation connecting layer surface；
Formed in the first area, the second area and the 3rd region and cover the second of the fourth lane layer Packed layer, second packed layer has the air gap；
The 3rd mask layer is formed on the surface of second packed layer correspondence first area；
With the 3rd mask layer as mask, remove second packed layer and be located at the second area and the 3rd area The part in domain；
Remove the 3rd mask layer；
The part of the first area is located at as mask with second packed layer, the fourth lane layer is removed and is located at institute The part in second area and the 3rd region is stated, in the second area and the 3rd region fourth hole is formed；
The 3rd packed layer is formed in fourth hole side wall and bottom, it is exhausted that the 3rd packed layer also covers described first Edge articulamentum is located at the surface in the second area and the 3rd region, and the filling capacity of the 3rd packed layer is better than described The filling capacity of the second packed layer；
Second packed layer and the 3rd packed layer are performed etching, second packed layer is removed and is located at described the The part in one region, is formed in the first area and forms fifth hole；
The first packed layer for covering the fourth hole and the fifth hole is formed, first packed layer also covers institute State the first insulation connecting layer surface；
Remove part first packed layer so that the surface of first packed layer is less than first insulation connecting layer Surface, formed the first interstitital texture；
Part of the fourth lane layer positioned at the first insulation connecting layer surface is removed, retains the third through-hole side The part of wall, forms fourth lane structure, the bottom of the fourth lane structure and the first passage structure directly contact, institute State the surface of the surface higher than first interstitital texture of fourth lane structure.
A kind of three-dimensional storage, the three-dimensional storage include along word-line direction arrangement first area, second area and 3rd region, wherein, the first area is used to form channel pore structure, and the 3rd region is used to form insulation ring structure, Edge includes perpendicular to the three-dimensional storage surface direction：
Substrate, the substrate surface is formed with the first stack layer and the first insulation connecting layer, and first stack layer is by more The oxide layer and nitration case of individual staggeredly superposition is constituted；
In the first area, the second area and the 3rd region, through first stack layer and described One insulation connecting layer, and extend to the first through hole in the substrate surface；
It is formed in the first passage structure of the substrate surface that first through hole exposes to the open air；
It is formed in the first functional layer of first through hole side wall；
It is sequentially formed at second stack layer and second insulation company of first insulation connecting layer away from the substrate side Layer is connect, second stack layer is made up of the oxide layer and nitration case of multiple staggeredly superpositions；
In the first area, the second area and the 3rd region, through second stack layer and described Two insulation connecting layers, and the second through hole being connected with the first through hole is extended to, the first through hole and described second is led to Hole constitutes third through-hole；
It is formed in the second functional layer of second through-hole side wall；
The side wall of the third through-hole of the first area and the fourth lane structure of bottom are formed in, and are formed in described First filling knot is formed on first area, the corresponding third through-hole side wall of the second area and the 3rd region and bottom Structure, the surface of first interstitital texture is less than the surface of the fourth lane structure；
The Five-channel knot being formed in the second groove that the fourth lane structure and first interstitital texture are formed Structure, the Five-channel structure contacts with the fourth lane structure.
Compared with prior art, above-mentioned technical proposal has advantages below：
The forming method of the channel pore structure of the three-dimensional storage that the embodiment of the present invention is provided, by first through hole and Channel pore structure of two through holes during twice through hole formation process is to form the three-dimensional storage, greatly reduces the access opening The technology difficulty and cost of structure, solves under identical bore, and technology difficulty is big caused by through hole depth-to-width ratio is excessive and cost High problem, while also reducing the manufacture craft difficulty and cost of the three-dimensional storage.
Description of the drawings
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing The accompanying drawing to be used needed for having technology description is briefly described, it should be apparent that, drawings in the following description are only this Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can be with Other accompanying drawings are obtained according to these accompanying drawings.
The forming method stream of channel pore structure in the three-dimensional storage that Fig. 1-Figure 22 is provided by one embodiment of the invention Cheng Tu；
The forming method stream of channel pore structure in the three-dimensional storage that Figure 23-Figure 49 is provided by one embodiment of the invention Cheng Tu.
Specific embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete Site preparation is described, it is clear that described embodiment is only a part of embodiment of the invention, rather than the embodiment of whole.It is based on Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of creative work is not made Embodiment, belongs to the scope of protection of the invention.
Many details are elaborated in the following description in order to fully understand the present invention, but the present invention can be with It is different from alternate manner described here to implement using other, those skilled in the art can be without prejudice to intension of the present invention In the case of do similar popularization, therefore the present invention is not limited by following public specific embodiment.
A kind of forming method of channel pore structure in three-dimensional storage is embodiments provided, the method includes：
S101：As shown in Figure 1, there is provided substrate 11, the surface of the substrate 1 is formed with the first stack layer 2 and the first insulation connects Layer 3 is connect, first stack layer 2 is made up of the oxide layer and nitration case of multiple staggeredly superpositions.Optionally, first stack layer The number of plies summation of oxide layer and nitration case is not less than 64 in 2, but the present invention is not limited this, is specifically depended on the circumstances.
Specifically, in one embodiment of the invention, first insulation connecting layer 3 be silicon oxide layer, but the present invention This is not limited, as long as ensureing the material of first insulation connecting layer 3 and nitration case described in first stack layer 2 Difference, and with insulation function.
It should be noted that on the basis of above-described embodiment, in one embodiment of the invention, the method is also wrapped Include：
The first mask layer 4 is formed on the surface of the first insulation connecting layer 3.
S102：Continue as shown in figure 1, formed completely through first stack layer 2 and first insulation connecting layer 3, And extend to the first through hole 5 in the surface of the substrate 1.
Specifically, in one embodiment of the invention, formed completely through first stack layer 2 and described first exhausted Edge articulamentum 3, and the first through hole 5 extended in the surface of the substrate 1 includes：
First stack layer 2 and first insulation connecting layer 3 are performed etching, in first stack layer 2 and institute State and formed through first stack layer 2 and first insulation connecting layer 3 in the first insulation connecting layer 3, and extend to described First through hole 5 in the surface of substrate 1；The first through hole 5 is cleaned.
It should be noted that when performing etching to first stack layer 2 and first insulation connecting layer 3, can be with Select wet etching, it is also possible to select dry etching, can also be applied in combination, the present invention is not limited this, specifically regarding feelings Depending on condition.
Also, it should be noted that when the surface of the first insulation connecting layer 3 is formed with the first mask layer 4, the is being formed During one through hole 5, also include the etching to first mask layer 4.
S103：As shown in Fig. 2 the surface of the substrate 1 exposed to the open air in first through hole 5 forms first passage structure 6.It is optional , in one embodiment of the invention, the first passage structure 6 is silicon layer, and formation process is selective epitaxial process.
S104：The first functional layer is formed in the side wall of the first through hole 5.
Specifically, in one embodiment of the invention, forming the first functional layer in the side wall of the first through hole 5 includes：
As shown in figure 3, forming the first tunnelling in the side wall of the first through hole 5 and the surface of the first passage structure 6 Layer 7, for producing electric charge, optionally, first tunnel layer 7 is oxide layer, and formation process is depositing operation；
The first accumulation layer 8 is formed on the surface of the first tunnel layer 7, for storing electric charge, optionally, first storage Layer 8 is nitration case, and formation process is depositing operation；
The surface of the first accumulation layer 8 formed the first barrier layer 9, for stopping first accumulation layer 8 in electric charge Flow out, optionally, first barrier layer 9 is oxide layer, and formation process is depositing operation；
As shown in figure 4, the first protective layer 10 is formed on the surface of the first barrier layer 9, for protecting described first to stop Layer 9 does not sustain damage in follow-up removal technique, and optionally, first protective layer 10 is amorphous silicon layer, and formation process is heavy Product technique；
Continue as shown in figure 4, removing first protective layer 10, the first barrier layer 9, first accumulation layer 8 and described First tunnel layer 7 is located at the part on the surface of first passage structure 6, forms the first functional layer, optionally, the removal technique For etching technics and cleaning.
S105：Second channel structure is formed in the first functional layer side wall and the surface of first passage structure 6, it is described The surface of second channel structure is less than the surface of the first insulation connecting layer 3.
Specifically, in one embodiment of the invention, in the first functional layer side wall and the first passage structure 6 Surface forms second channel structure, and the surface of the second channel structure includes less than the surface of the first insulation connecting layer 3：
Connect as shown in figure 5, being formed and covering the side wall of the first protective layer 10, the bottom of the first through hole 5 and the first insulation The second channel layer 11 on the surface of layer 3 is connect, optionally, the second channel layer 11 is amorphous silicon layer, and formation process is depositing operation；
As shown in fig. 6, removing the part second channel layer 11 so that the surface of second channel layer 11 is less than described the One insulation connecting layer 3, forms second channel structure, and optionally, the removal technique is etching technics.
It should be noted that in embodiments of the present invention, the upper surface of the second channel structure can be higher than described the The upper surface of one stack layer, it is also possible to less than the upper surface of first stack layer, the present invention is not limited this, as long as protecting The upper surface for demonstrate,proving the second channel structure is not less than the upper surface of top layer oxide layer in first stack layer.It is optional , the upper surface of the second channel structure is concordant with the upper surface of top layer oxide layer in first stack layer.
S106：The first groove, first groove throwing on the substrate are formed in first insulation connecting layer Shadow is completely covered first through hole projection on the substrate.
Specifically, in one embodiment of the invention, the first groove is formed in first insulation connecting layer, it is described The projection on the substrate of first groove is completely covered first through hole projection on the substrate to be included：
Part first insulation connecting layer is removed, is formed in first insulation connecting layer through the described first insulation First groove of articulamentum, first groove projection on the substrate is completely covered the first through hole in the substrate On projection.Optionally, first groove projected area on the substrate is more than the first through hole in the substrate On projected area.
It should be noted that when the first insulation connecting layer surface is formed with the first mask layer, it is exhausted described first The first groove is formed in edge articulamentum, first groove projection on the substrate is completely covered the first through hole in institute The projection stated in substrate includes：
As shown in fig. 7, removing first mask layer 4；
As shown in figure 8, the planarization surface of the first insulation connecting layer 3；
Continue as shown in figure 8, removal part first insulation connecting layer 3, forms in first insulation connecting layer 3 Through the first groove 12 of first insulation connecting layer 3, projection of first groove 12 in the substrate 1 is completely covered Projection of the first through hole 5 in the substrate 1.
S107：As shown in figure 9, forming third channel structure 13, the third channel structure in first groove 12 13 contact with the second channel structure.Optionally, the formation process of the third channel structure is depositing operation.
S108：As shown in Figure 10, the second stacking is sequentially formed away from the side of the substrate 1 in the third channel structure 13 The insulation connecting layer 15 of layer 14 and second, second stack layer 14 is made up of the oxide layer and nitration case of multiple staggeredly superpositions.Can Choosing, the number of plies summation of oxide layer and nitration case is not less than 64 in second stack layer 14, but the present invention is not limited this It is fixed, specifically depend on the circumstances.
Specifically, in one embodiment of the invention, second insulation connecting layer 15 includes silicon oxide layer, but this It is bright that this is not limited, as long as ensureing second insulation connecting layer 15 and nitration case described in second stack layer 14 Material is different, and with insulation function.
It should be noted that on the basis of above-described embodiment, in one embodiment of the invention, the method is also wrapped Include：
The second mask layer 16 is formed on the surface of the second insulation connecting layer 15.
S109：Continue as shown in figure 11, formed completely through second stack layer 14 and second insulation connecting layer 15, and the second through hole 17 in the surface of third channel structure 13 is extended to, throwing of second through hole in the substrate 1 Projection of the shadow with the first through hole 5 in the substrate 1 is at least partly overlapped.
Specifically, in one embodiment of the invention, formed completely through second stack layer and described second exhausted Edge articulamentum, and the second through hole extended in the third channel body structure surface includes：
Second stack layer and second insulation connecting layer are performed etching, in second stack layer and described Formed through second stack layer and second insulation connecting layer in two insulation connecting layers, and extend to the third channel The second through hole in body structure surface；Second through hole is cleaned.
It should be noted that in embodiments of the present invention, second through hole can extend to the third channel structure Surface, it is also possible to extend in the third channel body structure surface, the present invention is not limited this, as long as ensureing to be subsequently formed Fourth lane structure can be with the third channel structure directly contact.
Also, it should be noted that when performing etching to second stack layer and second insulation connecting layer, can be with Select wet etching, it is also possible to select dry etching, can also be applied in combination, the present invention is not limited this, specifically regarding feelings Depending on condition.
On the basis of above-described embodiment, in one embodiment of the invention, when the second insulation connecting layer surface When being formed with the second mask layer, when the second through hole is formed, also include the etching to second mask layer.Need explanation It is, in embodiments of the present invention, boundary line and described first of second mask layer 16 towards the side of the second through hole 17 Mask layer 4 maximum is not more than 15nm towards the distance between the boundary line a of the side of the first through hole 5.
S1010：The second functional layer is formed in second through-hole side wall.
Specifically, in one embodiment of the invention, forming the second functional layer in second through-hole side wall includes：
As shown in figure 12, the second tunnel is formed in the side wall of second through hole 17 and the surface of the third channel structure 13 Layer 18 is worn, for producing electric charge, optionally, second tunnel layer 18 is oxide layer, and formation process is depositing operation；
The second accumulation layer 19 is formed on the surface of the second tunnel layer 18, for storing electric charge, optionally, described second deposits Reservoir 19 is nitration case, and formation process is depositing operation；
The surface of the second accumulation layer 19 formed the second barrier layer 20, for stopping second accumulation layer 19 in electricity Lotus is flowed out, and optionally, second barrier layer 19 is oxide layer, and formation process is depositing operation；
As shown in figure 13, the second protective layer 21 is formed on the surface of the second barrier layer 20, for protecting second resistance Barrier 20 does not sustain damage in follow-up removal technique, and optionally, second protective layer 21 is amorphous silicon layer, and formation process is Depositing operation；
Continue as shown in figure 13, remove second protective layer 21, the second barrier layer 20, second accumulation layer 19 and institute State the second tunnel layer 18 and the third channel structure 13 is located at the part of the bottom of the second through hole 17, form the second function Layer, while so that second through hole 17 with the first through hole 5 to connecting, optionally, it is described removal technique be etching technics And cleaning.
On the basis of above-described embodiment, in one embodiment of the invention, the method also includes：As shown in figure 14, Remove second barrier layer 20, second accumulation layer 19, second tunnel layer 18 be located at second protective layer 21 under The part of side, as shown in dotted outline in FIG..
S1011：As shown in figure 15, the second channel structure, the third channel structure and second protection are removed Layer, first protective layer, form the third through-hole 22 that the first through hole 5 is connected with second through hole 17.
S1012：Fourth lane structure and the first interstitital texture are sequentially formed in third through-hole side wall and bottom, it is described Surface of the surface of the first interstitital texture less than the fourth lane structure.
Specifically, in one embodiment of the invention, four-way is sequentially formed in third through-hole side wall and bottom Road structure and the first interstitital texture, the surface of first interstitital texture includes less than the surface of the fourth lane structure：
As shown in figure 16, formed in the side wall of the third through-hole 22 and bottom and the surface of the first insulation connecting layer 3 Fourth lane layer 28；
As shown in figure 17, the first packed layer for covering the fourth lane layer 28 is formed on the surface of fourth lane layer 28 34；
As shown in figure 18, part first packed layer 34 is removed so that the surface of first packed layer 34 is less than institute The surface of the first insulation connecting layer 3 is stated, the first interstitital texture is formed；
As shown in figure 19, the part that the part fourth lane layer 28 is located at the surface of the first insulation connecting layer 3 is removed, Retain the part of the side wall of the third through-hole 22, form fourth lane structure, the bottom of the fourth lane structure and described the The directly contact of one channel design 6, the surface of the fourth lane structure is higher than the surface of first interstitital texture.
It should be noted that in embodiments of the present invention, the upper surface of first interstitital texture can be higher than described the The upper surface of two stack layers, it is also possible to less than the upper surface of second stack layer, the present invention is not limited this, as long as protecting The upper surface for demonstrate,proving first interstitital texture is not less than the upper surface of top layer oxide layer in second stack layer.It is optional , the upper surface of first interstitital texture is concordant with the upper surface of top layer oxide layer in second stack layer.
S1013：Form the 5th in the second groove that the fourth lane structure is formed with first interstitital texture to lead to Road structure, the Five-channel structure contacts with the fourth lane structure.
It should be noted that when the second insulation connecting layer surface is formed with the second mask layer, in the four-way Five-channel structure, the Five-channel structure and institute are formed in the second groove that road structure is formed with first interstitital texture State fourth lane structure contact including：
As shown in figure 20, is formed in the second groove that the fourth lane structure is formed with first interstitital texture Five-channel layer 35, the Five-channel layer 35 contacts with the fourth lane structure
As shown in figure 21, second mask layer is removed；
As shown in figure 22, the second insulation connecting layer surface is planarized.
Accordingly, the embodiment of the present invention additionally provides a kind of three-dimensional storage formed using above-mentioned forming method, and this three Dimension memory includes：
Substrate, the substrate surface is formed with the first stack layer and the first insulation connecting layer, and first stack layer is by more The oxide layer and nitration case of individual staggeredly superposition is constituted；
Through first stack layer and first insulation connecting layer, and first extended in the substrate surface is led to Hole；
It is formed at the first passage structure of the substrate surface that first through hole exposes to the open air；
It is formed at the first functional layer of first through hole side wall；
It is sequentially formed in second stack layer and second insulation company of first insulation connecting layer away from the substrate side Layer is connect, second stack layer is made up of the oxide layer and nitration case of multiple staggeredly superpositions；
Through second stack layer and second insulation connecting layer, and extend to what is be connected with the first through hole Second through hole, the first through hole and second through hole constitute third through-hole；
It is formed at the second functional layer of second through-hole side wall；
It is sequentially formed in the fourth lane structure and the first interstitital texture of third through-hole side wall and bottom, the described 4th Channel design contacts with the first passage structure, and the surface of second interstitital texture is less than the fourth lane structure Surface；
The Five-channel knot being formed in the second groove that the fourth lane structure and first interstitital texture are formed Structure, the Five-channel structure contacts with the fourth lane structure.
From the foregoing, it will be observed that the forming method of the channel pore structure of three-dimensional storage that the embodiment of the present invention is provided, by The channel pore structure of one through hole and the second through hole during twice through hole formation process is to form the three-dimensional storage, greatly reduces The technology difficulty and cost of the channel pore structure, solves under identical bore, and technique is difficult caused by through hole depth-to-width ratio is excessive Big and high cost the problem of degree, while also reducing the manufacture craft difficulty and cost of the three-dimensional storage.
Additionally, the embodiment of the present invention additionally provides the forming method of channel pore structure in another kind of three-dimensional storage, it is described Three-dimensional storage includes first area, second area and the 3rd region arranged along word-line direction, wherein, the first area is used In channel pore structure is formed, the 3rd region is used to form insulation ring structure, and the method includes：
S201：As shown in figure 23, there is provided substrate 1, the surface of the substrate 1 is formed with the first stack layer 2 and the first insulation connects Layer 3 is connect, first stack layer 2 is made up of the oxide layer and nitration case of multiple staggeredly superpositions.Optionally, first stack layer The number of plies summation of oxide layer and nitration case is not less than 64 in 2, but the present invention is not limited this, is specifically depended on the circumstances.
Specifically, in one embodiment of the invention, first insulation connecting layer 3 be silicon oxide layer, but the present invention This is not limited, as long as ensureing the material of first insulation connecting layer 3 and nitration case described in first stack layer 2 Difference, and with insulation function.
It should be noted that on the basis of above-described embodiment, in one embodiment of the invention, the method is also wrapped Include：
The first mask layer 4 is formed on the surface of the first insulation connecting layer 3.Optionally, first mask layer includes nitrogen Change the nitration case or oxide layer or other structures of layer or stacking, the present invention is not limited this, specifically depended on the circumstances.
S202：Continue as shown in figure 23, (i.e. Channel hole), the second area 200 in the first area 100 (i.e. SS dummy hole) and the 3rd region 300 (i.e. TAC barrier) is formed completely through first stack layer 2 With first insulation connecting layer 3, and the first through hole 5 in the surface of the substrate 1 is extended to.It should be noted that vertical In the surface direction of the substrate 1, the depth of the first through hole 5 at the 3rd region 300 is more than the first area 100 The depth of the first through hole 5 at place.
Also, it should be noted that when the surface of the first insulation connecting layer 3 is formed with the first mask layer 4, the is being formed During one through hole 5, also include the etching to first mask layer 4.
S203：As shown in figure 24, the surface of the substrate 1 exposed to the open air in first through hole 5 forms first passage structure 6.
S204：The first functional layer is formed in the side wall of the first through hole 5.
Specifically, in one embodiment of the invention, forming the first functional layer in the side wall of the first through hole 5 includes：
As shown in figure 25, the first tunnelling is formed in the side wall of the first through hole 5 and the surface of the first passage structure 6 Layer 7, for producing electric charge, optionally, first tunnel layer 7 is oxide layer, and formation process is depositing operation；
The first accumulation layer 8 is formed on the surface of the first tunnel layer 7, for storing electric charge, optionally, first storage Layer 8 is nitration case, and formation process is depositing operation；
The surface of the first accumulation layer 8 formed the first barrier layer 9, for stopping first accumulation layer 8 in electric charge Flow out, optionally, first barrier layer 9 is oxide layer, and formation process is depositing operation；
As shown in figure 26, the first protective layer 10 is formed on the surface of the first barrier layer 9, for protecting described first to stop Layer 9 does not sustain damage in follow-up removal technique, and optionally, first protective layer 10 is amorphous silicon layer, and formation process is heavy Product technique；
Continue as shown in figure 26, remove first protective layer 10, the first barrier layer 9, first accumulation layer 8 and described First tunnel layer 7 is located at the part on the surface of first passage structure 6, forms the first functional layer, optionally, the removal technique For etching technics and cleaning.
S205：Second channel structure is formed in the first functional layer side wall and the surface of first passage structure 6, it is described The surface of second channel structure is less than the surface of the first insulation connecting layer 3.Optionally, the second channel inside configuration has The air gap.
Specifically, in one embodiment of the invention, in the first functional layer side wall and the first passage structure 6 Surface forms second channel structure, and the surface of the second channel structure includes less than the surface of the first insulation connecting layer 3：
As shown in figure 27, formed and cover the side wall of the first protective layer 10, the bottom of the first through hole 5 and the first insulation company The second channel layer 11 on the surface of layer 3 is connect, optionally, the inside of the second channel layer 11 has the air gap；
As shown in figure 28, the part second channel layer 11 is removed so that the surface of second channel layer 11 is less than described First insulation connecting layer 3, forms second channel structure, and optionally, the second channel inside configuration has the air gap, its knot Structure is closing ring type structure.
It should be noted that in embodiments of the present invention, the upper surface of the second channel structure can be higher than described the The upper surface of one stack layer 2, it is also possible to less than the upper surface of first stack layer 2, the present invention is not limited this, as long as The upper surface for ensureing the second channel structure is not less than the upper surface of top layer oxide layer in first stack layer 2.Can Choosing, the upper surface of the second channel structure is concordant with the upper surface of top layer oxide layer in first stack layer 2.
Also, it should be noted that in one embodiment of the invention, first protective layer is tied with the second channel The material of structure is identical, in order to remove in same step process in subsequent technique.
S206：First groove described in the first groove Δ of formation is in the substrate 1 in first insulation connecting layer 3 Projection is completely covered projection of the first through hole 5 in the substrate 1.
Specifically, in one embodiment of the invention, the first groove, institute are formed in first insulation connecting layer 3 Stating projection of first groove in the substrate 1 projection of the first through hole 5 in the substrate 1 is completely covered includes：
Part first insulation connecting layer 3 is removed, forms exhausted through described first in first insulation connecting layer 3 First groove of edge articulamentum 3, projection of first groove in the substrate 1 is completely covered the first through hole 5 in institute State the projection in substrate 1.Optionally, projected area of first groove in the substrate 1 exists more than the first through hole 5 Projected area in the substrate 1.
In another embodiment of the present invention, when the surface of the first insulation connecting layer 3 is formed with the first mask layer 4 When, the first groove is formed in first insulation connecting layer 3, projection of first groove in the substrate 1 is covered completely Covering projection of the first through hole 5 in the substrate 1 includes：
As shown in figure 29, first mask layer 4 is removed, it should be noted that when first accumulation layer 8 and described the When the material of one mask layer 4 is identical, when first mask layer 4 is removed, part first accumulation layer 10 can be simultaneously removed；
As shown in figure 30, the surface of the first insulation connecting layer 3 is planarized；
Continue as shown in figure 30, remove part first insulation connecting layer 3, the shape in first insulation connecting layer 3 Into the first groove 12 through first insulation connecting layer 3, projection of first groove 12 in the substrate 1 is covered completely Cover projection of the first through hole 5 in the substrate 1.
S207：As shown in figure 31, third channel structure 13, the third channel structure are formed in first groove 12 13 contact with the second channel structure.
S208：The second stack layer 14 and second is sequentially formed in the third channel structure 13 away from the side of the substrate 1 Insulation connecting layer 15, second stack layer 14 is made up of the oxide layer and nitration case of multiple staggeredly superpositions.Optionally, described The number of plies summation of oxide layer and nitration case is not less than 64 in two stack layers 14, but the present invention is not limited this, specifically regarding feelings Depending on condition.
Specifically, in one embodiment of the invention, second insulation connecting layer 15 be silicon oxide layer, but the present invention This is not limited, as long as ensureing the material of second insulation connecting layer 15 and nitration case described in second stack layer 14 Material is different, and with insulation function.
It should be noted that on the basis of above-described embodiment, in one embodiment of the invention, the method is also wrapped Include：
The second mask layer 16 is formed on the surface of the second insulation connecting layer 15.
S209：As shown in figure 33, in the first area 100, the second area 200 and the shape of the 3rd region 300 Into completely through second stack layer 14 and second insulation connecting layer 15, and extend to the table of third channel structure 13 The second through hole 17 in face, projection of second through hole 17 in the substrate 1 is with the first through hole 5 in the substrate 1 On projection at least partly overlap.
It should be noted that during concrete technology, the third channel structure in the 3rd region may be by second through hole Completely through the present invention is not limited this, as long as ensureing the third channel structure of the first area not by described the Two through holes completely through.
Specifically, in one embodiment of the invention, formed completely through second stack layer and described second exhausted Edge articulamentum, and the second through hole extended in the third channel body structure surface includes：
Second stack layer and second insulation connecting layer are performed etching, in second stack layer and described Formed through second stack layer and second insulation connecting layer in two insulation connecting layers, and extend to the third channel The second through hole in body structure surface；Second through hole is cleaned.
It should be noted that in embodiments of the present invention, second through hole can extend to the third channel structure Surface, it is also possible to extend in the third channel body structure surface, the present invention is not limited this.
On the basis of above-described embodiment, in one embodiment of the invention, when the second insulation connecting layer surface When being formed with the second mask layer, when the second through hole is formed, also include the etching to second mask layer.Need explanation It is, in embodiments of the present invention, boundary line and first mask of second mask layer towards the second through hole side Layer maximum is not more than 15nm towards the distance between the boundary line a of the side of the first through hole 5.
S2010：The second functional layer is formed in second through-hole side wall.
Specifically, in one embodiment of the invention, forming the second functional layer in second through-hole side wall includes：
As shown in figure 34, in second tunnel layer of side wall and the bottom of the second through hole 17 formation of second through hole 17 18, for producing electric charge, optionally, second tunnel layer 18 is oxide layer, and formation process is depositing operation；
The second accumulation layer 19 is formed on the surface of the second tunnel layer 18, for storing electric charge, optionally, described second deposits Reservoir 19 is nitration case, and formation process is depositing operation；
The surface of the second accumulation layer 19 formed the second barrier layer 20, for stopping second accumulation layer 19 in electricity Lotus is flowed out, and optionally, second barrier layer 20 is oxide layer, and formation process is depositing operation；
As shown in figure 35, the second protective layer 21 is formed on the surface of the second barrier layer 20, for protecting second resistance Barrier 20 does not sustain damage in follow-up removal technique, and optionally, second protective layer 21 is amorphous silicon layer, and formation process is Depositing operation；
Continue as shown in figure 35, remove second protective layer 21, the second barrier layer 20, second accumulation layer 19, institute State the second tunnel layer 18 and the third channel structure 13 is located at the part of the bottom of the second through hole 17, form the second function Layer, while so that second through hole 17 is connected with the first through hole 5, optionally, the removal technique is etching technics And cleaning.
On the basis of above-described embodiment, in one embodiment of the invention, the method also includes：As shown in figure 36, Second barrier layer 20, second accumulation layer 19, second tunnel layer 18 are removed positioned at second protective layer lower section Part, as shown in dotted outline in FIG..
S2011：As shown in figure 37, the second channel structure, the third channel structure and second protection are removed Layer, first protective layer, form the third through-hole 22 that the first through hole 5 is connected with second through hole 17.
S2012：In the side wall and bottom formation fourth lane structure of the third through-hole positioned at the first area, and in institute State first area, the corresponding third through-hole side wall of the second area and the 3rd region and bottom and form the first filling Structure, the surface of first interstitital texture is less than the surface of first insulation connecting layer 3.
Specifically, in one embodiment of the invention, the side wall in the third through-hole positioned at the first area and bottom Portion forms fourth lane structure, and in the first area, the second area and the 3rd region the corresponding described 3rd First interstitital texture is formed on through-hole side wall and bottom, and the surface of first interstitital texture is less than the table of the fourth lane structure Face includes：
As shown in figure 38, formed in the first area, the second area and the 3rd region and cover the described 3rd The side wall of through hole 27 and the fourth lane layer 28 on bottom and the surface of the first insulation connecting layer 3；
As shown in figure 39, formed in the first area, the second area and the 3rd region and cover the described 4th Second packed layer 29 of channel layer 28, second packed layer 29 has the air gap；
As shown in figure 40, the 3rd mask layer is formed on the surface of the second packed layer 19 correspondence first area 100 30；
With the 3rd mask layer 30 as mask, remove second packed layer 29 and be located at the second area 200 and institute State the part in the 3rd region 300；
As shown in figure 41, the 3rd mask layer 30 is removed；
The part of the first area 100 is located at as mask with second packed layer 29, the fourth lane layer is removed 28 parts for being located at the second area 200 and the 3rd region 300, in the second area 200 and the 3rd region 300 form the fourth hole 31；
As shown in figure 42, the 3rd packed layer 32, the 3rd packed layer are formed in the side wall of the fourth hole 31 and bottom 32 also cover surface of first insulation connecting layer 3 positioned at the second area 200 and the 3rd region 300, optionally, 3rd packed layer 32 has the air gap, and more optionally, the filling capacity of the 3rd packed layer 32 is better than described second The filling capacity of packed layer 29, i.e., in same etching technics, the etch rate of the 3rd packed layer 32 is less than described second The etch rate of packed layer 29；
As shown in figure 43, second packed layer 29 and the 3rd packed layer 32 are performed etching, removes described second Packed layer 29 is located at the part of the first area 100, and in the first area 100 fifth hole 33 is formed；
As shown in figure 44, the first packed layer 34 for covering the fourth hole 32 and the fifth hole 33 is formed, it is described First packed layer 34 also covers the surface of the first insulation connecting layer 3；
As shown in figure 45, part first packed layer is removed so that the surface of first packed layer 34 is less than described The surface of the first insulation connecting layer 3, forms the first interstitital texture；
As shown in figure 46, the part that the fourth lane layer 28 is located at the surface of the first insulation connecting layer 3 is removed, is retained The part of the side wall of the third through-hole 33, forms fourth lane structure, and the bottom of the fourth lane structure is logical with described first The directly contact of road structure 6, the surface of the fourth lane structure is higher than the surface of first interstitital texture.
S2012：The 5th is formed in the second groove that the fourth lane structure and first interstitital texture are formed to lead to Road structure, the Five-channel structure contacts with the fourth lane structure.
It should be noted that when the second insulation connecting layer surface is formed with the second mask layer, in the four-way Forming Five-channel structure in the second groove that road structure and first interstitital texture are formed includes：
As shown in figure 47, is formed in the second groove that the fourth lane structure is formed with first interstitital texture Five-channel layer 55, the Five-channel layer 55 contacts with the fourth lane structure
As shown in figure 48, second mask layer 16 is removed；
As shown in figure 49, the surface of the second insulation connecting layer 15 is planarized.
Accordingly, the embodiment of the present invention additionally provides a kind of three-dimensional storage, and the three-dimensional storage is included along wordline side First area, second area and the 3rd region to arrangement, wherein, the first area is used to form channel pore structure, described 3rd region is used to form insulation ring structure, and edge includes perpendicular to the three-dimensional storage surface direction：
Substrate, the substrate surface is formed with the first stack layer and the first insulation connecting layer, and first stack layer is by more The oxide layer and nitration case of individual staggeredly superposition is constituted；
In the first area, the second area and the 3rd region, through first stack layer and described One insulation connecting layer, and extend to the first through hole in the substrate surface；
It is formed in the first passage structure of the substrate surface that first through hole exposes to the open air；
It is formed in the first functional layer of first through hole side wall；
It is sequentially formed at second stack layer and second insulation company of first insulation connecting layer away from the substrate side Layer is connect, second stack layer is made up of the oxide layer and nitration case of multiple staggeredly superpositions；
In the first area, the second area and the 3rd region, through second stack layer and described Two insulation connecting layers, and the second through hole being connected with the first through hole is extended to, the first through hole and described second is led to Hole constitutes third through-hole；
It is formed in the second functional layer of second through-hole side wall；
The side wall of the third through-hole of the first area and the fourth lane structure of bottom are formed in, and are formed in described First filling knot is formed on first area, the corresponding third through-hole side wall of the second area and the 3rd region and bottom Structure, the surface of first interstitital texture is less than the surface of the fourth lane structure；
The Five-channel knot being formed in the second groove that the fourth lane structure and first interstitital texture are formed Structure, the Five-channel structure contacts with the fourth lane structure.
From the foregoing, it will be observed that in the three-dimensional storage that provided of the embodiment of the present invention channel pore structure forming method, by The channel pore structure of one through hole and the second through hole during twice through hole formation process is to form the three-dimensional storage, greatly reduces The technology difficulty and cost of the channel pore structure, solves under identical bore, and technique is difficult caused by through hole depth-to-width ratio is excessive Big and high cost the problem of degree, reduces the formation process difficulty and cost of the three-dimensional storage.
And, the forming method of channel pore structure in the three-dimensional storage that the embodiment of the present invention is provided, the four-way Road structure exists only in the first area, and is not present in the first area, so that in the three-dimensional storage, Fifth hole structure described in the first area is electrically connected with the first passage structure, logical the described in the 3rd region the 5th Road structure is electrically insulated with the first passage structure, so as to when the three-dimensional storage with dead ring is applied to, can be in institute State while first area forms channel pore structure and form insulation ring structure in the 3rd region, process is simple, cost is relatively low.
Various pieces are described by the way of progressive in this specification, and what each some importance was illustrated is and other parts Difference, between various pieces identical similar portion mutually referring to.
The foregoing description of the disclosed embodiments, enables professional and technical personnel in the field to realize or using the present invention. Various modifications to these embodiments will be apparent for those skilled in the art, as defined herein General Principle can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, the present invention Embodiment illustrated herein is not intended to be limited to, and is to fit to consistent with principles disclosed herein and features of novelty Most wide scope.

Claims (12)

1. in a kind of three-dimensional storage channel pore structure forming method, it is characterised in that the method includes：
Substrate is provided, the substrate surface is formed with the first stack layer and the first insulation connecting layer, and first stack layer is by more The oxide layer and nitration case of individual staggeredly superposition is constituted；
Formed completely through first stack layer and first insulation connecting layer, and extend in the substrate surface the One through hole；
The substrate surface exposed to the open air in first through hole forms first passage structure；
In the first through hole side, wall forms the first functional layer；
Second channel structure, the second channel knot are formed in the first functional layer side wall and the first passage body structure surface The surface of structure is less than the first insulation connecting layer surface；
The first groove is formed in first insulation connecting layer, first groove projection on the substrate is completely covered First through hole projection on the substrate；
Third channel structure is formed in first groove, the third channel structure connects with the second channel structure Touch；
The second stack layer and the second insulation connecting layer are sequentially formed away from the substrate side in the third channel structure, it is described Second stack layer is made up of the oxide layer and nitration case of multiple staggeredly superpositions；
Formed completely through second stack layer and second insulation connecting layer, and extend to the third channel structural table The second through hole in face, projection of second through hole projection on the substrate with the first through hole on the substrate It is at least partly overlapping；
The second functional layer is formed in second through-hole side wall；
The second channel structure, the third channel structure and second protective layer, first protective layer are removed, is formed The third through-hole that the first through hole is connected with second through hole；
Fourth lane structure and the first interstitital texture, the first filling knot are sequentially formed in third through-hole side wall and bottom Surface of the surface of structure less than the fourth lane structure；
Five-channel structure is formed in the second groove that the fourth lane structure is formed with first interstitital texture, it is described Five-channel structure contacts with the fourth lane structure.
2. forming method according to claim 1, it is characterised in that wall forms the first functional layer in the first through hole side Including：
The first tunnel layer is formed in the side wall of the first through hole and the surface of the first passage structure, for producing electric charge；
The first accumulation layer is formed in the first tunnelling layer surface, for storing electric charge；
Described first storage layer surface formed the first barrier layer, for stopping first accumulation layer in electric charge flow out；
The first protective layer is formed in first barrier layer surface, for protecting first barrier layer to remove in technique follow-up Do not sustain damage；
First protective layer, the first barrier layer, first accumulation layer and first tunnel layer are removed positioned at described first The part on channel design surface, forms the first functional layer.
3. forming method according to claim 1, it is characterised in that lead in the first functional layer side wall and described first Road body structure surface forms second channel structure, and the surface of the second channel structure is wrapped less than the first insulation connecting layer surface Include：
Form the second channel for covering the first protective layer side wall, the first through hole bottom and the first insulation connecting layer surface Layer；
Remove the part second channel layer so that the second channel layer surface is less than first insulation connecting layer, formed Second channel structure.
4. forming method according to claim 1, it is characterised in that form the second functional layer in second through-hole side wall Including：
The second tunnel layer is formed in the side wall of second through hole and the surface of the second channel structure, for producing electric charge；
The second accumulation layer is formed in the second tunnelling layer surface, for storing electric charge；
Described second storage layer surface formed the second barrier layer, for stopping second accumulation layer in electric charge flow out；
The second protective layer is formed in second barrier layer surface, for protecting second barrier layer to remove in technique follow-up Do not sustain damage；
Remove second protective layer, the second barrier layer, second accumulation layer and second tunnel layer and described second to lead to Road structure is located at the part of second via bottoms, forms the second functional layer, while so that second through hole and described the One through hole is to connection.
5. forming method according to claim 1, it is characterised in that sequentially form in third through-hole side wall and bottom Wrap less than the surface of the fourth lane structure on fourth lane structure and the first interstitital texture, the surface of first interstitital texture Include：
Fourth lane layer is formed in third through-hole side wall and bottom and the first insulation connecting layer surface；
The first packed layer for covering the fourth lane layer is formed in the fourth lane layer surface；
Remove part first packed layer so that table of the surface of first packed layer less than first insulation connecting layer Face, forms the first interstitital texture；
The part that the part fourth lane layer is located at the first insulation connecting layer surface is removed, retains the third through-hole side The part of wall, forms fourth lane structure, the bottom of the fourth lane structure and the first passage structure directly contact, institute State the surface of the surface higher than first interstitital texture of fourth lane structure.
6. a kind of three-dimensional storage, it is characterised in that include：
Substrate, the substrate surface is formed with the first stack layer and the first insulation connecting layer, and first stack layer is by multiple friendships The oxide layer and nitration case of mistake superposition is constituted；
Through first stack layer and first insulation connecting layer, and extend to the first through hole in the substrate surface；
It is formed at the first passage structure of the substrate surface that first through hole exposes to the open air；
It is formed at the first functional layer of first through hole side wall；
Second stack layer and second insulation connecting layer of first insulation connecting layer away from the substrate side is sequentially formed in, Second stack layer is made up of the oxide layer and nitration case of multiple staggeredly superpositions；
Through second stack layer and second insulation connecting layer, and extend to second be connected with the first through hole Through hole, the first through hole and second through hole constitute third through-hole；
It is formed at the second functional layer of second through-hole side wall；
It is sequentially formed in the fourth lane structure and the first interstitital texture of third through-hole side wall and bottom, the fourth lane Structure contacts with the first passage structure, and the surface of second interstitital texture is less than the fourth lane body structure surface；
The Five-channel structure being formed in the second groove that the fourth lane structure and first interstitital texture are formed, institute State Five-channel structure to contact with the fourth lane structure.
7. in a kind of three-dimensional storage channel pore structure forming method, it is characterised in that the three-dimensional storage is included along word First area, second area and the 3rd region that line direction is arranged, wherein, the first area is used to form channel pore structure, 3rd region is used to form insulation ring structure, and the method includes：
Substrate is provided, the substrate surface is formed with the first stack layer and the first insulation connecting layer, and first stack layer is by more The oxide layer and nitration case of individual staggeredly superposition is constituted；
Formed completely through first stack layer and described in the first area, the second area and the 3rd region First insulation connecting layer, and extend to the first through hole in the substrate surface；
The substrate surface exposed to the open air in first through hole forms first passage structure；
In the first through hole side, wall forms the first functional layer；
Second channel structure, the second channel knot are formed in the first functional layer side wall and the first passage body structure surface The surface of structure is less than the first insulation connecting layer surface；
The first groove is formed in first insulation connecting layer, first groove projection on the substrate is completely covered First through hole projection on the substrate；
Third channel structure is formed in first groove, the third channel structure connects with the second channel structure Touch；
The second stack layer and the second insulation connecting layer are sequentially formed away from the substrate side in the third channel structure, it is described Second stack layer is made up of the oxide layer and nitration case of multiple staggeredly superpositions；
Formed completely through second stack layer and described in the first area, the second area and the 3rd region Second insulation connecting layer, and the second through hole in the third channel body structure surface is extended to, second through hole is in the base Projection of the projection on bottom with the first through hole on the substrate is at least partly overlapped；
The second functional layer is formed in second through-hole side wall；
The second channel structure, the third channel structure and second protective layer, first protective layer are removed, is formed The third through-hole that the first through hole is connected with second through hole；
In the side wall and bottom formation fourth lane structure of the third through-hole positioned at the first area, and in firstth area First interstitital texture, institute are formed on domain, the corresponding third through-hole side wall of the second area and the 3rd region and bottom State the surface of the surface less than the fourth lane structure of the first interstitital texture；
Five-channel structure is formed in the second groove that the fourth lane structure and first interstitital texture are formed, it is described Five-channel structure contacts with the fourth lane structure.
8. forming method according to claim 7, it is characterised in that wall forms the first functional layer in the first through hole side Including：
The first tunnel layer is formed in the side wall of the first through hole and the surface of the first passage structure, for producing electric charge；
The first accumulation layer is formed in the first tunnelling layer surface, for storing electric charge；
Described first storage layer surface formed the first barrier layer, for stopping first accumulation layer in electric charge flow out；
The first protective layer is formed in first barrier layer surface, for protecting first barrier layer to remove in technique follow-up Do not sustain damage；
First protective layer, the first barrier layer, first accumulation layer and first tunnel layer are removed positioned at described first The part on channel design surface, forms the first functional layer.
9. forming method according to claim 7, it is characterised in that lead in the first functional layer side wall and described first Road body structure surface forms second channel structure, and the surface of the second channel structure is wrapped less than the first insulation connecting layer surface Include：
Form the second channel for covering the first protective layer side wall, the first through hole bottom and the first insulation connecting layer surface Layer；
Remove the part second channel layer so that the second channel layer surface is less than first insulation connecting layer, formed Second channel structure.
10. forming method according to claim 7, it is characterised in that form the second function in second through-hole side wall Layer includes：
The second tunnel layer is formed in the side wall and second via bottoms of second through hole, for producing electric charge；
The second accumulation layer is formed in the second tunnelling layer surface, for storing electric charge；
Described second storage layer surface formed the second barrier layer, for stopping second accumulation layer in electric charge flow out；
The second protective layer is formed in second barrier layer surface, for protecting second barrier layer to remove in technique follow-up Do not sustain damage；
Remove second protective layer, the second barrier layer, second accumulation layer, second tunnel layer and the third channel Structure is located at the part of second via bottoms, the second functional layer is formed, while so that second through hole and described first Through hole is connected.
11. forming methods according to claim 7, it is characterised in that in the third through-hole positioned at the first area Fourth lane structure is formed on side wall and bottom, and corresponding in the first area, the second area and the 3rd region First interstitital texture is formed on third through-hole side wall and bottom, and the surface of first interstitital texture is less than the fourth lane The surface of structure includes：
The first area, the second area and the 3rd region formed cover third through-hole side wall and bottom with And the fourth lane layer on the first insulation connecting layer surface；
The second filling for covering the fourth lane layer is formed in the first area, the second area and the 3rd region Layer, second packed layer has the air gap；
The 3rd mask layer is formed on the surface of second packed layer correspondence first area；
With the 3rd mask layer as mask, remove second packed layer and be located at the second area and the 3rd region Part；
Remove the 3rd mask layer；
The part of the first area is located at as mask with second packed layer, the fourth lane layer is removed and is located at described the Two regions and the part in the 3rd region, in the second area and the 3rd region fourth hole is formed；
The 3rd packed layer is formed in fourth hole side wall and bottom, the 3rd packed layer also covers first insulation and connects Surface of the layer positioned at the second area and the 3rd region is connect, the filling capacity of the 3rd packed layer is better than described second The filling capacity of packed layer；
Second packed layer and the 3rd packed layer are performed etching, second packed layer is removed and is located at firstth area The part in domain, is formed in the first area and forms fifth hole；
Form the first packed layer for covering the fourth hole and the fifth hole, first packed layer also covers described the One insulation connecting layer surface；
Remove part first packed layer so that table of the surface of first packed layer less than first insulation connecting layer Face, forms the first interstitital texture；
Part of the fourth lane layer positioned at the first insulation connecting layer surface is removed, retains third through-hole side wall Part, forms fourth lane structure, the bottom of the fourth lane structure and the first passage structure directly contact, and described the Surface of the surface of four-way structure higher than first interstitital texture.
A kind of 12. three-dimensional storages, it is characterised in that the three-dimensional storage include along word-line direction arrangement first area, Second area and the 3rd region, wherein, the first area is used to form channel pore structure, and the 3rd region is used to be formed absolutely Edge ring structure, edge includes perpendicular to the three-dimensional storage surface direction：
Substrate, the substrate surface is formed with the first stack layer and the first insulation connecting layer, and first stack layer is by multiple friendships The oxide layer and nitration case of mistake superposition is constituted；
In the first area, the second area and the 3rd region, through first stack layer and described first exhausted Edge articulamentum, and extend to the first through hole in the substrate surface；
It is formed in the first passage structure of the substrate surface that first through hole exposes to the open air；
It is formed in the first functional layer of first through hole side wall；
Second stack layer and second insulation connecting layer of first insulation connecting layer away from the substrate side is sequentially formed at, Second stack layer is made up of the oxide layer and nitration case of multiple staggeredly superpositions；
In the first area, the second area and the 3rd region, through second stack layer and described second exhausted Edge articulamentum, and extend to the second through hole being connected with the first through hole, the first through hole and the second through hole structure Into third through-hole；
It is formed in the second functional layer of second through-hole side wall；
It is formed in the side wall of the third through-hole of the first area and the fourth lane structure of bottom, and is formed in described first First interstitital texture is formed on region, the corresponding third through-hole side wall of the second area and the 3rd region and bottom, Surface of the surface of first interstitital texture less than the fourth lane structure；
The Five-channel structure being formed in the second groove that the fourth lane structure and first interstitital texture are formed, institute State Five-channel structure to contact with the fourth lane structure.
CN201710134783.6A 2017-03-08 2017-03-08 The forming method of three-dimensional storage and its channel pore structure Active CN106653684B (en)

Priority Applications (13)

Application Number Priority Date Filing Date Title
CN201710134783.6A CN106653684B (en) 2017-03-08 2017-03-08 The forming method of three-dimensional storage and its channel pore structure
CN201910114048.8A CN109920790B (en) 2017-03-08 2017-03-08 Three-dimensional memory and forming method of channel hole structure thereof
CN202010655153.5A CN111933576B (en) 2017-03-08 2018-03-01 Bonding opening structure of three-dimensional memory device and forming method thereof
KR1020217020259A KR102439554B1 (en) 2017-03-08 2018-03-01 Joint openning structures of three-dimensional memory devices and methods for forming the same
PCT/CN2018/077785 WO2018161846A1 (en) 2017-03-08 2018-03-01 Joint openning structures of three-dimensional memory devices and methods for forming the same
CN201880009111.5A CN110313061B (en) 2017-03-08 2018-03-01 Bonding opening structure of three-dimensional memory device and forming method thereof
JP2019570608A JP6978643B2 (en) 2017-03-08 2018-03-01 Joint opening structure of 3D memory device and method for forming it
KR1020197029465A KR102273416B1 (en) 2017-03-08 2018-03-01 Joint opening structure of three-dimensional memory device and manufacturing method thereof
TW107107700A TWI665786B (en) 2017-03-08 2018-03-07 Joint openning structures of three-dimensional memory devices and methods for forming the same
US16/046,847 US10886291B2 (en) 2017-03-08 2018-07-26 Joint opening structures of three-dimensional memory devices and methods for forming the same
US16/951,141 US11482532B2 (en) 2017-03-08 2020-11-18 Joint opening structures of three-dimensional memory devices and methods for forming the same
US17/934,161 US11956953B2 (en) 2017-03-08 2022-09-21 Joint opening structures of three-dimensional memory devices and methods for forming the same
US18/431,112 US20240188291A1 (en) 2017-03-08 2024-02-02 Semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710134783.6A CN106653684B (en) 2017-03-08 2017-03-08 The forming method of three-dimensional storage and its channel pore structure

Related Child Applications (1)

Application Number Title Priority Date Filing Date
CN201910114048.8A Division CN109920790B (en) 2017-03-08 2017-03-08 Three-dimensional memory and forming method of channel hole structure thereof

Publications (2)

Publication Number Publication Date
CN106653684A true CN106653684A (en) 2017-05-10
CN106653684B CN106653684B (en) 2019-04-02

Family

ID=58847191

Family Applications (2)

Application Number Title Priority Date Filing Date
CN201710134783.6A Active CN106653684B (en) 2017-03-08 2017-03-08 The forming method of three-dimensional storage and its channel pore structure
CN201910114048.8A Active CN109920790B (en) 2017-03-08 2017-03-08 Three-dimensional memory and forming method of channel hole structure thereof

Family Applications After (1)

Application Number Title Priority Date Filing Date
CN201910114048.8A Active CN109920790B (en) 2017-03-08 2017-03-08 Three-dimensional memory and forming method of channel hole structure thereof

Country Status (1)

Country Link
CN (2) CN106653684B (en)

Cited By (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107731835A (en) * 2017-08-31 2018-02-23 长江存储科技有限责任公司 Three-dimensional storage of double step structure and forming method thereof
CN107994020A (en) * 2017-11-24 2018-05-04 长江存储科技有限责任公司 Three-dimensional storage forming method
WO2018161846A1 (en) * 2017-03-08 2018-09-13 Yangtze Memory Technologies Co., Ltd. Joint openning structures of three-dimensional memory devices and methods for forming the same
CN108565266A (en) * 2018-06-04 2018-09-21 长江存储科技有限责任公司 Form the method and three-dimensional storage of three-dimensional storage
CN108933145A (en) * 2018-09-25 2018-12-04 长江存储科技有限责任公司 Three-dimensional storage
CN109417075A (en) * 2018-09-20 2019-03-01 长江存储科技有限责任公司 Multiple pileup layer three-dimensional storage part
CN109496357A (en) * 2018-09-27 2019-03-19 长江存储科技有限责任公司 Semiconductor devices and its manufacturing method
CN109690773A (en) * 2018-12-07 2019-04-26 长江存储科技有限责任公司 Method, semi-conductor device manufacturing method
CN109817635A (en) * 2019-02-14 2019-05-28 长江存储科技有限责任公司 The forming method of 3D nand memory
CN109904171A (en) * 2019-02-14 2019-06-18 长江存储科技有限责任公司 Three-dimensional storage and preparation method thereof
CN110085599A (en) * 2019-03-25 2019-08-02 长江存储科技有限责任公司 Three-dimensional storage and preparation method thereof
WO2019155292A1 (en) * 2018-02-06 2019-08-15 International Business Machines Corporation Vertical memory cell with mechanical structural reinforcement
CN110289266A (en) * 2018-03-19 2019-09-27 东芝存储器株式会社 Semiconductor device
CN110534526A (en) * 2019-09-06 2019-12-03 长江存储科技有限责任公司 A kind of three-dimensional storage and its manufacturing method
CN110729305A (en) * 2018-07-17 2020-01-24 旺宏电子股份有限公司 Memory element and method for manufacturing the same
CN110858593A (en) * 2018-08-24 2020-03-03 美光科技公司 Method of forming vertically extending string array of memory cells
CN111063687A (en) * 2018-10-16 2020-04-24 旺宏电子股份有限公司 Three-dimensional memory and forming method thereof
WO2020082227A1 (en) * 2018-10-23 2020-04-30 Yangtze Memory Technologies Co., Ltd. Three-dimensional memory device having semiconductor plug formed using backside substrate thinning
CN111293123A (en) * 2018-09-13 2020-06-16 长江存储科技有限责任公司 Novel 3D NAND memory device and method of forming the same
TWI700783B (en) * 2018-06-08 2020-08-01 大陸商長江存儲科技有限責任公司 A method of forming dual-deck channel holes in 3d memory device
CN111540752A (en) * 2020-05-14 2020-08-14 长江存储科技有限责任公司 3D NAND memory and forming method thereof
CN111557047A (en) * 2019-06-28 2020-08-18 长江存储科技有限责任公司 Semiconductor device manufacturing method
CN111627916A (en) * 2018-04-18 2020-09-04 长江存储科技有限责任公司 Method for forming channel plug of three-dimensional memory device
CN112614852A (en) * 2020-12-01 2021-04-06 长江存储科技有限责任公司 3D NAND memory, manufacturing method thereof and preparation method of memory channel structure

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110600480A (en) * 2019-08-26 2019-12-20 长江存储科技有限责任公司 Memory and manufacturing method thereof
CN111244102A (en) * 2020-01-16 2020-06-05 长江存储科技有限责任公司 Three-dimensional memory and preparation method thereof

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100019310A1 (en) * 2008-07-25 2010-01-28 Kabushiki Kaisha Toshiba Semiconductor memory device
US20100109065A1 (en) * 2008-11-06 2010-05-06 Jin-Yong Oh Three-dimensional nonvolatile memory devices having sub-divided active bars and methods of manufacturing such devices
US20110151667A1 (en) * 2009-12-18 2011-06-23 Sung-Min Hwang Methods of Manufacturing Three-Dimensional Semiconductor Devices and Related Devices
CN102543877A (en) * 2010-12-29 2012-07-04 中国科学院微电子研究所 Method for manufacturing three-dimensional semiconductor storage device
US20150236038A1 (en) * 2014-02-20 2015-08-20 Sandisk Technologies Inc. Multilevel memory stack structure and methods of manufacturing the same
CN105304612A (en) * 2014-07-04 2016-02-03 旺宏电子股份有限公司 Three-dimensional laminated multichip structure and manufacturing method thereof

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5300419B2 (en) * 2008-11-05 2013-09-25 株式会社東芝 Nonvolatile semiconductor memory device and manufacturing method thereof
US9337145B2 (en) * 2014-09-10 2016-05-10 Kabushiki Kaisha Toshiba Semiconductor memory device
US9570463B1 (en) * 2015-10-15 2017-02-14 Sandisk Technologies Llc Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same
CN105261617B (en) * 2015-10-28 2018-03-30 中国科学院微电子研究所 Three-dimensional semiconductor device and its manufacture method

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100019310A1 (en) * 2008-07-25 2010-01-28 Kabushiki Kaisha Toshiba Semiconductor memory device
US20100109065A1 (en) * 2008-11-06 2010-05-06 Jin-Yong Oh Three-dimensional nonvolatile memory devices having sub-divided active bars and methods of manufacturing such devices
US20110151667A1 (en) * 2009-12-18 2011-06-23 Sung-Min Hwang Methods of Manufacturing Three-Dimensional Semiconductor Devices and Related Devices
CN102543877A (en) * 2010-12-29 2012-07-04 中国科学院微电子研究所 Method for manufacturing three-dimensional semiconductor storage device
US20150236038A1 (en) * 2014-02-20 2015-08-20 Sandisk Technologies Inc. Multilevel memory stack structure and methods of manufacturing the same
CN105304612A (en) * 2014-07-04 2016-02-03 旺宏电子股份有限公司 Three-dimensional laminated multichip structure and manufacturing method thereof

Cited By (62)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11956953B2 (en) 2017-03-08 2024-04-09 Yangtze Memory Technologies Co., Ltd. Joint opening structures of three-dimensional memory devices and methods for forming the same
US11482532B2 (en) 2017-03-08 2022-10-25 Yangtze Memory Technologies Co., Ltd. Joint opening structures of three-dimensional memory devices and methods for forming the same
WO2018161846A1 (en) * 2017-03-08 2018-09-13 Yangtze Memory Technologies Co., Ltd. Joint openning structures of three-dimensional memory devices and methods for forming the same
US10886291B2 (en) 2017-03-08 2021-01-05 Yangtze Memory Technologies Co., Ltd. Joint opening structures of three-dimensional memory devices and methods for forming the same
CN110313061B (en) * 2017-03-08 2020-06-26 长江存储科技有限责任公司 Bonding opening structure of three-dimensional memory device and forming method thereof
CN110313061A (en) * 2017-03-08 2019-10-08 长江存储科技有限责任公司 Coupling opening structure of three-dimensional storage equipment and forming method thereof
CN107731835A (en) * 2017-08-31 2018-02-23 长江存储科技有限责任公司 Three-dimensional storage of double step structure and forming method thereof
CN107994020B (en) * 2017-11-24 2019-01-01 长江存储科技有限责任公司 Three-dimensional storage forming method
CN107994020A (en) * 2017-11-24 2018-05-04 长江存储科技有限责任公司 Three-dimensional storage forming method
US10886364B2 (en) 2018-02-06 2021-01-05 International Business Machines Corporation Vertical memory cell with mechanical structural reinforcement
GB2582884B (en) * 2018-02-06 2021-04-07 Ibm Vertical memory cell with mechanical structural reinforcement
WO2019155292A1 (en) * 2018-02-06 2019-08-15 International Business Machines Corporation Vertical memory cell with mechanical structural reinforcement
GB2582884A (en) * 2018-02-06 2020-10-07 Ibm Vertical memory cell with mechanical structural reinforcement
CN111771278A (en) * 2018-02-06 2020-10-13 国际商业机器公司 Vertical memory cell with mechanical structural enhancement
CN110289266B (en) * 2018-03-19 2023-10-27 铠侠股份有限公司 Semiconductor device with a semiconductor device having a plurality of semiconductor chips
CN110289266A (en) * 2018-03-19 2019-09-27 东芝存储器株式会社 Semiconductor device
CN111627916A (en) * 2018-04-18 2020-09-04 长江存储科技有限责任公司 Method for forming channel plug of three-dimensional memory device
US11943928B2 (en) 2018-04-18 2024-03-26 Yangtze Memory Technologies Co., Ltd. Method for forming channel hole plug of three-dimensional memory device
US11309327B2 (en) 2018-04-18 2022-04-19 Yangtze Memory Technologies Co., Ltd. Method for forming channel hole plug of three-dimensional memory device
CN108565266A (en) * 2018-06-04 2018-09-21 长江存储科技有限责任公司 Form the method and three-dimensional storage of three-dimensional storage
CN108565266B (en) * 2018-06-04 2023-10-27 长江存储科技有限责任公司 Method for forming three-dimensional memory and three-dimensional memory
TWI700783B (en) * 2018-06-08 2020-08-01 大陸商長江存儲科技有限責任公司 A method of forming dual-deck channel holes in 3d memory device
CN110729305A (en) * 2018-07-17 2020-01-24 旺宏电子股份有限公司 Memory element and method for manufacturing the same
CN110858593A (en) * 2018-08-24 2020-03-03 美光科技公司 Method of forming vertically extending string array of memory cells
CN111293123A (en) * 2018-09-13 2020-06-16 长江存储科技有限责任公司 Novel 3D NAND memory device and method of forming the same
US11145667B2 (en) 2018-09-13 2021-10-12 Yangtze Memory Technologies Co., Ltd. 3D NAND memory device and method of forming the same
CN111293123B (en) * 2018-09-13 2021-02-26 长江存储科技有限责任公司 3D NAND memory device and method of forming the same
US11737263B2 (en) 2018-09-13 2023-08-22 Yangtze Memory Technologies Co., Ltd. 3D NAND memory device and method of forming the same
US11145645B2 (en) 2018-09-20 2021-10-12 Yangtze Memory Technologies Co., Ltd. Multi-stack three-dimensional memory devices
CN111415941A (en) * 2018-09-20 2020-07-14 长江存储科技有限责任公司 Multi-stacked-layer three-dimensional memory device
TWI691057B (en) * 2018-09-20 2020-04-11 大陸商長江存儲科技有限責任公司 3d memory device with plurality of layer stacks
CN111415941B (en) * 2018-09-20 2021-07-30 长江存储科技有限责任公司 Multi-stacked-layer three-dimensional memory device
US10600781B1 (en) 2018-09-20 2020-03-24 Yangtze Memory Technologies, Co., Ltd. Multi-stack three-dimensional memory devices
CN109417075A (en) * 2018-09-20 2019-03-01 长江存储科技有限责任公司 Multiple pileup layer three-dimensional storage part
CN108933145B (en) * 2018-09-25 2023-09-08 长江存储科技有限责任公司 Three-dimensional memory
CN108933145A (en) * 2018-09-25 2018-12-04 长江存储科技有限责任公司 Three-dimensional storage
CN109496357B (en) * 2018-09-27 2020-01-24 长江存储科技有限责任公司 Semiconductor device and method for manufacturing the same
CN109496357A (en) * 2018-09-27 2019-03-19 长江存储科技有限责任公司 Semiconductor devices and its manufacturing method
US11805643B2 (en) 2018-09-27 2023-10-31 Yangtze Memory Technologies Co., Ltd. Method of fabrication thereof a multi-level vertical memory device including inter-level channel connector
US11502094B2 (en) 2018-09-27 2022-11-15 Yangtze Memory Technologies Co., Ltd. Multi-level vertical memory device including inter-level channel connector
TWI701833B (en) * 2018-09-27 2020-08-11 大陸商長江存儲科技有限責任公司 Semiconductor device and method of manufacturing same
CN111063687B (en) * 2018-10-16 2022-03-25 旺宏电子股份有限公司 Three-dimensional memory and forming method thereof
CN111063687A (en) * 2018-10-16 2020-04-24 旺宏电子股份有限公司 Three-dimensional memory and forming method thereof
US10679985B2 (en) 2018-10-23 2020-06-09 Yangtze Memory Technologies Co., Ltd. Three-dimensional memory device having semiconductor plug formed using backside substrate thinning
WO2020082227A1 (en) * 2018-10-23 2020-04-30 Yangtze Memory Technologies Co., Ltd. Three-dimensional memory device having semiconductor plug formed using backside substrate thinning
US10665500B1 (en) 2018-12-07 2020-05-26 Yangtze Memory Technologies Co., Ltd. Methods of semiconductor device fabrication
CN109690773B (en) * 2018-12-07 2020-08-25 长江存储科技有限责任公司 Semiconductor device manufacturing method
CN109690773A (en) * 2018-12-07 2019-04-26 长江存储科技有限责任公司 Method, semi-conductor device manufacturing method
CN109904171A (en) * 2019-02-14 2019-06-18 长江存储科技有限责任公司 Three-dimensional storage and preparation method thereof
CN109817635A (en) * 2019-02-14 2019-05-28 长江存储科技有限责任公司 The forming method of 3D nand memory
CN109817635B (en) * 2019-02-14 2021-04-13 长江存储科技有限责任公司 Method for forming 3D NAND memory
CN110085599A (en) * 2019-03-25 2019-08-02 长江存储科技有限责任公司 Three-dimensional storage and preparation method thereof
US11672115B2 (en) 2019-06-28 2023-06-06 Yangtze Memory Technologies Co., Ltd. Methods of semiconductor device fabrication
US11183508B2 (en) 2019-06-28 2021-11-23 Yangtze Memory Technologies Co., Ltd. Methods of semiconductor device fabrication
CN111557047B (en) * 2019-06-28 2021-07-09 长江存储科技有限责任公司 Semiconductor device manufacturing method
US11871565B2 (en) 2019-06-28 2024-01-09 Yangtze Memory Technologies Co., Ltd. Methods of semiconductor device fabrication
CN111557047A (en) * 2019-06-28 2020-08-18 长江存储科技有限责任公司 Semiconductor device manufacturing method
CN110534526B (en) * 2019-09-06 2022-01-04 长江存储科技有限责任公司 Three-dimensional memory and manufacturing method thereof
CN110534526A (en) * 2019-09-06 2019-12-03 长江存储科技有限责任公司 A kind of three-dimensional storage and its manufacturing method
CN111540752B (en) * 2020-05-14 2021-05-18 长江存储科技有限责任公司 3D NAND memory and forming method thereof
CN111540752A (en) * 2020-05-14 2020-08-14 长江存储科技有限责任公司 3D NAND memory and forming method thereof
CN112614852A (en) * 2020-12-01 2021-04-06 长江存储科技有限责任公司 3D NAND memory, manufacturing method thereof and preparation method of memory channel structure

Also Published As

Publication number Publication date
CN106653684B (en) 2019-04-02
CN109920790A (en) 2019-06-21
CN109920790B (en) 2022-04-12

Similar Documents

Publication Publication Date Title
CN106653684B (en) The forming method of three-dimensional storage and its channel pore structure
CN106920772B (en) The forming method of three-dimensional storage and its channel pore structure
CN108565266A (en) Form the method and three-dimensional storage of three-dimensional storage
CN110114877A (en) Three-dimensional storage part and preparation method thereof
CN107464817B (en) A kind of production method of 3D nand flash memories
CN110364536A (en) The manufacturing method and three-dimensional storage of three-dimensional storage
CN107564915A (en) A kind of 3D nand memories part and its manufacture method
CN110313061A (en) Coupling opening structure of three-dimensional storage equipment and forming method thereof
CN103730470B (en) 3-D stacks semiconductor structure and manufacture method thereof
CN104103641B (en) Nonvolatile semiconductor memory member and its manufacturing method
CN109417076A (en) Plug and forming method thereof between storehouse in three-dimensional storage part
CN110047844A (en) Three-dimensional perpendicular single-transistor ferroelectric memory and preparation method thereof
CN107482012B (en) Three-dimensional storage and preparation method thereof
CN110289265A (en) The forming method of 3D nand memory
CN107039443A (en) Memory component and preparation method thereof
CN107731794A (en) Array of capacitors and forming method thereof, semiconductor devices
CN110224059A (en) Semiconductor device and forming method thereof
CN110289263A (en) 3D nand memory and forming method thereof
CN108831889A (en) Three-dimensional storage
CN110112133A (en) Three-dimensional storage part and preparation method thereof
CN109037229A (en) A kind of semiconductor devices and its manufacturing method
CN107706184A (en) The preparation method and its structure of a kind of three-dimensional storage
CN104979357A (en) Nonvolatile Memory Device Including A Source Line Having A Three-dimensional Shape
CN109817635A (en) The forming method of 3D nand memory
CN109686738A (en) Form the method and three-dimensional storage of three-dimensional storage

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant