CN106649927A - Real-time simulation combined modeling method for power electronic elements based on FPGA - Google Patents
Real-time simulation combined modeling method for power electronic elements based on FPGA Download PDFInfo
- Publication number
- CN106649927A CN106649927A CN201610839378.XA CN201610839378A CN106649927A CN 106649927 A CN106649927 A CN 106649927A CN 201610839378 A CN201610839378 A CN 201610839378A CN 106649927 A CN106649927 A CN 106649927A
- Authority
- CN
- China
- Prior art keywords
- time
- simulation
- state
- turn
- diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/33—Design verification, e.g. functional simulation or model checking
- G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation
- G06F30/331—Design verification, e.g. functional simulation or model checking using simulation with hardware acceleration, e.g. by using field programmable gate array [FPGA] or emulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Supply And Distribution Of Alternating Current (AREA)
- Management, Administration, Business Operations System, And Electronic Commerce (AREA)
Abstract
A real-time simulation combined modeling method for power electronic elements based on FPGA is disclosed, which comprises the steps of carrying out modeling, setting the length of real-time simulation steps, establishing combined models, uploading parameters, carrying out simulation, judging condition, calculating historical quantity, calculating voltages, calculating electric currents and judging simulation time. In the offline environment, modeling is carried out on the electric power system by utilizing basic elements of the electrical system. The length of the real-time simulation steps of the electrical system is set for delta t. The combined models are established through the parallel circuit which consists of switching devices and diodes. The parameters are uploaded to the online simulation environment. The simulation starts to be carried out in the online environment. The condition of the switching devices and the diodes is judged. The historical quantity of the switching devices and the diodes is calculated. The voltage of every node is calculated. The electric currents of step branches at the moment of the switching devices and the diodes are calculated. The simulation time whether reaches simulation or not is judged. Single elements can be made by the established models which can carry out combined modeling by utilizing various controllable power electronic devices and the diodes. The real-time simulation combined modeling method for power electronic elements based on FPGA has the advantages of improving the universal property of the power electronic elements modeling, reducing the number of the power electronic elements effectively and improving the processing speed of the power electronic elements in the real-time simulation under the premise of guaranteeing simulation accuracy.
Description
Technical field
The invention belongs to Computer Control Technology field, more particularly to a kind of power electronic element based on FPGA is real-time
Simulation Composition modeling method.
Background technology
With the interconnection of regional power grid, modern power systems are constantly expanded in scale, D.C. high voltage transmission and FACTS etc.
High-power electric and electronic is equipped in transmission system and is widely applied, the cleaning energy such as renewable energy power generation, distributed power source
Being introduced into equally to promote power electronic equipment in power distribution network of source is come, and power system is increasingly sophisticated on element is constituted, no
With the intertexture of the dynamic characteristic of time scale, become the principal character of modern power systems, therefore for electric system simulation skill
Art proposes new challenge.Operation of Electric Systems characteristic research only by Power System Off-line calculate analysis be it is inadequate, in a large number
Operation of Electric Systems characteristic research, equipment Test must be completed by the test of the hardware-in-loop simulation that carries out in laboratory,
Therefore power system real-time simulation has very important significance.
Power system real-time simulation is the electromagnetic transient simulation with real time Complete Synchronization, and its major function is to pass through
Protection and control device that hardware-in-loop simulation (Hardware-in-the-loop) test is dispatched from the factory.Real-time simulator can with treat
Measurement equipment is connected, and simulates more real transient condition, it is to avoid Devices to test produces impact to real system.From power grade
See, hardware-in-loop simulation can be divided into signal type hardware-in-loop simulation and power-type hardware-in-loop simulation.Exist in signal type hardware
In ring emulation, equipment under test is usually secondary controller, protection equipment, intelligent terminal etc., carries out between real-time simulator low
The signal interaction of power.Comparatively, in power-type hardware-in-loop simulation, Devices to test is generally actual electrical equipment, than
Such as engine, power electronic equipment, need to realize larger flow of power and real-time simulator between, therefore in real-time simulation
Power amplifier is generally required between device and Devices to test and enters line interface.
Conventional electric power system real-time simulation is based primarily upon the business real-time simulation platform such as RTDS, HYPERSIM, eMEGAsim,
But modern power systems are the characteristics of be provided with new：1) a large amount of high-frequency power electronic equipment are introduced in modern power systems, this
So that the consumption of real-time simulator computing resource is increasing, higher requirement is proposed to the calculating performance of real-time simulator,
When studying relevant issues using real-time simulation platforms such as RTDS, such as the not method such as Help of System equivalence, the cost of research and cost
It is excessive, also it is unfavorable for the extension of problem.On the other hand, system equivalent can cause the operation characteristic of electrical network to change, and be related to
During power system characteristic research, the accuracy of emulation can be had influence on because of the equivalent simplification of electrical network；2) electric power such as HVDC, FACTS electricity
Sub-device generally adopts turn-off device, to accurately reflect the transient process of system, including the impact of power electronic equipment needs
Using less simulation step length, this further exacerbates the contradiction of computing resource, and the real-time to emulating propose it is higher
Requirement.Therefore, power system real-time simulation faces computing capability with precision and the double challenge of economy.
In order to realize the power system real-time simulation containing a large amount of high-frequency power electronic equipment, advanced bottom is needed to calculate hard
Part and quick simulation algorithm.
In bottom computing hardware aspect, most real-time simulator is using the work based on RISC (reduced instruction level computer)
Stand, many DSP, multi -CPU computer, PC group, multi-core technology etc., real-time computing, this kind of method are reached by concurrent technique
The most of data processing work being related to is still that serial is carried out.In addition, in order to realize that large scale system is emulated, needing to arrange a large amount of
Data processing unit, the data communication between processing unit can become the Main Bottleneck of calculating speed again.By contrast, based on existing
The devices at full hardware of field programmable logic gate array (field-programmable gate array, FPGA) is calculated as real-time simulation
There is provided a kind of new approaches.FPGA inherently fully configurable intrinsic hardware concurrent structures, its logical resource can configure
For many parallel processing elements and realize multi-layer highly-parallel calculate；Meanwhile, there are a large amount of embedded blocks on fpga chip
RAM, can be configured to a large amount of distributed ROM or RAM, and its data and address width, port number all can configure, and tradition is imitative in real time
Internal memory and bus are mostly shared in true device, and port is limited, limit the efficiency of transmission of data；FPGA allows to use flowing water
Line technology, therefore data-handling efficiency is improve, also, FPGA also possesses the interconnector that a large amount of transmission speeds are exceedingly fast, and will not
Introduce excessive communication delay；Finally, FPGA has restructural characteristic, can adjust with making to measure in real time for simulation example
Emulator, to reach most fast calculating speed.
In simulation algorithm aspect, the basic method for solving of typical power system transient state real-time simulation problem can be divided into node
Analytic approach (nodal analysis) and State-Variable Analysis Method (state space analysis) two classes.Relative to state
Variable analysis, modal analysis algorithm realize the aspects such as difficulty, simulation calculation speed have greater advantage, therefore EMTP,
In the transient state real-time simulation instrument such as the transient off-line such as PSCAD/EMTDC emulation tool and RTDS, HYPERSIM, all with node point
Analysis method is used as basic framework.
In the off-line simulation based on nodal method, electronic power conversion device is generally divided into two kinds of modeling methods：1) topology
Modeling.The method emphasizes the assembleability of the individuality of switch element modeling and current transformer modeling, will switch individuality from component-level
It is indicated, is modeled according to the real topology combination of various converter plants based on this.Although the method causes
The modeling of electronic power convertor is complicated, but can be to obtain the electric information inside device, in the physical sense closer in
Real system, with very strong versatility and generality；2) modeling is exported, the method is directed to specific electronic power conversion
Device, ignores the transient behavior of single switch element, regards whole electronic power conversion device as a multiport network, according to defeated
Entering output characteristics carries out modular Equivalent Modeling.This modeling method is relatively easy, but due to have ignored the inside of device
Information, it is impossible to carry out the analysis of bulk properties, the flexibility of model and the scope of application all decrease, for each electric power electricity
Sub- converter plant is required for carrying out Independent modeling, and versatility is poor, and when (electric containing energy-storage travelling wave tube in power electronic system
Sense, electric capacity) when, the modeling method is difficult to realize.
In power electronics real-time simulation, generally using the little step-length switch models based on topology model construction method, concrete grammar
For：Simulated using small inductor during switch closure, simulated using small capacitances when switching off, formula (1) row have been write and used trapezoidal method poor
Characteristic equation when switching off and closing got.
Inductance when Ls represents that switch is closed in formula (1), Cs represents electric capacity when switching off, i (t) and i (t- Δ t) tables
Show the switching current of this time step and a upper time step, (t- Δ t) represent the switch electricity of this time step and a upper time step to u (t) and u
Pressure, Δ t represents simulation step length.If admittance when formula (1) breaker in middle disconnects and closes meets formula (2)
Admittance matrix is constant when then ensure that on off state switches, and only relies on history amount and changes i.e. changeable on off state.
During using the method, no matter how switch changes, admittance matrix remains constant, therefore need to only store an inverse matrix i.e.
Can, therefore greatly alleviate storage pressure.In addition, when making in this way, the switching of on off state is except causing numerical value
Vibration is outer, can also produce false energy oscillation, and the generation of this energy oscillation comes from perceptual system breaker in middle from closure (electricity
Sense) generate energy transmission when (electric capacity) switching is disconnected.In order to eliminate as much as the impact of numerical oscillation and energy oscillation,
Ensure numerical stability, it is possible to use Rs, Cs series arm analog switch disconnects, now switch shown in computing formula such as formula (3).
Formula (2) should also be adjusted to formula (4)
At present, some researchers expand research for the power system real-time simulation based on FPGA, although based on height
The cooperation of the FPGA of performance and little step-length switch models is very suitable for power system real-time simulation, but power electronic element
Quantity becomes new problem again.A large amount of controllable power electronic elements at this stage, such as IGBT, GTO, MOSFET using when it is big
Many inverse parallel sustained diodes, this allows for only one IGBT and controls current transformer entirely just comprising 12 power electronic elements, works as emulation
When larger, power electronic element quantity also will be further increased, so as to have a strong impact on emulator for power electronics unit
The processing speed of part；Meanwhile, the connected mode in polytype power electronic equipment and its different application is more, while lacking
Unified simulation model.
The content of the invention
In order to solve the above problems, it is an object of the invention to provide a kind of power electronic element based on FPGA is imitated in real time
True compositional modeling method.
In order to achieve the above object, the power electronic element real-time simulation compositional modeling side based on FPGA that the present invention is provided
Method includes the following steps for carrying out in order：
The first step：Under offline environment, power system is modeled using electrical system primary element, read substantially without
Source element, circuit element, source element, circuit breaker element, the basic parameter information of power electronic element and topological connection relation,
According to the integrated solution framework of electrical system, the processing mode of above-mentioned all kinds of primary elements and Matrix Solving side in real-time simulator
Formula, calculating electrical system carries out a required clock periodicity n of time step resolvinge, according to driving clock frequency f of FPGA and
Electrical system clock periodicity ne, calculate the calculating time t needed for each time step emulation corresponding to electrical systeme, wherein te=
ne/f；
Second step：Under offline environment, power plant step-length is set as Δ t, and te≤Δt；
3rd step：Under offline environment, according to above-mentioned selected power plant step delta t, for by IGBT,
GTO and MOSFET sets up built-up pattern in the parallel circuit that interior turn-off device and diode D are constituted, using traditional small step
Inductance L when long switch models determine that turn-off device and diode D are closedfAnd Ld, and then determine both equivalent conductances Gf
And Gd, and electric capacity C when disconnectingf、CdWith resistance Rf、Rd, both switch original states be set to disconnect；
4th step：Under offline environment, according to above-mentioned selected power plant step delta t, the first step is calculated
Described in basic passive element, circuit element, source element, the equivalent conductance of circuit breaker element, history entries current source, update
Calculating parameter, calculate node admittance matrix inverse matrix, by the equivalent conductance for calculating, history entries current source, update calculating parameter,
Equivalent conductance G in admittance matrix inverse matrix, the 3rd stepfAnd GdAnd the basic passive element described in the first step, circuit unit
Part, source element, circuit breaker element, the basic parameter information of power electronic element and topological connection relation are uploaded to in-circuit emulation
Environment；
5th step：Emulation moment t=0 under thread environment, is being set；
6th step：Start the emulation of next time step, make t=t+ Δ t；
7th step：For turn-off device, if thereon a time step is off state, detect its control signal, upper one
The conducting state of time step terminal voltage and upper time step diode D, when control signal be " 1 " and terminal voltage reach conducting voltage and
Upper time step diode D is off state, then the turn-off device put described in the first step is in the conduction state, is represented
For inductance LfIf being unsatisfactory for, turn-off device is still off state, is denoted as electric capacity CfWith resistance RfSeries circuit；
Simultaneously for diode D, if thereon a time step is off state, its terminal voltage and upper time step turn-off device are detected
Conducting state, when terminal voltage reaches conducting voltage and upper time step turn-off device is off state, then put at diode D
In conducting state, inductance L is denoted asdIf being unsatisfactory for, diode D is still off state, is denoted as electric capacity CdWith
Resistance RdSeries circuit；Wherein, the condition adjudgement of described turn-off device and diode D is in addition real using parallel mode
Existing；
8th step：Being respectively directed to turn-off device and diode D carries out the calculating of history amount hist；
9th step：Electrical system carries out a time step and calculates, and calculates each node voltage；
Tenth step：The branch current of this time step of turn-off device and diode D is calculated respectively, if corresponding states is conducting
State, then branch current computing formula beIf corresponding states is off state, branch current is calculated
Formula isEquivalent admittance in formulaU (t) represents that this time step is calculated
Terminal voltage；
11st step：It is in the conduction state for turn-off device, Ruo Qiben time steps, then detect its control signal, this when
Step branch current, when control signal is that " 0 " or branch current are less than cut-off current, then it is off state to put turn-off device, if
It is unsatisfactory for, then puts turn-off device for conducting state；Simultaneously for diode D, if this time step is in the conduction state, detect
Its this time step branch current, when branch current is less than cut-off current, then puts diode D and is off state, if being unsatisfactory for, puts
Diode D is conducting state；
12nd step：Judge whether simulation time reaches emulation and end the moment, such as reach emulation and end the moment, then emulation knot
Beam；Otherwise return the 6th step.
In the 8th step, described is respectively directed to the method that turn-off device and diode D carry out the calculating of history amount hist
It is：
If corresponding states is conducting state, history amount computing formula isIf right
State is answered to be off state, then history amount computing formula is：
L in formulasInductance L when turning on corresponding to turn-off device and diode DfAnd Ld, Cs、RsCorresponding to turn-off device
Electric capacity C when turning off with diode Df、CdWith resistance Rf、Rd, ((t- Δs t) represents respectively the branch road of a upper time step to t- Δ t) to i with u
Electric current and terminal voltage.
In the tenth step, the method for the branch current of described this time step for calculating turn-off device and diode D respectively
It is：If corresponding states is conducting state, branch current computing formula isIf corresponding states is shut-off
State, then branch current computing formula beEquivalent admittance in formulau
T () represents the terminal voltage that this time step is calculated.
What the present invention was provided is mainly directed towards power train based on the power electronic element real-time simulation compositional modeling method of FPGA
The problem that quantity is various and model commonality is relatively low of power electronic element in system real-time simulation, the model set up can will be more
Plant controllable power electronic devices and be combined modeling with diode, form discrete component, improve power electronic element modeling
Versatility, and the quantity of power electronic element is effectively reduced, can improve in real-time simulation on the premise of simulation accuracy is ensured
The processing speed of power electronic element.
Description of the drawings
The parallel circuit figure that Fig. 1 is made up of turn-off device and diode D.
Fig. 2 is that the power electronics built-up pattern history amount based on FPGA solves module.
Fig. 3 is that the power electronics built-up pattern branch current based on FPGA solves module.
Fig. 4 is the power electronic element real-time simulation compositional modeling method flow diagram based on FPGA that the present invention is provided.
Fig. 5 is that typical light stores hybrid power system structural representation.
Fig. 6 is inverter output A phase current simulation results.
Fig. 7 is inverter output power simulation result.
Fig. 8 is battery power output simulation result.
Fig. 9 is photovoltaic array power output simulation result.
Figure 10 is photovoltaic cell output voltage simulation result.
Figure 11 is DC bus-bar voltage simulation result.
Specific embodiment
The power electronic element real-time simulation based on the FPGA below in conjunction with the accompanying drawings present invention provided with specific embodiment
Compositional modeling method is described in detail.
As shown in figure 4, the present invention provide included based on the power electronic element real-time simulation compositional modeling method of FPGA
The following steps for carrying out in order：
The first step：Under offline environment, power system is modeled using electrical system primary element, read substantially without
Source element, circuit element, source element, circuit breaker element, the basic parameter information of power electronic element and topological connection relation,
According to the integrated solution framework of electrical system, the processing mode of above-mentioned all kinds of primary elements and Matrix Solving side in real-time simulator
Formula, calculating electrical system carries out a required clock periodicity n of time step resolvinge, according to driving clock frequency f of FPGA and
Electrical system clock periodicity ne, calculate the calculating time t needed for each time step emulation corresponding to electrical systeme, wherein te=
ne/f；In following example, clock periodicity neFor 148, drive clock frequency f to take 135MHz, therefore calculate time teFor
1.096μs；
Second step：Under offline environment, power plant step-length is set as Δ t, the resolving of electrical system will head
First ensure real-time, i.e. te≤ Δ t, and power plant step delta t is selected on the premise of simulation accuracy is ensured；
In following example, power plant step delta t is set to 1.096 μ s；
3rd step：Under offline environment, according to above-mentioned selected power plant step delta t, for such as Fig. 1 institutes
That what is shown sets up built-up pattern by IGBT, GTO and MOSFET in the parallel circuit that interior turn-off device and diode D are constituted, profit
Inductance L when determining turn-off device and diode D closures with traditional little step-length switch modelsfAnd Ld, and then determine both
Equivalent conductance GfAnd Gd, and electric capacity C when disconnectingf、CdWith resistance Rf、Rd, both switch original states be set to disconnect；
In following example, inductance LfAnd LdIt is disposed as 6.554e-6H, electric capacity Cf、CdIt is disposed as 5.0e-8F, resistance Rf、Rd
It is set to 1 Ω；
4th step：Under offline environment, according to above-mentioned selected power plant step delta t, the first step is calculated
Described in basic passive element, circuit element, source element, the equivalent conductance of circuit breaker element, history entries current source, update
Calculating parameter, calculate node admittance matrix inverse matrix, by the equivalent conductance for calculating, history entries current source, update calculating parameter,
Equivalent conductance G in admittance matrix inverse matrix, the 3rd stepfAnd GdAnd the basic passive element described in the first step, circuit unit
Part, source element, circuit breaker element, the basic parameter information of power electronic element and topological connection relation are uploaded to in-circuit emulation
Environment；
5th step：Emulation moment t=0 under thread environment, is being set；
6th step：Start the emulation of next time step, make t=t+ Δ t；
7th step：For turn-off device, if thereon a time step is off state, detect its control signal, upper one
The conducting state of time step terminal voltage and upper time step diode D, when control signal be " 1 " and terminal voltage reach conducting voltage and
Upper time step diode D is off state, then the turn-off device put described in the first step is in the conduction state, is represented
For inductance LfIf being unsatisfactory for, turn-off device is still off state, is denoted as electric capacity CfWith resistance RfSeries circuit；
Simultaneously for diode D, if thereon a time step is off state, its terminal voltage and upper time step turn-off device are detected
Conducting state, when terminal voltage reaches conducting voltage and upper time step turn-off device is off state, then put at diode D
In conducting state, inductance L is denoted asdIf being unsatisfactory for, diode D is still off state, is denoted as electric capacity CdWith
Resistance RdSeries circuit；Wherein, the condition adjudgement of described turn-off device and diode D is in addition real using parallel mode
Existing；
8th step：Being respectively directed to turn-off device and diode D carries out the calculating of history amount hist, if corresponding states is conducting
State, then history amount computing formula beIf corresponding states is off state, history amount
Computing formula is：
L in formulasInductance L when turning on corresponding to turn-off device and diode DfAnd Ld, Cs、RsCorresponding to turn-off device
Electric capacity C when turning off with diode Df、CdWith resistance Rf、Rd, ((t- Δs t) represents respectively the branch road of a upper time step to t- Δ t) to i with u
Electric current and terminal voltage, corresponding FPGA realizes that process is as shown in Figure 2.Wherein, the history of described turn-off device and diode D
Amount is solved and realized using parallel mode；
9th step：Electrical system carries out a time step and calculates, and calculates each node voltage；
Tenth step：The branch current of this time step of turn-off device and diode D is calculated respectively, if corresponding states is conducting
State, then branch current computing formula beIf corresponding states is off state, branch current is calculated
Formula isEquivalent admittance in formulaU (t) represents that this time step is calculated
The terminal voltage for going out, corresponding FPGA realizes that process is as shown in Figure 3.Wherein, the branch road electricity of described turn-off device and diode D
Stream calculation is realized using parallel mode；
11st step：It is in the conduction state for turn-off device, Ruo Qiben time steps, then detect its control signal, this when
Step branch current, when control signal is that " 0 " or branch current are less than cut-off current, then it is off state to put turn-off device, if
It is unsatisfactory for, then puts turn-off device for conducting state；Simultaneously for diode D, if this time step is in the conduction state, detect
Its this time step branch current, when branch current is less than cut-off current, then puts diode D and is off state, if being unsatisfactory for, puts
Diode D is conducting state；Wherein, the condition adjudgement of described turn-off device and diode D be using parallel mode in addition
Realize；
12nd step：Judge whether simulation time reaches emulation and end the moment, such as reach emulation and end the moment, then emulation knot
Beam；Otherwise return the 6th step.
The present inventor stores hybrid power system as example to verify the electricity based on FPGA of present invention offer using typical light
The effect of power electronic component real-time simulation compositional modeling method.Fig. 5 is that typical light stores hybrid power system structural representation.As schemed
Shown in 5, within the system, batteries pass through two-way DC/DC converters with photovoltaic array and in dc bus, wherein, photovoltaic
Array is using MPPT controls；Batteries are discharged and Boost circuit and Buck reduction voltage circuit patterns are respectively adopted when charging,
For maintaining busbar voltage constant；Three-phase PMW inverters maintain the output of whole system active and reactive power using PQ controls
It is constant.DC bus-bar voltage is controlled to 750V, idle reference value QrefIt is set to 0Var, it is ensured that unity power factor runs, temperature sets
It is set to 298.15K.If the initial intensity of illumination of system is 1000W/m2, the instruction of three-phase PMW inverter active powers is 10kW, is
System is reached after stable state, and intensity of illumination is by 1000W/m2Drop to 800W/m2, active power is instructed and is reduced to 4kW after subsequent 1s.
The performing environment of the example is altera corpThe official's development boards of IV GX FPGA 530.Development board
It are furnished with Stratix IV Series FPGAs EP4SGX530KH40C2N, the chip includes 531200 logical blocks, and 212480 certainly
Adaptation logic module, 1280 M9K memories, 64 M144K memories, 1024 18x18 special multipliers, 8 PLL and
744 I/O.Except EP4SGX530KH40C2N chips, development board additionally provides the clock circuit of multiple frequencies, and 3 users can
The peripheral circuits such as configuration button, a large amount of external memory storages, PCI Express slots, 10/100/1 000Ethernet interfaces.
In terms of simulation scale, system includes 15 RLC elements, 9 IGBT, 10 diode D, by present invention offer
The power electronic element real-time simulation built-up pattern based on FPGA, sum is reduced to into 10 for the power electronic element of 19
Built-up pattern, improves processing speed of the real-time emulation system for power electronic element；Meanwhile, in the example, except 9
The composite module of IGBT and diode D, also comprising 1 single diode D, these elements are by present invention offer based on FPGA
Power electronic element real-time simulation compositional modeling method be modeled, embody the versatility of modeling.
In terms of simulation accuracy, Fig. 6～11 compare the power electronics unit based on FPGA set up using the inventive method
The simulation result of part real-time simulation built-up pattern and business simulation software PSCAD/EMTDC, the simulation step length of PSCAD/EMTDC
For 1.096 μ s.It can be seen that PSCAD/EMTDC simulation results and the simulation result of the inventive method stable state with it is temporary
Can fit like a glove during state, the dynamic response characteristic of the two maintains highly consistent, has embodied good emulation essence
Degree, fully demonstrates the feasibility of the power electronic element real-time simulation compositional modeling method based on FPGA of present invention offer.
Above numerical testing proves that the power electronic element real-time simulation combination based on FPGA that the present invention is provided is built
Mould method has preferable feasibility and applicability, to realize that the power system real-time simulation containing a large amount of power electronic equipments is provided
A kind of good resolving ideas.
Claims (3)
1. a kind of power electronic element real-time simulation compositional modeling method based on FPGA, it is characterised in that：It is described based on
The power electronic element real-time simulation compositional modeling method of FPGA includes the following steps for carrying out in order：
The first step：Under offline environment, power system is modeled using electrical system primary element, reads substantially passive unit
Part, circuit element, source element, circuit breaker element, the basic parameter information of power electronic element and topological connection relation, according to
The integrated solution framework of electrical system, the processing mode of above-mentioned all kinds of primary elements and Matrix Solving mode in real-time simulator,
Calculating electrical system carries out a required clock periodicity n of time step resolvinge, according to driving clock frequency f and electricity of FPGA
Gas system clock cycle number ne, calculate the calculating time t needed for each time step emulation corresponding to electrical systeme, wherein te=
ne/f；
Second step：Under offline environment, power plant step-length is set as Δ t, and te≤Δt；
3rd step：Under offline environment, according to above-mentioned selected power plant step delta t, for by IGBT, GTO
Built-up pattern is set up in the parallel circuit that interior turn-off device and diode D are constituted with MOSFET, using traditional little step-length
Inductance L when switch models determine that turn-off device and diode D are closedfAnd Ld, and then determine both equivalent conductances GfWith
Gd, and electric capacity C when disconnectingf、CdWith resistance Rf、Rd, both switch original states be set to disconnect；
4th step：Under offline environment, according to above-mentioned selected power plant step delta t, institute in the first step is calculated
Basic passive element, circuit element, source element, the equivalent conductance of circuit breaker element, history entries current source, the renewal calculating stated
Parameter, calculate node admittance matrix inverse matrix by the equivalent conductance for calculating, history entries current source, updates calculating parameter, admittance
Equivalent conductance G in matrix inverse matrix, the 3rd stepfAnd GdAnd basic passive element, circuit element, the electricity described in the first step
Source element, circuit breaker element, the basic parameter information of power electronic element and topological connection relation are uploaded to in-circuit emulation environment；
5th step：Emulation moment t=0 under thread environment, is being set；
6th step：Start the emulation of next time step, make t=t+ Δ t；
7th step：For turn-off device, if thereon a time step is off state, its control signal, a upper time step are detected
The conducting state of terminal voltage and upper time step diode D, when control signal is for " 1 " and terminal voltage reaches conducting voltage and upper one
Time step diode D is off state, then the turn-off device put described in the first step is in the conduction state, is denoted as electricity
Sense LfIf being unsatisfactory for, turn-off device is still off state, is denoted as electric capacity CfWith resistance RfSeries circuit；Together
When, for diode D, if thereon a time step is off state, detect its terminal voltage and upper time step turn-off device
Conducting state, when terminal voltage reaches conducting voltage and upper time step turn-off device is off state, then puts diode D and is in
Conducting state, is denoted as inductance LdIf being unsatisfactory for, diode D is still off state, is denoted as electric capacity CdAnd electricity
Resistance RdSeries circuit；Wherein, the condition adjudgement of described turn-off device and diode D is realized using parallel mode
's；
8th step：Being respectively directed to turn-off device and diode D carries out the calculating of history amount hist；
9th step：Electrical system carries out a time step and calculates, and calculates each node voltage；
Tenth step：The branch current of this time step of turn-off device and diode D is calculated respectively, if corresponding states is conducting shape
State, then branch current computing formula beIf corresponding states is off state, branch current calculates public
Formula isEquivalent admittance in formulaU (t) represents that this time step is calculated
Terminal voltage；
11st step：It is in the conduction state for turn-off device, Ruo Qiben time steps, then detect its control signal, this time step
Road electric current, when control signal is that " 0 " or branch current are less than cut-off current, then it is off state to put turn-off device, if discontented
Foot, then put turn-off device for conducting state；Simultaneously for diode D, if this time step is in the conduction state, it is detected
Time step branch current, when branch current is less than cut-off current, then puts diode D and is off state, if being unsatisfactory for, puts two poles
Pipe D is conducting state；
12nd step：Judge whether simulation time reaches emulation and end the moment, such as reach emulation and end the moment, then emulation terminates；
Otherwise return the 6th step.
2. the power electronic element real-time simulation compositional modeling method based on FPGA according to claim 1, its feature exists
In：It is described to be respectively directed to turn-off device and diode D carries out the method for history amount hist calculating and is in the 8th step：
If corresponding states is conducting state, history amount computing formula isIf correspondence shape
State is off state, then history amount computing formula is：
L in formulasInductance L when turning on corresponding to turn-off device and diode DfAnd Ld, Cs、RsCorresponding to turn-off device and two
Electric capacity C when pole pipe D is turned offf、CdWith resistance Rf、Rd, ((t- Δs t) represents respectively the branch current of a upper time step to t- Δ t) to i with u
And terminal voltage.
3. the power electronic element real-time simulation compositional modeling method based on FPGA according to claim 1, its feature exists
In：In the tenth step, the method for the described branch current of this time step of calculating turn-off device and diode D respectively is：If
Corresponding states is conducting state, then branch current computing formula isIf corresponding states is off state,
Then branch current computing formula isEquivalent admittance in formulaU (t) tables
Show the terminal voltage that this time step is calculated.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610839378.XA CN106649927B (en) | 2016-09-21 | 2016-09-21 | FPGA-based real-time simulation combined modeling method for power electronic element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610839378.XA CN106649927B (en) | 2016-09-21 | 2016-09-21 | FPGA-based real-time simulation combined modeling method for power electronic element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106649927A true CN106649927A (en) | 2017-05-10 |
| CN106649927B CN106649927B (en) | 2020-03-24 |
Family
ID=58852508
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610839378.XA Active CN106649927B (en) | 2016-09-21 | 2016-09-21 | FPGA-based real-time simulation combined modeling method for power electronic element |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106649927B (en) |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108963980A (en) * | 2018-04-26 | 2018-12-07 | 上海海事大学 | A kind of multi-modal failure separation method based on Fault Isolation library |
| CN109802386A (en) * | 2019-03-07 | 2019-05-24 | 内蒙古电力(集团)有限责任公司内蒙古电力科学研究院分公司 | The full electromagnetical transient emulation method of power grid |
| CN110414118A (en) * | 2019-07-23 | 2019-11-05 | 上海电机学院 | A kind of Boost modeling method and application based on separate type modeling |
| CN110472338A (en) * | 2019-08-16 | 2019-11-19 | 上海交通大学 | Improvement electromagnetical transient emulation method suitable for Field Programmable Logic Array |
| CN110516276A (en) * | 2019-06-05 | 2019-11-29 | 西北工业大学太仓长三角研究院 | HF switch power inverter real-time emulation method based on FPGA |
| CN110858263A (en) * | 2018-08-10 | 2020-03-03 | 中车株洲电力机车研究所有限公司 | Electrical circuit modeling method, simulation test system and simulation terminal |
| CN111725818A (en) * | 2019-03-18 | 2020-09-29 | 杨利 | Three-phase weak current network converter group grid-connected simulation method and simulation terminal |
| CN112883677A (en) * | 2021-02-25 | 2021-06-01 | 上海交通大学 | Electromagnetic transient simulation method for real-time simulation of power electronic converter |
| CN113268942A (en) * | 2020-02-17 | 2021-08-17 | 全球能源互联网研究院有限公司 | Real-time simulation method and system of hybrid direct-current circuit breaker suitable for FPGA |
| CN113515914A (en) * | 2021-04-26 | 2021-10-19 | 中国科学院上海微系统与信息技术研究所 | OTS gating device simulation model |
| CN113723032A (en) * | 2021-08-30 | 2021-11-30 | 全球能源互联网研究院有限公司 | Circuit rapid resolving method and system for large-scale nodes |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103793562A (en) * | 2014-01-05 | 2014-05-14 | 天津大学 | Active power distribution network transient state real-time simulation system designing method based on FPGA |
| CN103942372A (en) * | 2014-04-04 | 2014-07-23 | 天津大学 | Active power distribution network transient state real-time simulation multi-rate interface method based on FPGA |
-
2016
- 2016-09-21 CN CN201610839378.XA patent/CN106649927B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103793562A (en) * | 2014-01-05 | 2014-05-14 | 天津大学 | Active power distribution network transient state real-time simulation system designing method based on FPGA |
| CN103942372A (en) * | 2014-04-04 | 2014-07-23 | 天津大学 | Active power distribution network transient state real-time simulation multi-rate interface method based on FPGA |
Non-Patent Citations (3)
| Title |
|---|
| DING CHENGDI 等: "A Design and Implementation of FPGA-Based Real-time Simulator for Distribution System with DG Integration", 《CICED2016》 * |
| 丁承第 等: "基于现场可编程门阵列的分布式发电系统实时仿真相关问题研究", 《电网技术》 * |
| 丁承第: "基于FPGA的有源配电网实时仿真", 《中国博士学位论文全文数据库 工程科技II辑》 * |
Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108963980A (en) * | 2018-04-26 | 2018-12-07 | 上海海事大学 | A kind of multi-modal failure separation method based on Fault Isolation library |
| CN110858263A (en) * | 2018-08-10 | 2020-03-03 | 中车株洲电力机车研究所有限公司 | Electrical circuit modeling method, simulation test system and simulation terminal |
| CN109802386A (en) * | 2019-03-07 | 2019-05-24 | 内蒙古电力(集团)有限责任公司内蒙古电力科学研究院分公司 | The full electromagnetical transient emulation method of power grid |
| CN111725818A (en) * | 2019-03-18 | 2020-09-29 | 杨利 | Three-phase weak current network converter group grid-connected simulation method and simulation terminal |
| CN110516276B (en) * | 2019-06-05 | 2022-11-29 | 西北工业大学太仓长三角研究院 | High-frequency switch power converter real-time simulation method based on FPGA |
| CN110516276A (en) * | 2019-06-05 | 2019-11-29 | 西北工业大学太仓长三角研究院 | HF switch power inverter real-time emulation method based on FPGA |
| CN110414118A (en) * | 2019-07-23 | 2019-11-05 | 上海电机学院 | A kind of Boost modeling method and application based on separate type modeling |
| CN110414118B (en) * | 2019-07-23 | 2023-05-05 | 上海电机学院 | Boost converter modeling method based on separation modeling and application |
| CN110472338A (en) * | 2019-08-16 | 2019-11-19 | 上海交通大学 | Improvement electromagnetical transient emulation method suitable for Field Programmable Logic Array |
| CN110472338B (en) * | 2019-08-16 | 2021-07-27 | 上海交通大学 | Improved electromagnetic transient simulation method suitable for field programmable logic array |
| CN113268942A (en) * | 2020-02-17 | 2021-08-17 | 全球能源互联网研究院有限公司 | Real-time simulation method and system of hybrid direct-current circuit breaker suitable for FPGA |
| CN112883677A (en) * | 2021-02-25 | 2021-06-01 | 上海交通大学 | Electromagnetic transient simulation method for real-time simulation of power electronic converter |
| CN113515914A (en) * | 2021-04-26 | 2021-10-19 | 中国科学院上海微系统与信息技术研究所 | OTS gating device simulation model |
| CN113515914B (en) * | 2021-04-26 | 2024-05-14 | 中国科学院上海微系统与信息技术研究所 | OTS gating device simulation model |
| CN113723032A (en) * | 2021-08-30 | 2021-11-30 | 全球能源互联网研究院有限公司 | Circuit rapid resolving method and system for large-scale nodes |
| CN113723032B (en) * | 2021-08-30 | 2023-08-15 | 全球能源互联网研究院有限公司 | Large-scale node-oriented circuit quick calculation method and system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106649927B (en) | 2020-03-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106649927A (en) | Real-time simulation combined modeling method for power electronic elements based on FPGA | |
| US10826292B2 (en) | Multi-time-scale digital/analog hybrid simulation system and method for power distribution network and storage medium | |
| CN103942372B (en) | Active power distribution network transient state real-time simulation multi tate interface method based on FPGA | |
| CN102969888B (en) | Design method for multi media card (MMC) self-defining submodule based on real time digital system (RTDS) | |
| CN103439967A (en) | Closed loop test system of flexible direct current transmission control protection system | |
| CN104423373A (en) | Closed-loop test system of flexible direct current transmission system control and protection system | |
| CN102654565A (en) | Battery simulation method and simulator | |
| CN110232220A (en) | A kind of modularization multi-level converter real-time emulation method | |
| CN108280271A (en) | THE UPFC equivalent modeling method based on switch periods average principle | |
| CN103605850A (en) | MMC (modular multilevel converter) equivalent modeling method with module latching function | |
| CN108229021A (en) | Modularization multi-level converter locking modeling method based on Real Time Digital Simulator | |
| CN108448631A (en) | The Dynamic Phasors modeling method that power distribution network is accessed containing distributed generation resource based on model reduction | |
| CN110797874A (en) | State estimation method for alternating current-direct current hybrid power distribution network containing power electronic transformer | |
| CN109149665A (en) | Multi-rate simulating method and system for flexible direct current AC network associative simulation | |
| CN103605828B (en) | Method for performing quick simulation modeling on electric component including converter | |
| CN103558478A (en) | Platform for testing microgrid converter hardware on return circuit system | |
| CN112783002A (en) | Digital-analog hybrid simulation method and system for direct-current power distribution network | |
| CN104698859A (en) | Distributed energy generation experiment system | |
| CN103970120A (en) | RTDS (real-time digital system) closed-loop testing method for energy storage variable-current controllers | |
| Yao et al. | Modeling and simulation of VSC-HVDC with dynamic phasors | |
| CN105896558A (en) | VSC-based UPFC electromechanical transient modular modeling method | |
| CN105406749A (en) | Design method for robust controller of grid-connected inverter parallel system | |
| CN202443262U (en) | Parallel-type digital/analog comprehensive simulation system interface and physical simulation subsystem interface | |
| CN103279626B (en) | A kind of Building of Simulation Model method and system | |
| CN105159743A (en) | PSCAD (Power Systems Computer Aided Design) interface and C language based MMC (Modular Multilevel Converter) transient simulation method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |