CN106647701B - A kind of aero-engine control unit BIT test method - Google Patents
A kind of aero-engine control unit BIT test method Download PDFInfo
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- CN106647701B CN106647701B CN201611145529.8A CN201611145529A CN106647701B CN 106647701 B CN106647701 B CN 106647701B CN 201611145529 A CN201611145529 A CN 201611145529A CN 106647701 B CN106647701 B CN 106647701B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B23/00—Testing or monitoring of control systems or parts thereof
- G05B23/02—Electric testing or monitoring
- G05B23/0205—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
- G05B23/0208—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterized by the configuration of the monitoring system
- G05B23/0213—Modular or universal configuration of the monitoring system, e.g. monitoring system having modules that may be combined to build monitoring program; monitoring system that can be applied to legacy systems; adaptable monitoring system; using different communication protocols
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/24—Pc safety
- G05B2219/24065—Real time diagnostics
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- Automation & Control Theory (AREA)
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Abstract
The invention discloses a kind of aero-engine control unit BIT test methods, it includes input signal processing circuit that engine controller BIT, which tests hardware, output signal processing circuit, controller, hardware testing circuit, hard wired feed back circuit, the input/output signal processing circuit receiving sensor, the signal of switch, and the signal received is handled, signal after will be processed is input to controller, controller judges the correctness of controller input control part according to the signal received, controller is by the signal received by being output to output signal processing circuit after software calculation processing simultaneously, output signal processing circuit passes through hard wired feed back electronic feedback to controller after handling output signal, controller combination input and output and feedback signal judge the correctness of output control part.
Description
Technical field
The invention belongs to aeroengine control system development field technical fields, are related to a kind of aero-engine control unit
BIT test method.
Background technique
Engine controller is the control core of engine management system, and basic function is with engine speed and load
Based on, sensor signal is acquired, control instruction is sent to related executing agency after mathematical model calculation processing, is executed
Scheduled control function, to make engine under real-time working condition and extraneous operating condition always in optimal combustion state.
With the application of large scale integrated circuit, modern electronic equipment becomes increasingly complex, once electronic equipment breaks down,
Fault detection, Fault Isolation time are long, and maintenance load increases sharply, therefore its safe and reliable operation and rapid-maintenance are just shown
It obtains particularly important.Aero-engine control unit built-in test (hereinafter referred to as BIT) is intended to circuit and program by control itself
Fault diagnosis, Fault Isolation are completed, it can be detected automatically, diagnosed and be isolated to equipment/internal system failure, mentioned significantly
Efficiency of fault diagnosis and accuracy in high controller improve reliability to reduce maintenance cost.
Summary of the invention
According to the above-mentioned deficiencies of the prior art, the present invention proposes a kind of aero-engine control unit BIT test method, this
The design of test method combination hardware redundancy and engine dual controller, it is real according to the operating status and driver command of controller
Now to controller hardware itself, external input, the fault diagnosis of actuator, Fault Isolation.To guarantee that controller can be quick
It was found that failure, guarantees that controller is run in most rational state, improves the security performance of engine control.
In order to solve the above-mentioned technical problem, a kind of the technical solution adopted by the present invention are as follows: aero-engine control unit BIT survey
Method for testing, engine controller BIT test hardware includes input signal processing circuit, output signal processing circuit, controller, hard
Part tests circuit, hard wired feed back circuit, the signal of the input/output signal processing circuit receiving sensor, switch, and docks
The signal received is handled, and the signal after processing is input to controller, and controller is according to the signal judgement control received
The correctness of device input control processed part, at the same controller by the signal received by being output to output after software calculation processing
Signal processing circuit, output signal processing circuit pass through hard wired feed back electronic feedback to control after handling output signal
Device, controller combination input and output and feedback signal judge the correctness of output control part.The engine controller BIT is surveyed
Examination hardware further includes the multichannel analog input circuit connected respectively with input signal processing circuit, multi-channel digital input electricity
Road, multichannel frequency input circuit；Multichannel analog input obtains engine sensor signal, and multi-channel digital input obtains hair
Motivation external discrete input signal, multichannel frequency input obtain crankshaft sensor, camshaft-signal sensor frequency input signal.Institute
It states engine controller BIT test and is divided into Three models, respectively power on BIT test, operation BIT test, maintenance BIT test；
It powers on BIT test and is intended to failure existing for discovery engine control system before controller operates normally；Operation BIT test is intended to
It was found that existing failure when engine control system normal operation；Maintenance BIT test is intended to find engine control system after sale
Existing failure when maintenance.It is described to power on that BIT test is automatically performed by controller or driver triggers completions manually, operation BIT
Test is then detected by controller automatic cycle, and maintenance BIT test triggers completion by after-sales service personnel manually.The engine control
Device BIT test processed includes controller BIT test, input signal BIT test, input signal hardware conditioning circuit BIT test, output
Signal hardware conditioning circuit BIT test, actuator BIT test.In engine controller power-up state, BIT test macro will be into
The complete MCU BIT test of line control unit, input signal hardware conditioning circuit BIT test, output signal hardware conditioning circuit BIT
Test；It is in normal operating condition in engine controller, BIT test macro will carry out controller part MCU BIT and test, be defeated
Enter signal hardware conditioning circuit BIT test, output signal hardware conditioning circuit BIT test, actuator BIT test；In engine
When controller is in maintenance self-test state, it is hard that BIT test macro will carry out controller complete MCU BIT test, input signal
Part conditioning circuit BIT test, output signal hardware conditioning circuit BIT test.This method includes powering on BIT mode, operation BIT mould
Formula, maintenance BIT mode；After controller powers on, controller constantly detects power-on self-test switch state and maintenance self-test switch shape
State is to judge which kind of BIT mode entered.After controller, which enters, powers on BIT mode, controller first detects MCU, packet
Include MCU storage, input/output interface；After MCU BIT test, controller returns to corresponding failure generation according to test result
Code；After the completion of MCU BIT test, controller enables BIT and tests hardware capability, then carries out the progress of itself input/output interface
BIT test, after the test of controller input/output interface, controller returns to corresponding fault code according to test result,
After the completion of the test of controller input/output interface, controller enters operation BIT mode.After controller enters operation BIT mode,
Controller real-time detection self-test switch state, when self-test switch state is effective, controller immediately exits from operation BIT mode, into
Enter to power on BIT mode；When self-test switch is invalid, controller continues to remain operational BIT mode.
The medicine have the advantages that operating status and driver command of the present invention according to controller, are realized to controller
Hardware itself, external input, the fault diagnosis of actuator, Fault Isolation.To guarantee that controller can quickly find failure, protect
It demonstrate,proves controller to run in most rational state, improves the security performance of engine control.
Detailed description of the invention
Content expressed by this specification attached drawing and the label in figure are briefly described below:
Fig. 1 is the BIT test system hardware structural block diagram of a specific embodiment of the invention.
Fig. 2 is the engine controller structure chart of a specific embodiment of the invention.
Fig. 3 is the operation BIT test controller system signal flow graph of a specific embodiment of the invention.
Fig. 4 is that a specific embodiment of the invention powers on/repair BIT test controller system signal flow graph.
Fig. 5 is the controller software flow diagram of a specific embodiment of the invention.
Fig. 6 is the controller BIT mode handover procedure of a specific embodiment of the invention.
Specific embodiment
Below against attached drawing, by the description of the embodiment, for example related each component of a specific embodiment of the invention
Shape, construction, the mutual alignment between each section and connection relationship, the effect of each section and working principle, manufacturing process and
Operate with method etc., is described in further detail, to help those skilled in the art to inventive concept of the invention, technology
Scheme has more complete, accurate and deep understanding.
The design of feature 1:BIT test system hardware
Engine controller BIT test hardware consists of three parts: input/output signal processing circuit, hardware testing electricity
Road, hard wired feed back circuit.Input/output signal processing circuit is received from controller (hereinafter referred to as MCU) or sensor, is opened
OFF signal, and the signal received is handled, later will it is processed after signal be input to MCU, MCU is according to receiving
Signal judges the correctness of controller input control part, at the same MCU the signal received is passed through it is defeated after software calculation processing
Output control hardware circuit is arrived out, and output control circuit is arrived after handling output signal by hard wired feed back electronic feedback
MCU, MCU combination input and output and feedback signal judge the correctness of output control part, thus realize that controller failure judges,
Fault location.
Feature 2: engine controller BIT tests three kinds of operating modes
Engine controller BIT test is divided into Three models, respectively powers on BIT test, operation BIT test, maintenance BIT
Test.It powers on BIT test and is intended to failure existing for discovery engine control system before controller operates normally；BIT is run to survey
Examination is intended to find existing failure when engine control system operates normally；Maintenance BIT test is intended to find engine control system
Existing failure when system after-sales service.Powering on BIT test can be automatically performed by controller, can also be triggered manually by driver
It completes, operation BIT test is then detected by controller automatic cycle, and maintenance BIT test must be triggered by after-sales service personnel to be completed.
Feature 3: the controller BIT test of software and hardware all standing
Engine controller BIT test includes controller MCU BIT test, input signal BIT test, input signal hardware
Conditioning circuit BIT test, output signal hardware conditioning circuit BIT test, actuator BIT test.They are according to controller difference
Operating status selectively executes, and in engine controller power-up state, BIT test macro will carry out the complete MCU of controller
BIT test, input signal hardware conditioning circuit BIT test, output signal hardware conditioning circuit BIT test；It is controlled in engine
Device is in normal operating condition, and BIT test macro will carry out controller part MCU BIT test, input signal hardware conditioning electricity
Road BIT test, output signal hardware conditioning circuit BIT test, actuator BIT test；Maintenance is in certainly in engine controller
When inspection state, BIT test macro will carry out the complete MCU BIT test of controller, input signal hardware conditioning circuit BIT is surveyed
Examination, output signal hardware conditioning circuit BIT test.
Fig. 1 clearly describes engine controller BIT test macro complete structure figure, and wherein multichannel analog input obtains
Engine sensor signal is taken, multi-channel digital input obtains external engine discrete input signal, and multichannel frequency input obtains
Take crankshaft sensor, camshaft-signal sensor, other frequency input signals；Input signal processing circuit carries out all input signals
Conditioning, and the signal after conditioning is input to processor；Processor obtains output by software control algorithm according to input signal
Signal, output signal will pass through at output signal by output signal processing circuit, driving circuit driving actuator output
The output signal feedback for managing circuit carries out next step calculating and processing to processor.
Fig. 2 describes engine controller structure, by shown in figure, carries out the connection of engine controller each section:
1) processor is connect with signal processing with high-speed bus is driven through；
2) signal condition and driving include switching input reason, simulation input processing, frequency input processing, flash drive,
Low side driving, full-bridge driving, igniting driving, oil spout driving；
3) connection wiring harness of controller connector is arrived in production signal condition and driving, and realizes connection；
4) controller connector connects engine wiring harness connector；
5) engine wiring harness connector connection various sensor and actuators as shown in the figure.
After the completion of connection, controller hardware system is completed, and controller passes through shown in hardware and control software realization Fig. 3/Fig. 4
System signal flow graph, signal successively pass through from sensor engine wiring harness connector, controller connector, signal condition with
Processor is driven, the signal needed output is calculated by control software in the processor, signal tune is successively passed through in signal output
Reason and driving, controller connector, engine wiring harness connector are finally reached actuator and realize that the operation needed, realization are started
Machine controller function.
Fig. 5 is controller BIT test software flow diagram, describes the entire run that controller BIT tests each mode
Process.After controller powers on, controller constantly detect power-on self-test switch state and maintenance self-test switch state with judge into
Which kind of BIT mode entered.
When controller enter power on BIT mode after, controller first detects MCU, including MCU storage, input it is defeated
Outgoing interface；After MCU BIT test, controller returns to corresponding fault code according to test result；MCU BIT is tested
Cheng Hou, controller enable BIT and test hardware capability, then carry out itself input/output interface and carry out BIT test, when controller is defeated
After entering output interface test, controller returns to corresponding fault code, controller input/output interface according to test result
After the completion of test, controller enters operation BIT mode.
After controller enters operation BIT mode, controller real-time detection self-test switch state, when self-test switch state has
When effect, controller immediately exits from operation BIT mode, into powering on BIT mode；When self-test switch is invalid, controller is after continuation of insurance
Hold operation BIT mode.
Fig. 6 is control BIT mode handover procedure, including powers on BIT mode, operation BIT mode, repairs between BIT mode
Switching.
1. powering on BIT pattern switching
After controller powers on, controller detects self-test switch state, and when self-test switch is effective, controller, which enters, to be powered on
BIT mode；When self-test switch is invalid, controller enters wait state, when the waiting time is more than to preset the waiting time,
Controller, which is directly entered, powers on BIT mode；Controller real-time detection self-test switch state in the process of running, when detecting self-test
When switching effective, controller BIT mode out of service, into power-on self-test mode, when detecting that self-test switch is invalid, control
It is maintained at operation BIT mode.
Controller is into after powering on BIT mode, progress MCU BIT test first；MCU BIT test is controlled after completing
Device input/output BIT test.
1) MCU BIT is tested
MCU BIT test is the inspection completed to controller MCU function, including MCU Flash, random storage region (with
Lower abbreviation RAM), nonvolatile storage (hereinafter referred to as NvRam), input/output interface.Flash BIT test has been read
Whole Flash spatial data simultaneously carries out data check and calculating, later with the data check for being previously written Flash and compared
Compared with to judge Flash data integrality；RAM BIT test is the read-write capability for checking ram space, recycles and carries out to ram space
Read-write operation compares reading data and is compared with data are previously written to judge RAM read-write property；NvRam BIT test is inspection
The read-write capability for looking into the space NvRam, when carrying out data writing operation to the space NvRam, simultaneously by this after the completion of writing data
Write data check and write-in NvRam, read later piece NvRam spatial data and calculate read data verification and, and with
It the verification that is previously written and is compared and judges NvRam readwrite performance；MCU input/output interface BIT test is inputted in controller
It is carried out simultaneously when output test.
2) controller input and output BIT is tested
Controller input and output BIT test is the inspection completed to controller input and output and MCU input/output function, packet
Include simulation input, numeral input, frequency input, numeral output, rate-adaptive pacemaker.Simulation input BIT test process is: controller obtains
Analog signal is taken, MCU is input to by analog input signal processing circuit, MCU collection of simulant signal module is to input simulation letter
It number is sampled, and sampled result is stored in by memory by direct memory access module and specifies region, MCU is according to sampled result
The correctness of controller analog input signal processing circuit and MCU simulation input interface function is judged by software control algorithm.
Numeral input BIT test process is: the determining digital signal of controller output, the signal pass through digital output signal processing circuit
MCU digital input pins and controller digital input signals processing circuit are fed back, MCU is by comparing from digital output signal
Reason electronic feedback judges that controller numeral input is believed to MCU signal and through digital input signals processing circuit feedback to MCU signal
Number processing circuit, MCU digital input interface, controller digital output signal processing circuit function correctness.Frequency inputs BIT
Test process is: controller exports the frequency signal for determining frequency and duty ratio, which handles electricity by frequency output signal
Road feedback is to MCU input pin and controller frequency input signal processing circuit, and MCU is by comparing from frequency output signal processing
Electronic feedback judges controller frequency input signal to MCU signal to MCU signal and through frequency input signal processing circuit feedback
Processing circuit, MCU frequency input interface, controller frequency output signal processing circuit function correctness.Numeral output BIT is surveyed
Examination process is: controller exports the digital signal for determining level, which is fed back by digital output signal processing circuit to MCU
Input pin, the level state of MCU detection input digital signal, and be compared with specified level judge MCU numeral output and
The correctness of controller digital output signal processing circuit function.Rate-adaptive pacemaker BIT test process is: controller output determines frequency
The frequency signal of rate and duty ratio, the signal are fed back by frequency output signal processing circuit to MCU input pin, MCU capture
The frequency and duty ratio of input frequency signal, and be compared with assigned frequency and duty ratio and judge MCU rate-adaptive pacemaker and control
The correctness of device frequency output signal processing circuit function.
2. running BIT pattern switching
After the completion of controller powers on BIT, controller enters operation BIT mode, in operation BIT mode, completes MCU instruction
Collection, the input of MCU clock, sensor, actuator output BIT test.Sensor inputs BIT test to water temperature sensor, air inlet pressure
Force snesor, intake air temperature sensor, stick position sensor, throttle position sensor are tested.Actuator output
Fuel injector, ignition coil, electronic throttle are tested in BIT test.MCU instruction set BIT test process are as follows: calculated by software
Method obtains the random number on the basis of system time in real time, using this random number as add, subtract, multiplication and division, bit manipulation operation it is defeated
Enter, using the set time as more than the progress in period various operations, and judges the correctness of operation result to judge MCU instruction set
Integrality.MCU clock BIT test process are as follows: using the set time as the carry out MCU clock in period and controller external hardware clock
Compare, the accuracy of MCU clock is judged by comparing result.Sensor BIT test process are as follows: MCU obtains sensor signal, and
The physical values with practical significance are converted the signal by software algorithm, by obtained physical values and controller according to current
The physical values that combinations of states software algorithm is calculated are compared the correctness to judge sensor signal.Actuator output
BIT test process are as follows: when actuator output is effective, the actuator output driving hardware of controller can real-time detection actuator shape
State, MCU judge the correctness of actuator by reading actuator state.
3. repairing BIT test switching
After controller powers on, when controller detects that maintenance self-test switch state is effective, controller enters maintenance BIT mould
Formula；When controller detects that service switch state is invalid, controller enters waiting-timeout, is more than to preset when the waiting time
After value, controller, which enters, powers on BIT state.After controller enters maintenance BIT mode, controller carries out powering on BIT test and fortune
The full content of row BIT test.
The present invention is exemplarily described above in conjunction with attached drawing, it is clear that the present invention implements not by aforesaid way
Limitation, as long as the improvement for the various unsubstantialities that the inventive concept and technical scheme of the present invention carry out is used, or without changing
It is within the scope of the present invention into the conception and technical scheme of the invention are directly applied to other occasions.This hair
Bright protection scope should be determined by the scope of protection defined in the claims.
Claims (8)
1. a kind of aero-engine control unit BIT test method, which is characterized in that engine controller BIT tests hardware and includes
Input signal processing circuit, output signal processing circuit, controller, hardware testing circuit, hard wired feed back circuit, the input letter
The signal of number processing circuit receiving sensor, switch, and the signal received is handled, will it is processed after signal input
To controller, controller judges the correctness of controller input control part according to the signal received, while controller will connect
The signal received is output to output signal processing circuit after passing through software calculation processing, and output signal processing circuit is to output signal
Pass through hard wired feed back electronic feedback to controller, controller combination input and output and feedback signal judgement output control after being handled
The correctness of part processed；
The engine controller BIT test is divided into Three models, respectively powers on BIT test, operation BIT test, maintenance BIT
Test；It powers on BIT test and is intended to failure existing for discovery engine control system before controller operates normally；BIT is run to survey
Examination is intended to find existing failure when engine control system operates normally；Maintenance BIT test is intended to find engine control system
Existing failure when system after-sales service；
Controller is into after powering on BIT mode, progress MCU BIT test first；It is defeated that laggard line control unit is completed in MCU BIT test
Enter/export BIT test；Powering on BIT test includes the following:
1) MCU BIT is tested
MCU BIT test is the inspection completed to controller MCU function, including MCU Flash, random storage region RAM, it is non-easily
The property lost storage region NvRam, input/output interface detection；Wherein, complete Flash spatial data is read in Flash BIT test
And carry out data check and calculating, later with the data check for being previously written Flash and be compared, to judge Flash data
Integrality；RAM BIT test is the read-write capability for checking ram space, is written and read to ram space circulation, compares reading
Data are compared with data are previously written to judge RAM read-write property；NvRam BIT test is to check the read-write in the space NvRam
Function, when carrying out data writing operation to the space NvRam, simultaneously by this write data check and write-in after the completion of writing data
NvRam, read the NvRam spatial data later and calculate the verification for reading data and, and with the verification and progress that are previously written
Multilevel iudge NvRam readwrite performance；MCU input/output interface BIT test carries out simultaneously in controller input/output test；
2) controller input and output BIT is tested
Controller input and output BIT test is the inspection completed to controller input and output and MCU input/output function, including mould
Quasi- input, numeral input, frequency input, numeral output, rate-adaptive pacemaker test；
Simulation input BIT test process is: controller obtains analog signal, is input to by analog input signal processing circuit
MCU, MCU collection of simulant signal module sample input analog signal, and are tied sampling by direct memory access module
Fruit is stored in memory and specifies region, and MCU is judged at controller analog input signal according to sampled result by software control algorithm
Manage the correctness of circuit and MCU simulation input interface function；
Numeral input BIT test process is: the determining digital signal of controller output, the digital signal pass through digital output signal
Processing circuit feedback is to MCU digital input pins and controller digital input signals processing circuit, and MCU is by comparing defeated from number
Signal processing circuit feedback judges controller number to MCU signal to MCU signal and through digital input signals processing circuit feedback out
Word input signal processing circuit, MCU digital input interface, controller digital output signal processing circuit function correctness；
Frequency input BIT test process is: controller exports the frequency signal for determining frequency and duty ratio, which passes through
Frequency output signal processing circuit is fed back to MCU input pin and controller frequency input signal processing circuit, and MCU is by comparing
Judge from frequency output signal processing circuit feedback to MCU signal and through frequency input signal processing circuit feedback to MCU signal
Controller frequency input signal processing circuit, MCU frequency input interface, controller frequency output signal processing circuit function are just
True property；
Numeral output BIT test process is: controller exports the digital signal for determining level, which passes through digital output signal
Processing circuit feedback is compared to MCU input pin, the level state of MCU detection input digital signal with specified level
Judge the correctness of MCU numeral output and controller digital output signal processing circuit function；
Rate-adaptive pacemaker BIT test process is: controller exports the frequency signal for determining frequency and duty ratio, which passes through frequency
For output signal processing circuit feedback to MCU input pin, MCU captures the frequency and duty ratio of input frequency signal, and with it is specified
Frequency and duty ratio are compared the correctness for judging MCU rate-adaptive pacemaker and controller frequency output signal processing circuit function.
2. aero-engine control unit BIT test method according to claim 1, which is characterized in that the engine control
Device BIT test hardware processed further includes the multichannel analog input circuit connected respectively with input signal processing circuit, multichannel number
Word input circuit, multichannel frequency input circuit；Multichannel analog input obtains engine sensor signal, and multi-channel digital is defeated
Enter to obtain external engine discrete input signal, it is defeated that multichannel frequency input obtains crankshaft sensor, camshaft-signal sensor frequency
Enter signal.
3. aero-engine control unit BIT test method according to claim 1, which is characterized in that described to power on BIT survey
Examination is automatically performed by controller or driver triggers completion manually, and operation BIT test is then detected by controller automatic cycle, repaired
BIT test triggers completion by after-sales service personnel manually.
4. aero-engine control unit BIT test method according to claim 1, which is characterized in that the engine control
Device BIT test processed includes controller BIT test, input signal BIT test, input signal hardware conditioning circuit BIT test, output
Signal hardware conditioning circuit BIT test, actuator BIT test.
5. aero-engine control unit BIT test method according to claim 4, which is characterized in that controlled in engine
Device power-up state, BIT test macro will carry out the complete MCU BIT test of controller, input signal hardware conditioning circuit BIT is surveyed
Examination, output signal hardware conditioning circuit BIT test；Normal operating condition is in engine controller, and BIT test macro will be into
Line control unit part MCU BIT test, input signal hardware conditioning circuit BIT test, output signal hardware conditioning circuit BIT are surveyed
Examination, actuator BIT test；When engine controller is in maintenance self-test state, it is complete that BIT test macro will carry out controller
MCU BIT test, input signal hardware conditioning circuit BIT test, output signal hardware conditioning circuit BIT test.
6. aero-engine control unit BIT test method according to claim 1, which is characterized in that this method includes upper
Electric BIT mode, operation BIT mode, maintenance BIT mode；After controller powers on, controller constantly detects power-on self-test switch shape
State and maintenance self-test switch state are to judge which kind of BIT mode entered.
7. aero-engine control unit BIT test method according to claim 6, which is characterized in that when controller enters
After powering on BIT mode, controller first detects MCU, including MCU storage, input/output interface；When MCU BIT is tested
After, controller returns to corresponding fault code according to test result；After the completion of MCU BIT test, controller enables BIT and surveys
Hardware capability is tried, itself input/output interface is then carried out and carries out BIT test, when the test of controller input/output interface terminates
Afterwards, controller returns to corresponding fault code according to test result, after the completion of the test of controller input/output interface, controller into
Enter to run BIT mode.
8. aero-engine control unit BIT test method according to claim 6, which is characterized in that when controller enters
After running BIT mode, controller real-time detection self-test switch state, when self-test switch state is effective, controller is immediately exited from
BIT mode is run, into powering on BIT mode；When self-test switch is invalid, controller continues to remain operational BIT mode.
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