CN106647701A - Aero-engine controller BIT (Built-In Testing) method - Google Patents
Aero-engine controller BIT (Built-In Testing) method Download PDFInfo
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- CN106647701A CN106647701A CN201611145529.8A CN201611145529A CN106647701A CN 106647701 A CN106647701 A CN 106647701A CN 201611145529 A CN201611145529 A CN 201611145529A CN 106647701 A CN106647701 A CN 106647701A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B23/00—Testing or monitoring of control systems or parts thereof
- G05B23/02—Electric testing or monitoring
- G05B23/0205—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
- G05B23/0208—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterized by the configuration of the monitoring system
- G05B23/0213—Modular or universal configuration of the monitoring system, e.g. monitoring system having modules that may be combined to build monitoring program; monitoring system that can be applied to legacy systems; adaptable monitoring system; using different communication protocols
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/24—Pc safety
- G05B2219/24065—Real time diagnostics
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- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
The invention discloses an aero-engine controller BIT (Built-In Testing) method, which is characterized in that engine controller BIT hardware comprises an input signal processing circuit, an output signal processing circuit, a controller, a hardware testing circuit and a hardware feedback circuit; the input signal processing circuit and the output signal processing circuit receive signals of a sensor and a switch, perform processing on the received signals and input the processed signals to the controller; the controller judges the correctness of an input control portion of the controller according to the received signals; meanwhile, the controller calculates and processes the received signals through software and outputs the signals to the output signal processing circuit; the output signal processing circuit processes the output signals and feeds back the processed signals to the controller through the hardware feedback circuit; and the controller judges the correctness of an output control portion by combining the input signals, the output signals and the feedback signals.
Description
Technical field
The invention belongs to aeroengine control system development field technical field, is related to a kind of aero-engine control unit
BIT method of testings.
Background technology
Engine controller is the control core of engine management system, and its basic function is with engine speed and load
Based on, sensor signal is gathered, control instruction is sent to related executing agency after Mathematical Modeling calculating is processed, perform
Predetermined control function, so that engine is in all the time optimal fired state under real-time working condition and extraneous condition of work.
With the application of large scale integrated circuit, modern electronic equipment becomes increasingly complex, once electronic equipment breaks down,
Fault detect, Fault Isolation time are long, and maintenance load increases sharply, therefore its safe and reliable operation and rapid-maintenance just show
Obtain particularly important.Aero-engine control unit built-in test (hereinafter referred to as BIT) is intended to by the circuit and program of control itself
Fault diagnosis, Fault Isolation are completed, it can carry out automatic detection, diagnosis to the failure of equipment/internal system and isolate, and carry significantly
Fault diagnosis efficiency and accuracy in high controller, so as to reduce maintenance cost, improves reliability.
The content of the invention
According to above the deficiencies in the prior art, the present invention proposes a kind of aero-engine control unit BIT method of testings, this
Method of testing combined with hardware Redundancy Design and engine dual controller, it is real according to the running status and driver command of controller
Now to controller hardware itself, outside input, the fault diagnosis of actuator, Fault Isolation.So as to ensure that controller can be quick
It was found that failure, it is ensured that controller runs in most rational state, the security performance of engine control is improved..
In order to solve above-mentioned technical problem, the technical solution used in the present invention is：A kind of aero-engine control unit BIT is surveyed
Method for testing, engine controller BIT test hardware includes input signal processing circuit, output signal processing circuit, controller, hard
Part test circuit, hard wired feed back circuit, the input/output signal process circuit receives sensor, the signal of switch, and docks
The signal for receiving is processed, and by the signal input after process to controller, controller judges control according to the signal for receiving
Device processed is input into the correctness of control section, while output to output after controller processes the signal for receiving by software calculating
Signal processing circuit, output signal processing circuit passes through hard wired feed back electronic feedback to control after processing output signal
Device, controller combines input and output and feedback signal judges the correctness of output control part.The engine controller BIT is surveyed
Examination hardware also includes multichannel analog input circuit, multi-channel digital input electricity respectively with input signal processing circuit connection
Road, multichannel frequency input circuit；Multichannel analog input obtains engine sensor signal, and multi-channel digital input is obtained to be sent out
Motivation external discrete input signal, multichannel frequency input obtains crankshaft sensor, camshaft-signal sensor frequency input signal.Institute
State engine controller BIT tests and be divided into Three models, respectively go up electricity BIT tests, operation BIT tests, maintenance BIT tests；
Upper electric BIT tests are intended to find the failure that engine control system is present before controller normally runs；Operation BIT tests are intended to
It was found that the failure existed when engine control system normally runs；Maintenance BIT tests are intended to find engine control system after sale
The failure existed during maintenance.The upper electric BIT tests are automatically performed by controller or driver triggers complete manually, run BIT
Test is then detected that manually triggering is completed by after-sales service personnel for maintenance BIT tests by controller automatic cycle.The engine control
Device BIT tests processed include controller BIT tests, the test of input signal BIT, input signal hardware modulate circuit BIT tests, output
Signal hardware modulate circuit BIT tests, actuator BIT tests.In engine controller power-up state, BIT test systems will be entered
The complete MCU BIT tests of line control unit, input signal hardware modulate circuit BIT tests, output signal hardware modulate circuit BIT
Test；Normal operating condition is in engine controller, BIT test systems will be controlled device part MCU BIT tests, defeated
Enter signal hardware modulate circuit BIT tests, output signal hardware modulate circuit BIT tests, actuator BIT tests；In engine
Controller in maintenance self-inspection state when, BIT test systems will be controlled device it is complete MCU BIT test, input signal it is hard
Part modulate circuit BIT tests, output signal hardware modulate circuit BIT tests.The method includes upper electric BIT patterns, operation BIT moulds
Formula, maintenance BIT patterns；After electricity on controller, controller constantly detects power-on self-test on off state and maintenance self-test switch shape
State with judge enter which kind of BIT pattern.After controller enters upper electric BIT patterns, controller is detected first to MCU, bag
Include MCU storages, input/output interface；After MCU BIT tests terminate, controller returns corresponding failure generation according to test result
Code；After the completion of MCU BIT tests, controller enables BIT test hardware capabilitys, and then carrying out itself input/output interface is carried out
BIT is tested, and after the test of controller input/output interface terminates, controller returns corresponding failure code according to test result,
After the completion of the test of controller input/output interface, controller enters operation BIT patterns.After controller enters operation BIT patterns,
Controller real-time detection self-test switch state, when self-test switch state is effective, controller immediately exits from running BIT patterns, enters
Enter upper electric BIT patterns；When self-test switch is invalid, controller continues to remain on BIT patterns.
Present invention has the advantages that:The present invention is realized to controller according to the running status and driver command of controller
Hardware itself, outside input, the fault diagnosis of actuator, Fault Isolation.So as to ensure that controller can quickly find failure, protect
Card controller runs in most rational state, improves the security performance of engine control.
Description of the drawings
The mark in the content and figure expressed by this specification accompanying drawing is briefly described below：
Fig. 1 is the BIT test system hardware structured flowcharts of the specific embodiment of the present invention.
Fig. 2 is the engine controller structure chart of the specific embodiment of the present invention.
Fig. 3 is the operation BIT test controller system signal flow graphs of the specific embodiment of the present invention.
Fig. 4 is the upper electricity/maintenance BIT test controller system signal flow graphs of the specific embodiment of the present invention.
Fig. 5 is the controller software FB(flow block) of the specific embodiment of the present invention.
Fig. 6 is the controller BIT mode handover procedures of the specific embodiment of the present invention.
Specific embodiment
Below against accompanying drawing, by the description to embodiment, for example involved each component of specific embodiment of the invention
Shape, the mutual alignment between construction, each several part and annexation, the effect of each several part and operation principle, manufacturing process and
Operate with method etc., is described in further detail, to help inventive concept, technology of the those skilled in the art to the present invention
Scheme has more complete, accurate and deep understanding.
Feature 1：BIT test system hardwares are designed
Engine controller BIT test hardware is made up of three parts：Input/output signal process circuit, hardware testing electricity
Road, hard wired feed back circuit.Input/output signal process circuit is received from controller (hereinafter referred to as MCU) or sensor, opened
OFF signal, and the signal to receiving processes, afterwards by the signal input after process to MCU, MCU is according to receiving
Signal judges that controller is input into the correctness of control section, while MCU is defeated after software calculating process by the signal for receiving
Go out to output control hardware circuit, output control circuit is arrived after processing output signal by hard wired feed back electronic feedback
MCU, MCU combine input and output and feedback signal judges the correctness of output control part, so as to realize that controller failure judges,
Fault location.Feature 2：Engine controller BIT tests three kinds of mode of operations
Engine controller BIT tests are divided into Three models, respectively go up electricity BIT tests, operation BIT tests, maintenance BIT
Test.Upper electric BIT tests are intended to find the failure that engine control system is present before controller normally runs；Operation BIT is surveyed
Examination is intended to find the failure that engine control system exists when normally running；Maintenance BIT tests are intended to find engine control system
The failure existed during system after-sales service.Upper electric BIT tests can be automatically performed by controller, it is also possible to be triggered manually by driver
Complete, operation BIT tests are then detected by controller automatic cycle, maintenance BIT tests must be completed by after-sales service personnel triggering.
Feature 3：The controller BIT tests of software and hardware all standing
Engine controller BIT tests include controller MCU BIT tests, the test of input signal BIT, input signal hardware
Modulate circuit BIT tests, output signal hardware modulate circuit BIT tests, actuator BIT tests.They are different according to controller
Running status is selectively performed, in engine controller power-up state, the BIT test systems MCU complete by device is controlled
BIT tests, input signal hardware modulate circuit BIT tests, output signal hardware modulate circuit BIT tests；In engine control
Device is in normal operating condition, and BIT test systems will be controlled the MCU BIT tests of device part, input signal hardware conditioning electricity
Road BIT tests, output signal hardware modulate circuit BIT tests, actuator BIT tests；Maintenance is in engine controller certainly
During inspection state, BIT test systems will be controlled the complete MCU BIT tests of device, input signal hardware modulate circuit BIT and survey
Examination, output signal hardware modulate circuit BIT tests.
Fig. 1 clearly describes engine controller BIT test system complete structure figures, and wherein multichannel analog input is obtained
Engine sensor signal is taken, multi-channel digital input obtains external engine discrete input signal, and multichannel frequency input is obtained
Take crankshaft sensor, camshaft-signal sensor, other frequency input signals；Input signal processing circuit is carried out to all input signals
Conditioning, and by the signal input after conditioning to processor；Processor draws output according to input signal by software control algorithm
Signal, output signal drives actuator output through output signal processing circuit, drive circuit, while will be at output signal
The output signal of reason circuit feeds back to processor carries out next step calculating and process.
Fig. 2 describes engine controller structure, by shown in figure, carries out the connection of engine controller each several part：
1) processor is connected with signal transacting with high-speed bus is driven through, signal condition with drive
2) drive including switching input reason, simulation input process, frequency input processing, flash, low side drives, full-bridge drives
Dynamic, igniting drives, oil spout drives；
3) make signal condition and be driven into the rat tail of controller connector, and realize connection；
4) controller connector connection engine wiring harness connector；
5) engine wiring harness connector connection various sensor and actuators as depicted.
After the completion of connection, controller hardware system is completed, and controller is realized shown in Fig. 3/Fig. 4 by hardware and control software
System signal flow graph, signal from sensor sequentially pass through engine wiring harness connector, controller connector, signal condition with
Processor is driven into, within a processor the signal output for needing is calculated by control software, signal output sequentially passes through signal tune
Reason and driving, controller connector, engine wiring harness connector, are finally reached the operation that actuator is realized needing, and realize starting
Machine controller function.
Fig. 5 is controller BIT test software FB(flow block)s, describes the entire run that controller BIT tests each pattern
Flow process.When on controller electricity after, controller constantly detect power-on self-test on off state and maintenance self-test switch state with judge into
Which kind of BIT pattern entered.
When controller enter upper electric BIT patterns after, controller is detected first to MCU, including MCU storage, be input into it is defeated
Outgoing interface；After MCU BIT tests terminate, controller returns corresponding failure code according to test result；MCU BIT have been tested
Cheng Hou, controller enable BIT test hardware capability, then carrying out itself input/output interface carries out BIT tests, when controller it is defeated
Enter after output interface test terminates, controller returns corresponding failure code, controller input/output interface according to test result
After the completion of test, controller enters operation BIT patterns.
After controller enters operation BIT patterns, controller real-time detection self-test switch state, when self-test switch state has
During effect, controller immediately exits from running BIT patterns, into upper electric BIT patterns；When self-test switch is invalid, controller continues to protect
Hold operation BIT patterns.
Fig. 6 is between control BIT mode handover procedures, including upper electric BIT patterns, operation BIT patterns, maintenance BIT patterns
Switching.
1. electricity BIT pattern switchings are gone up
On controller after electricity, controller detection self-test switch state, when self-test switch is effective, controller enters upper electricity
BIT patterns；When self-test switch is invalid, controller enters wait state, when the stand-by period is more than the stand-by period is preset,
Controller is directly entered electric BIT patterns；Controller real-time detection self-test switch state in running, when detecting self-inspection
When switching effective, controller BIT patterns out of service, into power-on self-test pattern, when detecting self-test switch and being invalid, control
It is maintained at operation BIT patterns.
Controller is entered after upper electric BIT patterns, and MCU BIT tests are carried out first；It is controlled after the completion of MCU BIT tests
Device input/output BIT is tested.
1) MCU BIT tests
MCU BIT test be to complete the inspection to controller MCU functions, including MCU Flash, random storage region (with
Lower abbreviation RAM), nonvolatile storage (hereinafter referred to as NvRam), input/output interface.Flash BIT tests have been read
Whole Flash spatial datas simultaneously carry out data check and calculating, afterwards with the data check for being previously written Flash and compared
Compared with to judge Flash data integrality；RAM BIT tests are the read-write capabilitys for checking ram space, and ram space circulation is carried out
Read-write operation, compares reading data and is compared to judge RAM read-writes property with data are previously written；NvRam BIT tests are inspections
The read-write capability in NvRAM spaces is looked into, when data writing operation is carried out to NvRAM spaces, simultaneously by this after the completion of data are write
Write data check and write NvRam, read afterwards piece NvRam spatial datas and calculate read data verification and, and with
The verification that is previously written and it is compared and judges NvRam readwrite performances；MCU input/output interfaces BIT tests are in controller input
Carry out simultaneously during output test.
2) controller input and output BIT tests
Controller input and output BIT tests are completed to controller input and output and the inspection of MCU input/output functions, bag
Include simulation input, numeral input, frequency input, numeral output, rate-adaptive pacemaker.Simulation input BIT test process is：Controller is obtained
Analog signal is taken, MCU is input to by analog input signal process circuit, MCU collection of simulant signal module is to input simulation letter
Number sampled, and sampled result is stored in by internal memory designated area by direct memory access module, MCU is according to sampled result
The correctness of controller analog input signal process circuit and MCU simulation input interface functions is judged by software control algorithm.
Numeral input BIT test process is：The data signal that controller output determines, the signal passes through digital output signal process circuit
MCU digital input pins and controller digital input signals process circuit are fed back to, MCU is by comparing from digital output signal
Reason electronic feedback feeds back to MCU signals and judges that controller numeral input is believed to MCU signals and Jing digital input signals process circuits
Number process circuit, MCU digital input interfaces, the correctness of controller digital output signal process circuit function.Frequency is input into BIT
Test process is：Controller output determines the frequency signal of frequency and dutycycle, and the signal is by frequency output signal process electricity
Road feeds back to MCU input pins and controller frequency input signal process circuit, and MCU is by comparing from frequency output signal process
Electronic feedback feeds back to MCU signals and judges controller frequency input signal to MCU signals and Jing frequency input signal process circuits
Process circuit, MCU frequency input interfaces, the correctness of controller frequency output signal process circuit function.Numeral output BIT is surveyed
Examination process is：Controller output determines the data signal of level, and the signal feeds back to MCU by digital output signal process circuit
Input pin, MCU detect supplied with digital signal level state, and be compared with specified level judge MCU numeral outputs and
The correctness of controller digital output signal process circuit function.Rate-adaptive pacemaker BIT test process is：Controller output determines frequency
The frequency signal of rate and dutycycle, the signal feeds back to MCU input pins, MCU captures by frequency output signal process circuit
The frequency and dutycycle of input frequency signal, and be compared with assigned frequency and dutycycle and judge MCU rate-adaptive pacemakers and control
The correctness of device frequency output signal process circuit function.
2. BIT pattern switchings are run
After the completion of electricity BIT on controller, controller enters operation BIT patterns, in operation BIT patterns, completes MCU instructions
Collection, the input of MCU clocks, sensor, actuator output BIT tests.Sensor input BIT is tested to cooling-water temperature sensor, air inlet pressure
Force snesor, intake air temperature sensor, stick position sensor, TPS are tested.Actuator is exported
BIT tests are tested fuel injector, ignition coil, electronic throttle.MCU instruction set BIT test process is：Calculated by software
Method draws in real time the random number on the basis of system time, using this random number as adding, subtract, multiplication and division, bit manipulation computing it is defeated
Enter, with the set time as cycle any of the above computing is carried out, and judge the correctness of operation result to judge MCU instruction set
Integrality.MCU clock BIT test process is：MCU clocks and controller external hardware clock are carried out with the set time as cycle
Relatively, the accuracy of MCU clocks is judged by comparative result.Sensor BIT test process is：MCU obtains sensor signal, and
Physical values with practical significance are converted the signal into by software algorithm, by the physical values for obtaining and controller according to current
The calculated physical values of combinations of states software algorithm are compared to judge the correctness of sensor signal.Actuator is exported
BIT test process is：When actuator output is effective, the actuator output driving hardware of controller can real-time detection actuator shape
State, the correctness that MCU passes through reading actuator condition adjudgement actuator.
3. BIT test switchings are keeped in repair
When on controller electricity after, controller detect maintenance self-test switch state it is effective when, controller enter maintenance BIT moulds
Formula；When controller detect service switch state it is invalid when, controller enters waiting-timeout, when the stand-by period exceed preset
After value, controller enters upper electric BIT states.Controller is entered after maintenance BIT patterns, and controller carries out electric BIT tests and transports
The full content of row BIT tests.
The present invention is exemplarily described above in conjunction with accompanying drawing, it is clear that the present invention is implemented and do not receive aforesaid way
Restriction, as long as employing the improvement of various unsubstantialities that method of the present invention design and technical scheme are carried out, or without changing
Enter and the design of the present invention and technical scheme are directly applied into other occasions, within protection scope of the present invention.This
The protection domain that bright protection domain should be limited by claims is defined.
Claims (9)
1. a kind of aero-engine control unit BIT method of testings, it is characterised in that engine controller BIT test hardware includes
Input signal processing circuit, output signal processing circuit, controller, hardware testing circuit, hard wired feed back circuit, the input letter
Number process circuit receives sensor, the signal of switch, and the signal to receiving is processed, by the signal input after process
To controller, controller judges that controller is input into the correctness of control section according to the signal for receiving, while controller will connect
Output signal processing circuit is arrived in the signal for receiving output after software calculating process, and output signal processing circuit is to output signal
By hard wired feed back electronic feedback to controller after being processed, controller combines input and output and feedback signal judges output control
The correctness of part processed.
2. aero-engine control unit BIT method of testings according to claim 1, it is characterised in that the engine control
Device BIT tests hardware processed also includes multichannel analog input circuit, the multichannel number for connecting with input signal processing circuit respectively
Word input circuit, multichannel frequency input circuit；Multichannel analog input obtains engine sensor signal, and multi-channel digital is defeated
Enter to obtain external engine discrete input signal, it is defeated that multichannel frequency input obtains crankshaft sensor, camshaft-signal sensor frequency
Enter signal.
3. aero-engine control unit BIT method of testings according to claim 1, it is characterised in that the engine control
Device BIT tests processed are divided into Three models, respectively go up electricity BIT tests, operation BIT tests, maintenance BIT tests；Upper electric BIT tests
It is intended to find the failure that engine control system is present before controller normally runs；Operation BIT tests are intended to find engine
The failure existed when control system is normally run；Maintenance BIT tests are intended to find exist during engine control system after-sales service
Failure.
4. aero-engine control unit BIT method of testings according to claim 1, it is characterised in that the upper electric BIT is surveyed
Examination is automatically performed by controller or driver triggers complete manually, and operation BIT tests are then detected by controller automatic cycle, are keeped in repair
By after-sales service personnel, manually triggering is completed for BIT tests.
5. aero-engine control unit BIT method of testings according to claim 1, it is characterised in that the engine control
Device BIT tests processed include controller BIT tests, the test of input signal BIT, input signal hardware modulate circuit BIT tests, output
Signal hardware modulate circuit BIT tests, actuator BIT tests.
6. aero-engine control unit BIT method of testings according to claim 5, it is characterised in that in engine control
Device power-up state, BIT test systems will be controlled the complete MCU BIT tests of device, input signal hardware modulate circuit BIT and survey
Examination, output signal hardware modulate circuit BIT tests；Normal operating condition is in engine controller, BIT test systems will be entered
The MCU BIT tests of line control unit part, input signal hardware modulate circuit BIT tests, output signal hardware modulate circuit BIT are surveyed
Examination, actuator BIT tests；When engine controller is in maintenance self-inspection state, it is complete that BIT test systems will be controlled device
MCU BIT test, input signal hardware modulate circuit BIT test, output signal hardware modulate circuit BIT test.
7. aero-engine control unit BIT method of testings according to claim 1, it is characterised in that the method includes upper
Electric BIT patterns, operation BIT patterns, maintenance BIT patterns；After electricity on controller, controller constantly detects that power-on self-test switchs shape
State and maintenance self-test switch state with judge enter which kind of BIT pattern.
8. aero-engine control unit BIT method of testings according to claim 7, it is characterised in that when controller is entered
After upper electric BIT patterns, controller is detected first to MCU, including MCU storages, input/output interface；When MCU BIT tests
After end, controller returns corresponding failure code according to test result；After the completion of MCU BIT tests, controller enables BIT and surveys
Examination hardware capability, then carrying out itself input/output interface carries out BIT tests, when the test of controller input/output interface terminates
Afterwards, controller returns corresponding failure code according to test result, and after the completion of the test of controller input/output interface, controller enters
Enter to run BIT patterns.
9. aero-engine control unit BIT method of testings according to claim 7, it is characterised in that when controller is entered
After operation BIT patterns, controller real-time detection self-test switch state, when self-test switch state is effective, controller is immediately exited from
Operation BIT patterns, into upper electric BIT patterns；When self-test switch is invalid, controller continues to remain on BIT patterns.
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| CN109683508A (en) * | 2018-09-28 | 2019-04-26 | 中国船舶重工集团公司第七0七研究所九江分部 | A kind of band detects and the steering handwheel control system of the online self-test of BIT automatically |
| CN109828175A (en) * | 2019-03-14 | 2019-05-31 | 四川海特亚美航空技术有限公司 | A kind of electronic sequence component built-in test method |
| CN110262302A (en) * | 2019-04-11 | 2019-09-20 | 汉腾汽车有限公司 | A kind of detection method of electric machine controller MCU |
| CN110297455A (en) * | 2018-03-23 | 2019-10-01 | 欧姆龙(上海)有限公司 | Programmable logic controller (PLC) and its self-test and restoration methods |
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