CN106598879A - Memory management method for uninterruptedly powered RAM - Google Patents
Memory management method for uninterruptedly powered RAM Download PDFInfo
- Publication number
- CN106598879A CN106598879A CN201611035452.9A CN201611035452A CN106598879A CN 106598879 A CN106598879 A CN 106598879A CN 201611035452 A CN201611035452 A CN 201611035452A CN 106598879 A CN106598879 A CN 106598879A
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- power down
- data segment
- ram
- read
- time domain
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- 238000007726 management method Methods 0.000 title abstract description 8
- 238000000034 method Methods 0.000 claims description 6
- 230000002159 abnormal effect Effects 0.000 abstract 1
- 238000005516 engineering process Methods 0.000 description 3
- 241001269238 Data Species 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0615—Address space extension
- G06F12/0623—Address space extension for memory modules
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/30—Creation or generation of source code
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Devices For Executing Special Programs (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
The invention discloses a memory management method for an uninterruptedly powered RAM in an embedded software system. In a software project, a runtime domain special for the uninterruptedly powered RAM is added, and data needing to be stored into the uninterruptedly powered RAM is forcibly distributed to the runtime domain. When software runs, data in the RAM can be read and written like common variables, disadvantages of out of limit of the memory and abnormal memory access caused by absolute addresses and pointer accesses are avoided, and advantages of system memory management are exploited to the full.
Description
Technical field
The present invention relates in field of embedded software, more particularly to field of embedded software not power down RAM internal memory pipe
Reason method.
Background technology
Embedded system refers to the dedicated computer system for performing standalone feature.It includes processor, memorizer, micro-
A series of microelectronic chips such as controller, sensor and device, and embedded micro operation system, control application in memory
Software.
Embedded software refers in particular to run on the software in embedded system.In recent years, with computer technology, communication skill
The fast development of the information technology based on art and the extensive application of Internet, embedded system is quickly dissolved into everybody daily
In life.Embedded software gradually grows up as the operation core of whole system also by the supporting role of initial embedded system.
To pursue the faster speed of service and reliable data storage, memorizer gradually derives and is embedded system：At random
Access memorizer (RAM), read only memory (ROM), flash memory (Flash).RAM is the storage inside with the direct exchange datas of CPU
Equipment, can high speed random read-write, store medium usually as the ephemeral data of program, and Flash is usually as program and data
Permanent storage media.
But in some specific application scenarios, developer wishes that storage medium can be provided simultaneously with the high speed characteristics of RAM
With the not volatile characteristic of Flash.Thus expedited the emergence of a kind of design that not power down power supply is provided to RAM, with reach at a high speed and
The purpose that not volatile characteristic coexists.But this scheme is generally required to be different from common RAM to not power down RAM and used, to exploit person
Member brings very big cost overhead, and brings unpredictable challenge to software reliability.
At present, the occupation mode of not power down RAM includes：
1. absolute address is accessed.
Example:* (UINT32*) 0x1001A600=10101.
Advantage：The very clear address for knowing current accessed, it is simple and clear.
Shortcoming：Code readability is poor, easily cause the out-of-limit and data access mistake of access.
2. structure pointer is accessed.
Example:Struct DATA_STRUCT*pstData=(DATA_STRUCT*) 0x1001A600.
Advantage:Code readability is good.
Shortcoming:This scheme cannot still solve the problems, such as that internal memory is out-of-limit, and the size of structure is with member variable increase
And increase, when structure body length is more than RAM sizes, developer is simultaneously ignorant.
The content of the invention
For the problems referred to above, it is out-of-limit and interior that the present invention offer one kind internal memory easily occurs for solution never power down RAM access
Deposit a kind of EMS memory management process for not power down RAM of the problem of access exception.
To solve the above problems, the present invention provides a kind of by running time domain definition, section definition, forcing section distribution not fall
Electric RAM includes a kind of EMS memory management process for not power down RAM of memory management, specifically includes following steps：
Step one, establishment engineering connection profile.
Step 2, the corresponding loading time domain of definition executable program.
Step 3, the code segment operation time domain for defining at least one read only attribute.
Step 4, the corresponding data segment operation time domains of common RAM for defining at least one read-write attribute, data segment fortune
Row time domain includes all read-write data segments clearly do not specified and run time domain.
Step 5, definition not power down RAM exclusive data segment operation time domain, data segment operation time domain only includes one not
Initialized read-write data segment, and the read-write data segment is assigned to into the exclusive data segment operation time domains of not power down RAM
First address；This ensures that there first address of the data segment first address equal to not power down RAM, it is ensured that the data segment size is not
The size of not power down RAM can be exceeded, be that follow-up not power down RAM structure body variable forces distribution to do homework.
Step 6, the corresponding structures of definition not power down RAM.
Step 7, definition not power down RAM structure body variable, the structure variable is not initialized, and is not fallen described in being assigned to
The not initialized read-write data segment that electric RAM exclusive data segment operation time domain is included.
By not power down RAM structure body variable, the read-write data segment is assigned to.By running time domain definition, it is determined that not
The address of power down RAM and size.Defined by above-mentioned not power down RAM data section, it is ensured that the exclusive not power down RAM of the data segment, and
And segment length is not over not power down RAM sizes.And only force to be assigned to not power down RAM numbers by power down RAM structure body variable
According to section, this guarantees the variable can be assigned to the first address of the data segment, that is, the operation time domain first address, that is, not
Power down RAM first address.Do not initialized during definition structure body variable simultaneously, it is ensured that the variable retains when upper secondary program is run
Data value.
Beneficial effects of the present invention are as follows：
1. the absolute address of not power down RAM need not be concerned about when using.
2. not power down RAM structure is used, and code readability is good, and reliability is high.
3. variable uses are identical with common variabless, it is to avoid the null pointer problem easily occurred during pointer operation.
4. compiler meeting automatic detection not power down RAM currently takes size, and provides not power down RAM deficiency false alarms,
Inoperative memory is avoided to access the exception brought.
Description of the drawings
Fig. 1 is present invention loading time domain and operation time domain scattergram.
Specific embodiment
A kind of EMS memory management process for not power down RAM, comprises the following steps：
Step one, establishment engineering connection profile；
Step 2, the corresponding loading time domain of definition executable program；
Step 3, the code segment operation time domain for defining at least one read only attribute；
Step 4, the corresponding data segment operation time domains of common RAM for defining at least one read-write attribute, data segment fortune
Row time domain includes all read-write data segments clearly do not specified and run time domain；
Step 5, definition not power down RAM exclusive data segment operation time domain, data segment operation time domain only includes one not
Initialized read-write data segment, and the read-write data segment is assigned to into the exclusive data segment operation time domains of not power down RAM
First address；
Example：
This ensures that there first address of the data segment first address equal to not power down RAM, it is ensured that the data segment size
It is that follow-up not power down RAM structure body variable forces distribution to do homework not over the size of not power down RAM.
Step 6, the corresponding structures of definition not power down RAM；
Example：
Step 7, definition not power down RAM structure body variable, the structure variable is not initialized, and is not fallen described in being assigned to
The not initialized read-write data segment that electric RAM exclusive data segment operation time domain is included.
Example：
BK_SRAM_ST stBkSRAM__attribute__((section("RAM_SEC_A")))；
By not power down RAM structure body variable, the read-write data segment is assigned to.By running time domain definition, it is determined that not
The address of power down RAM and size.Defined by above-mentioned not power down RAM data section, it is ensured that the exclusive not power down RAM of the data segment, and
And segment length is not over not power down RAM sizes.And only force to be assigned to not power down RAM numbers by power down RAM structure body variable
According to section, this guarantees the variable can be assigned to the first address of the data segment, that is, the operation time domain first address, that is, not
Power down RAM first address.Define simultaneously
Do not initialized during structure variable, it is ensured that the variable retains data value when upper secondary program is run.
Claims (1)
1. a kind of EMS memory management process for not power down RAM, it is characterised in that comprise the following steps：
Step one, establishment engineering connection profile；
Step 2, the corresponding loading time domain of definition executable program；
Step 3, the code segment operation time domain for defining at least one read only attribute；
Step 4, the corresponding data segment operation time domains of common RAM for defining at least one read-write attribute, when the data segment runs
Domain includes all read-write data segments clearly do not specified and run time domain；
Step 5, definition not power down RAM exclusive data segment operation time domain, data segment operation time domain is not only initial comprising one
The read-write data segment changed, and the read-write data segment is assigned to into the first ground of the exclusive data segment operation time domains of not power down RAM
Location；
Step 6, the corresponding structures of definition not power down RAM；
Step 7, definition not power down RAM structure body variable, the structure variable is not initialized, and is assigned to the not power down RAM
The not initialized read-write data segment that exclusive data segment operation time domain is included.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611035452.9A CN106598879B (en) | 2016-11-22 | 2016-11-22 | Memory management method for RAM without power failure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611035452.9A CN106598879B (en) | 2016-11-22 | 2016-11-22 | Memory management method for RAM without power failure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106598879A true CN106598879A (en) | 2017-04-26 |
| CN106598879B CN106598879B (en) | 2020-06-09 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611035452.9A Expired - Fee Related CN106598879B (en) | 2016-11-22 | 2016-11-22 | Memory management method for RAM without power failure |
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| Country | Link |
|---|---|
| CN (1) | CN106598879B (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8112636B1 (en) * | 2007-11-06 | 2012-02-07 | Lockheed Martin Corporation | Protection of code or data from exposure by use of code injection service |
| CN103150125B (en) * | 2013-02-20 | 2015-06-17 | 郑州信大捷安信息技术股份有限公司 | Method for prolonging service life of power-down protection date buffer memory and smart card |
| CN104866345A (en) * | 2015-05-21 | 2015-08-26 | 福建升腾资讯有限公司 | Storage method of executable code under ARMv7m architecture |
| US20160172014A1 (en) * | 2014-12-15 | 2016-06-16 | Ocz Storage Solutions, Inc. | Leveraging instruction ram as a data ram extension during use of a modified harvard architecture processor |
| CN205564006U (en) * | 2016-05-04 | 2016-09-07 | 国网山东省电力公司阳谷县供电公司 | Long -range system of checking meter of jam -proof |
-
2016
- 2016-11-22 CN CN201611035452.9A patent/CN106598879B/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8112636B1 (en) * | 2007-11-06 | 2012-02-07 | Lockheed Martin Corporation | Protection of code or data from exposure by use of code injection service |
| CN103150125B (en) * | 2013-02-20 | 2015-06-17 | 郑州信大捷安信息技术股份有限公司 | Method for prolonging service life of power-down protection date buffer memory and smart card |
| US20160172014A1 (en) * | 2014-12-15 | 2016-06-16 | Ocz Storage Solutions, Inc. | Leveraging instruction ram as a data ram extension during use of a modified harvard architecture processor |
| CN104866345A (en) * | 2015-05-21 | 2015-08-26 | 福建升腾资讯有限公司 | Storage method of executable code under ARMv7m architecture |
| CN205564006U (en) * | 2016-05-04 | 2016-09-07 | 国网山东省电力公司阳谷县供电公司 | Long -range system of checking meter of jam -proof |
Non-Patent Citations (3)
| Title |
|---|
| 刘智臣: "ARM映像文件机理分析及其应用", 《计算机工程》 * |
| 广州周立功单片机科技有限公司: "分散加载文件浅释", 《HTTPS://WENKU.BAIDU.COM/VIEW/E77C57F1A26925C52DC5BF55.HTML 》 * |
| 徐梦岚等: "F_RAM存储器在智能电表中的功用", 《中国电子商情 基础电子》 * |
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| Publication number | Publication date |
|---|---|
| CN106598879B (en) | 2020-06-09 |
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