CN106575263A - 经压缩数据区段的高速缓存行压实 - Google Patents

经压缩数据区段的高速缓存行压实 Download PDF

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Publication number
CN106575263A
CN106575263A CN201580041874.4A CN201580041874A CN106575263A CN 106575263 A CN106575263 A CN 106575263A CN 201580041874 A CN201580041874 A CN 201580041874A CN 106575263 A CN106575263 A CN 106575263A
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China
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data
data segments
computing device
address
identified
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CN201580041874.4A
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English (en)
Chinese (zh)
Inventor
A·E·特纳
G·帕奇拉腊斯
B·雷赫利克
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Qualcomm Inc
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Qualcomm Inc
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Publication of CN106575263A publication Critical patent/CN106575263A/zh
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0877—Cache access modes
    • G06F12/0886—Variable-length word access
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G06F2212/1021—Hit rate improvement
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/40—Specific encoding of data in memory or cache
    • G06F2212/401—Compressed data
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/45—Caching of specific data in cache memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/608—Details relating to cache mapping

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
CN201580041874.4A 2014-08-05 2015-07-09 经压缩数据区段的高速缓存行压实 Pending CN106575263A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/451,639 US9361228B2 (en) 2014-08-05 2014-08-05 Cache line compaction of compressed data segments
US14/451,639 2014-08-05
PCT/US2015/039736 WO2016022247A1 (en) 2014-08-05 2015-07-09 Cache line compaction of compressed data segments

Publications (1)

Publication Number Publication Date
CN106575263A true CN106575263A (zh) 2017-04-19

Family

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CN201580041874.4A Pending CN106575263A (zh) 2014-08-05 2015-07-09 经压缩数据区段的高速缓存行压实

Country Status (5)

Country Link
US (2) US9361228B2 (enExample)
EP (1) EP3178005B1 (enExample)
JP (1) JP6370988B2 (enExample)
CN (1) CN106575263A (enExample)
WO (1) WO2016022247A1 (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111367831A (zh) * 2020-03-26 2020-07-03 超验信息科技(长沙)有限公司 翻译页表的深度预取方法、部件、微处理器及计算机设备
CN112699063A (zh) * 2021-03-25 2021-04-23 轸谷科技(南京)有限公司 用于解决通用ai处理器存储带宽效率的动态缓存方法
CN114422499A (zh) * 2021-12-27 2022-04-29 北京奇艺世纪科技有限公司 一种文件下载方法、系统及装置

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9361228B2 (en) 2014-08-05 2016-06-07 Qualcomm Incorporated Cache line compaction of compressed data segments
JP2016091242A (ja) * 2014-10-31 2016-05-23 富士通株式会社 キャッシュメモリ、キャッシュメモリへのアクセス方法及び制御プログラム
US10025956B2 (en) * 2015-12-18 2018-07-17 Intel Corporation Techniques to compress cryptographic metadata for memory encryption
US9916245B2 (en) * 2016-05-23 2018-03-13 International Business Machines Corporation Accessing partial cachelines in a data cache
US10031834B2 (en) 2016-08-31 2018-07-24 Microsoft Technology Licensing, Llc Cache-based tracing for time travel debugging and analysis
US10031833B2 (en) 2016-08-31 2018-07-24 Microsoft Technology Licensing, Llc Cache-based tracing for time travel debugging and analysis
US10042737B2 (en) 2016-08-31 2018-08-07 Microsoft Technology Licensing, Llc Program tracing for time travel debugging and analysis
US10489273B2 (en) 2016-10-20 2019-11-26 Microsoft Technology Licensing, Llc Reuse of a related thread's cache while recording a trace file of code execution
US10310963B2 (en) 2016-10-20 2019-06-04 Microsoft Technology Licensing, Llc Facilitating recording a trace file of code execution using index bits in a processor cache
US10310977B2 (en) 2016-10-20 2019-06-04 Microsoft Technology Licensing, Llc Facilitating recording a trace file of code execution using a processor cache
US10324851B2 (en) 2016-10-20 2019-06-18 Microsoft Technology Licensing, Llc Facilitating recording a trace file of code execution using way-locking in a set-associative processor cache
US10540250B2 (en) 2016-11-11 2020-01-21 Microsoft Technology Licensing, Llc Reducing storage requirements for storing memory addresses and values
US10318332B2 (en) 2017-04-01 2019-06-11 Microsoft Technology Licensing, Llc Virtual machine execution tracing
US10296442B2 (en) 2017-06-29 2019-05-21 Microsoft Technology Licensing, Llc Distributed time-travel trace recording and replay
US10459824B2 (en) 2017-09-18 2019-10-29 Microsoft Technology Licensing, Llc Cache-based trace recording using cache coherence protocol data
US10558572B2 (en) 2018-01-16 2020-02-11 Microsoft Technology Licensing, Llc Decoupling trace data streams using cache coherence protocol data
US11907091B2 (en) 2018-02-16 2024-02-20 Microsoft Technology Licensing, Llc Trace recording by logging influxes to an upper-layer shared cache, plus cache coherence protocol transitions among lower-layer caches
US10642737B2 (en) 2018-02-23 2020-05-05 Microsoft Technology Licensing, Llc Logging cache influxes by request to a higher-level cache
US10496537B2 (en) 2018-02-23 2019-12-03 Microsoft Technology Licensing, Llc Trace recording by logging influxes to a lower-layer cache based on entries in an upper-layer cache
KR20200006379A (ko) * 2018-07-10 2020-01-20 에스케이하이닉스 주식회사 컨트롤러 및 그것의 동작방법
US10942808B2 (en) * 2018-12-17 2021-03-09 International Business Machines Corporation Adaptive data and parity placement using compression ratios of storage devices
US10997085B2 (en) * 2019-06-03 2021-05-04 International Business Machines Corporation Compression for flash translation layer
US11601136B2 (en) 2021-06-30 2023-03-07 Bank Of America Corporation System for electronic data compression by automated time-dependent compression algorithm
US11567872B1 (en) * 2021-07-08 2023-01-31 Advanced Micro Devices, Inc. Compression aware prefetch
US11573899B1 (en) * 2021-10-21 2023-02-07 International Business Machines Corporation Transparent interleaving of compressed cache lines
US12014047B2 (en) * 2022-08-24 2024-06-18 Red Hat, Inc. Stream based compressibility with auto-feedback

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030131184A1 (en) * 2002-01-10 2003-07-10 Wayne Kever Apparatus and methods for cache line compression
US20040073747A1 (en) * 2002-10-10 2004-04-15 Synology, Inc. Method, system and apparatus for scanning newly added disk drives and automatically updating RAID configuration and rebuilding RAID data
US20060184734A1 (en) * 2005-02-11 2006-08-17 International Business Machines Corporation Method and apparatus for efficiently accessing both aligned and unaligned data from a memory
CN102141905A (zh) * 2010-01-29 2011-08-03 上海芯豪微电子有限公司 一种处理器体系结构
CN102541747A (zh) * 2010-10-25 2012-07-04 马维尔国际贸易有限公司 存储器系统中的数据压缩和编码

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07129470A (ja) * 1993-11-09 1995-05-19 Hitachi Ltd ディスク制御方法
JP3426385B2 (ja) * 1995-03-09 2003-07-14 富士通株式会社 ディスク制御装置
US6658552B1 (en) * 1998-10-23 2003-12-02 Micron Technology, Inc. Processing system with separate general purpose execution unit and data string manipulation unit
US7143238B2 (en) 2003-09-30 2006-11-28 Intel Corporation Mechanism to compress data in a cache
US7162584B2 (en) 2003-12-29 2007-01-09 Intel Corporation Mechanism to include hints within compressed data
US7162583B2 (en) 2003-12-29 2007-01-09 Intel Corporation Mechanism to store reordered data with compression
US7257693B2 (en) 2004-01-15 2007-08-14 Intel Corporation Multi-processor computing system that employs compressed cache lines' worth of information and processor capable of use in said system
US8341380B2 (en) 2009-09-22 2012-12-25 Nvidia Corporation Efficient memory translator with variable size cache line coverage
US9361228B2 (en) 2014-08-05 2016-06-07 Qualcomm Incorporated Cache line compaction of compressed data segments

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030131184A1 (en) * 2002-01-10 2003-07-10 Wayne Kever Apparatus and methods for cache line compression
US20040073747A1 (en) * 2002-10-10 2004-04-15 Synology, Inc. Method, system and apparatus for scanning newly added disk drives and automatically updating RAID configuration and rebuilding RAID data
US20060184734A1 (en) * 2005-02-11 2006-08-17 International Business Machines Corporation Method and apparatus for efficiently accessing both aligned and unaligned data from a memory
CN102141905A (zh) * 2010-01-29 2011-08-03 上海芯豪微电子有限公司 一种处理器体系结构
CN102541747A (zh) * 2010-10-25 2012-07-04 马维尔国际贸易有限公司 存储器系统中的数据压缩和编码

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
ALAMELDEEN A R ET AL: "Adaptive cache compression for high-performance processors", 《COMPUTER ARCHITECTURE, 2004. PROCEEDINGS. 31ST ANNUAL INTERNATIONAL SY MPOSIUM ON MUNCHEN》 *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111367831A (zh) * 2020-03-26 2020-07-03 超验信息科技(长沙)有限公司 翻译页表的深度预取方法、部件、微处理器及计算机设备
CN111367831B (zh) * 2020-03-26 2022-11-11 超睿科技(长沙)有限公司 翻译页表的深度预取方法、部件、微处理器及计算机设备
CN112699063A (zh) * 2021-03-25 2021-04-23 轸谷科技(南京)有限公司 用于解决通用ai处理器存储带宽效率的动态缓存方法
CN112699063B (zh) * 2021-03-25 2021-06-22 轸谷科技(南京)有限公司 用于解决通用ai处理器存储带宽效率的动态缓存方法
CN114422499A (zh) * 2021-12-27 2022-04-29 北京奇艺世纪科技有限公司 一种文件下载方法、系统及装置
CN114422499B (zh) * 2021-12-27 2023-12-05 北京奇艺世纪科技有限公司 一种文件下载方法、系统及装置

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Publication number Publication date
US20160203084A1 (en) 2016-07-14
JP6370988B2 (ja) 2018-08-08
US20160041905A1 (en) 2016-02-11
US10261910B2 (en) 2019-04-16
EP3178005B1 (en) 2018-01-10
WO2016022247A1 (en) 2016-02-11
EP3178005A1 (en) 2017-06-14
US9361228B2 (en) 2016-06-07
JP2017529591A (ja) 2017-10-05

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Application publication date: 20170419