CN106571160A - Processing method of phase change memory - Google Patents
Processing method of phase change memory Download PDFInfo
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- CN106571160A CN106571160A CN201510669893.3A CN201510669893A CN106571160A CN 106571160 A CN106571160 A CN 106571160A CN 201510669893 A CN201510669893 A CN 201510669893A CN 106571160 A CN106571160 A CN 106571160A
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- 230000008859 change Effects 0.000 title claims abstract description 28
- 238000003672 processing method Methods 0.000 title claims abstract description 16
- 239000012782 phase change material Substances 0.000 claims abstract description 79
- 238000000034 method Methods 0.000 claims abstract description 43
- 239000000203 mixture Substances 0.000 claims abstract description 29
- 150000001768 cations Chemical class 0.000 claims abstract description 16
- 238000005204 segregation Methods 0.000 claims abstract description 8
- 230000007704 transition Effects 0.000 claims description 30
- 239000000463 material Substances 0.000 claims description 12
- 230000005012 migration Effects 0.000 claims description 10
- 238000013508 migration Methods 0.000 claims description 10
- 230000002776 aggregation Effects 0.000 claims description 9
- 238000004220 aggregation Methods 0.000 claims description 9
- 230000004927 fusion Effects 0.000 claims description 9
- 230000006399 behavior Effects 0.000 claims description 6
- 230000009466 transformation Effects 0.000 claims description 6
- 125000002091 cationic group Chemical group 0.000 claims description 5
- 125000000129 anionic group Chemical group 0.000 claims description 3
- 230000008439 repair process Effects 0.000 abstract description 5
- 238000005280 amorphization Methods 0.000 abstract 1
- 150000001450 anions Chemical class 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 description 20
- 230000008569 process Effects 0.000 description 17
- 239000000758 substrate Substances 0.000 description 16
- 229910052723 transition metal Inorganic materials 0.000 description 8
- 150000003624 transition metals Chemical class 0.000 description 8
- 210000001367 artery Anatomy 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 6
- 210000003462 vein Anatomy 0.000 description 6
- 230000005611 electricity Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000011084 recovery Methods 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
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Abstract
The invention relates to a processing method of a phase change memory. The phase change memory comprises a transistor and a phase change memory resistance unit, wherein the drain electrode of the transistor is electrically connected with the phase change memory resistance unit. The method comprises the following steps: S1, applying voltage to the grid electrode of the transistor to conduct the transistor, enabling one end of a phase change material layer at which anions are aggregated in the phase change memory resistance unit to electrically connect with the cathode of a pulse power supply, and enabling one end of the phase change material layer at which cations are aggregated to electrically connect with the anode of the pulse power supply; and S2, applying pulse voltage to recover the cations which are migrated and to restore compositions of the phase change material layer which is subjected to composition segregation to normal. According to the processing method disclosed by the invention, the cations which are migrated can be recovered to repair the compositions of the phase change material layer, and thus the amorphization operation (RESET) of PCRAM succeeds, and the performance of PCRAM can be improved.
Description
Technical field
The present invention relates to semiconductor applications, in particular it relates to a kind of process side of phase transition storage
Method.
Background technology
It is non-easy with the popularization of the development of information technology, particularly mobile phone and other portable electric appts
The property lost storage chip application has penetrated into the every aspect of modern humans' life.Flash memory (Flash
Memory) considerable sending out has been obtained between past ten several years as a kind of typical nonvolatile memory
Exhibition, but after semiconductor technology enters 22nm nodes, the flash memory technology of electric charge is stored in chi based on floating boom
Very little diminution aspect encounters difficulty.Now, phase-change random access memory (PCRAM:Phase Change
Random Access Memory) technology due to its cellar area, read or write speed, read-write number of times sum
There is larger superiority relative to flash memory technology according to all many-sides such as retention time, obtain extensive at present
Using.
Wherein, the PCRAM is the candidate that in-line memory gets a good chance of, but in operation
It was found that the PCRAM is difficult to decrystallized operation (RESET), the decrystallized operations of wherein PCRAM
(RESET) main cause of failure is that phase-change material layers composition occurs segregation, is difficult to cause so as to cause
The change of crystal structure.Wherein, phase-change material layers composition segregation main reason is that in back-end process electricity
Thermal process in related process and back end of line, such as with phase transformation in electric related technique in back end of line
There is the electromigration of ion in material layer, such as phase-change material layers positive charge ion is to negative electrode in the presence of electricity
Migration etc., such as crystallite dimension described in heat treatment process in phase-change material layers becomes big etc., these changes
Change all can produce impact to the phase transformation of phase-change material layers, cause phase transition process to fail, so as to cause PCRAM
Decrystallized operation (RESET) failure.
Accordingly, it would be desirable to the above-mentioned various problems to presently, there are are improved, it is non-to eliminate PCRAM
Crystallization operates the problem of (RESET) failure.
The content of the invention
A series of concept of reduced forms is introduced in Summary, this will be in specific embodiment
Further describe in part.The Summary of the present invention is not meant to attempt to limit institute
The key feature and essential features of claimed technical scheme, does not more mean that attempting determination wants
Seek the protection domain of the technical scheme of protection.
The present invention is in order to overcome the problem of presently, there are, there is provided
A kind of processing method of phase transition storage, the phase transition storage includes transistor and phase change memory electricity
Resistance unit, the drain electrode of the transistor is electrically connected with the phase change memory resistance unit, and methods described includes:
Step S1:The applied voltage on the grid of the transistor, to turn on the transistor, and by institute
State one end of anionic aggregated in the phase-change material layers of phase change memory resistance unit electric with the negative electrode of the pulse power
Connection, one end of the phase-change material layers cationic aggregation electrically connects with the anode of the pulse power;
Step S2:Apply pulse voltage, so that the cation that migration occurs is restored, make generation composition
The composition of the phase-change material layers of segregation is returned to normally.
Alternatively, the source electrode of transistor and institute described in one end Jing of the phase-change material layers cationic aggregation
State the anode electrical connection of the pulse power.
Alternatively, the first pulse voltage is applied, so that temperature of the phase-change material layers under signal of telecommunication operation
Degree removes afterwards first pulse voltage more than the fusion point of the phase-change material layers.
Alternatively, methods described also includes step S212 after step S211:
After first pulse voltage is removed, judge that can the phase-change material layers carry out decrystallized behaviour
Make, if successfully carrying out decrystallized operation, the composition of the phase-change material layers recovers normal;
If carrying out decrystallized operation failure, repeating said steps S211 are to successfully carrying out the decrystallized behaviour
As only.
Alternatively, step S2 includes step S221:
Apply the second pulse voltage, so that temperature of the phase-change material layers under signal of telecommunication operation is less than institute
The fusion point of phase-change material layers is stated, and repeats to apply second pulse voltage several times, so that the phase
Change material layer temperature is gradually increasing and less than the fusion point of the phase-change material layers, described second is removed afterwards
Pulse voltage.
Alternatively, methods described also includes step S222 after step S221:
After second pulse voltage is removed, judge that can the phase-change material layers carry out decrystallized behaviour
Make, if successfully carrying out decrystallized operation, the composition of the phase-change material layers recovers normal;
If carrying out decrystallized operation failure, repeating said steps S221 are to decrystallized operation is successfully carried out
Only.
Alternatively, the phase change memory resistance unit at least includes Top electrode and bottom electrode and positioned at described
The phase-change material layers between Top electrode and the bottom electrode.
The present invention in order to solve problems of the prior art, especially for the electric phase in back-end process
The infringement caused to the phase-change material layers in technique and/or thermal process is closed, on the grid of the transistor
Applied voltage, to turn on the transistor, and by the phase-change material layers of the phase change memory resistance unit
Middle one end that cation transport aggregation occurs electrically connects with the negative electrode of the pulse power, by the source of the transistor
Pole electrically connects with the anode of the pulse power;Apply pulse voltage simultaneously so that occur the sun of migration from
Son restores, to repair the composition of the phase-change material layers, so as to the decrystallized operations of PCRAM (RESET)
Success, improves the performance of PCRAM.
Description of the drawings
The drawings below of the present invention is used to understand the present invention in this as the part of the present invention.Show in accompanying drawing
Embodiments of the invention and its description are gone out, for explaining the device and principle of the present invention.In the accompanying drawings,
Fig. 1 is that the structure of the specifically processing method of phase transition storage described in embodiment of the present invention one is shown
It is intended to;
Fig. 2 is the structural representation of the specifically phase transition storage described in embodiment of the present invention one;
Fig. 3 is the schematic diagram of pulse voltage of the present invention one specifically applied in embodiment;
Fig. 4 is that the flow process of the processing method of phase transition storage described in the present invention one is specifically implemented is illustrated
Figure.
Specific embodiment
In the following description, a large amount of concrete details are given to provide to the present invention more thoroughly
Understand.It is, however, obvious to a person skilled in the art that the present invention can be without the need for one
Or multiple these details and be carried out.In other examples, in order to avoid obscuring with the present invention,
For some technical characteristics well known in the art are not described.
It should be appreciated that the present invention can be implemented in different forms, and should not be construed as being limited to this
In propose embodiment.On the contrary, providing these embodiments disclosure will be made thoroughly and complete, and will be originally
The scope of invention fully passes to those skilled in the art.In the accompanying drawings, in order to clear, Ceng He areas
Size and relative size may be exaggerated.From start to finish same reference numerals represent identical element.
It should be understood that be referred to as when element or layer " ... on ", " with ... it is adjacent ", " being connected to " or " being coupled to "
When other elements or layer, its can directly on other elements or layer, it is adjacent thereto, connection or couple
To other elements or layer, or there may be element between two parties or layer.Conversely, when element is referred to as " directly
... on ", " with ... direct neighbor ", " being directly connected to " or when " being directly coupled to " other elements or layer, then
There is no element between two parties or layer.Although it should be understood that can be retouched using term first, second, third, etc.
Various elements, part, area, floor and/or part are stated, these elements, part, area, floor and/or part are not
Should be limited by these terms.These terms are used merely to distinguish element, part, area, floor or a portion
Divide and another element, part, area, floor or part.Therefore, without departing from present invention teach that under,
First element discussed below, part, area, floor or part be represented by the second element, part, area,
Layer or part.
Spatial relationship term for example " ... under ", " ... below ", " below ", " ... under ", " ...
On ", " above " etc., can describe for convenience here and by using so as to describe shown in figure
Individual element or feature and other elements or the relation of feature.It should be understood that except the orientation shown in figure with
Outward, spatial relationship term is intended to also include the different orientation of the device in using and operating.For example, if
Device upset in accompanying drawing, then, is described as " below other elements " or " under it " or " under it "
Element or feature will be oriented to other elements or feature " on ".Therefore, exemplary term " ... below "
" ... under " may include upper and lower two orientations.Device can additionally be orientated and (be rotated by 90 ° or other take
To) and spatial description language as used herein correspondingly explained.
The purpose of term as used herein is only that description specific embodiment and not as the limit of the present invention
System.When here is used, " one " of singulative, " one " and " described/should " be also intended to include plural form,
Unless context is expressly noted that other mode.It is also to be understood that term " composition " and/or " including ", when at this
When used in description, the presence of the feature, integer, step, operation, element and/or part is determined,
But it is not excluded for one or more other features, integer, step, operation, element, part and/or group
Exist or add.When here is used, term "and/or" includes any and all combination of related Listed Items.
In order to thoroughly understand the present invention, detailed step and detailed knot will be proposed in following description
Structure, to explain technical scheme.Presently preferred embodiments of the present invention is described in detail as follows, but
In addition to these detailed descriptions, the present invention can also have other embodiment.
Embodiment one
The present invention is in order to solve problems of the prior art, there is provided a kind of process of phase transition storage
Method, is further described below in conjunction with the accompanying drawings to the method for the invention.Wherein, Fig. 1 is this
The structural representation of the bright one specifically processing method of phase transition storage described in embodiment;Fig. 2 is this
The structural representation of bright one specifically phase transition storage described in embodiment;Fig. 3 for the present invention one specifically
The schematic diagram of the pulse voltage applied in embodiment.
The invention discloses a kind of processing method of phase transition storage, a kind of processing method of phase transition storage,
The phase transition storage includes transistor and phase change memory resistance unit, the drain electrode of the transistor with it is described
Phase change memory resistance unit is electrically connected, and methods described includes:
Step S1:Applied voltage on the grid of the transistor, to turn on the transistor, and will
There is one end and the pulse electricity of cation transport aggregation in the phase-change material layers of the phase change memory resistance unit
The negative electrode electrical connection in source, the source electrode of the transistor is electrically connected with the anode of the pulse power, and such as Fig. 1 is left
Shown in the figure of side;
Step S2:Apply pulse voltage, so that the cation that migration occurs is restored, make generation composition
The composition of the phase-change material layers of segregation is returned to normally.
Wherein, in the phase transition storage, the transistor can be transistor common in this area,
For example include Semiconductor substrate, the grid structure in the Semiconductor substrate, positioned at grid knot
The primary elements such as source, the drain terminal at structure two ends, can also include other conventional components and parts, here certainly
Repeat no more.
Wherein, the phase change memory resistance unit includes:
Tie comprising semiconductor device, metal interconnection in Semiconductor substrate 100, the Semiconductor substrate 100
Structure and isolation structure;
Bottom electrode 101 in the Semiconductor substrate 100, the surface of the bottom electrode 101 and institute
The surface for stating Semiconductor substrate 100 flushes, partly leading in the bottom electrode 101 and Semiconductor substrate 100
Body device or metal interconnection structure are electrically connected;
First medium layer 102 in the Semiconductor substrate 100;Positioned at the first medium layer 102
Interior small electrode 103, the small electrode 103 is electrically connected with the bottom electrode 101, the small electrode
103 cross-sectional area less than the bottom electrode 101 cross-sectional area, the surface of the small electrode 103 with
The surface of the first medium layer 102 flushes;
Phase-change material layers 105 on the small electrode 103, wherein the phase-change material layers 105 are selected
With the one kind in Ge, Sb and Te, in this embodiment from Ge;Positioned at the phase-change material layers 105
On transition metal layer 106, the transition metal layer 106 play bonding and heat-insulated effect;
Top electrode 107 on the transition metal layer 106, the Top electrode 107 and external circuit
Connection;Coat the phase-change material layers 105, the transition metal layer 106 and the Top electrode 107
Second dielectric layer 104, the surface of the second dielectric layer 104 flushes with the surface of the Top electrode 107,
As shown in Figure 2.
It should be understood that the structure of heretofore described phase transition storage is merely exemplary not
According to being confined to the example.
The one end for the phase-change material layers that the present invention assembles generation cation transport and the moon of the pulse power
Pole electrically connects, by applying pulse voltage, the recovery so that cation that migration occurs is moved back, to repair
The composition of the multiple phase-change material layers, as shown in right figure in Fig. 1.
Wherein, in step S2, the first pulse voltage is applied, as shown in left in Figure 3 phase transformation material
Material makes temperature exceed the fusion point of phase-change material under the operation of the signal of telecommunication, the signal of telecommunication is removed afterwards, so
Judge whether phase-change material can do decrystallized operation afterwards, if it can, explanation composition recovers normal, it is not all right,
Then need to repeat upper one electrically operated up to decrystallized operation can be done.
Wherein, in this step under the operation of the signal of telecommunication temperature is molten more than the phase-change material layers
Melt temperature Tm, now, the pulse amplitude of first pulse voltage is V1, and pulse width is T1, with
Ensure melt temperature T of the temperature more than the phase-change material layersm, as shown in left side figure in Fig. 3.
In this step pulse amplitude V1 is about between 2-5mA, or about between 2-3mA,
Pulse width is T1 in Millisecond, such as within 10 milliseconds, or within 2 milliseconds.The phase transformation material
About in 1mA or so, pulse width is T2 about 1 to the pulse amplitude V2 when bed of material is in crystal state
Within millisecond.
Specifically, in an embodiment of the present invention, the operating parameter depends on process condition, such as bottom
Portion contacts electrode size and material, phase-change material composition etc. for different bottom electrode sizes and material its arteries and veins
The value of high and pulsewidth is different, such as 80nm tungsten electrode bottom electrode sizes, pulse amplitude
About between 2-5mA, or about between 2-3mA, pulse width is T1 in Millisecond, example to V1
Within such as 10 milliseconds, or within 2 milliseconds.
Wherein, the phase-change material layers are generally from Ge, Sb or Te etc..
The present invention in order to solve problems of the prior art, especially for the electric phase in back-end process
The infringement caused to the phase-change material layers in technique and/or thermal process is closed, on the grid of the transistor
Applied voltage, to turn on the transistor, and by the phase-change material layers of the phase change memory resistance unit
Middle one end that cation transport aggregation occurs electrically connects with the negative electrode of the pulse power, by the source of the transistor
Pole electrically connects with the anode of the pulse power;Apply pulse voltage simultaneously so that occur the sun of migration from
Son restores, to repair the composition of the phase-change material layers, so as to the decrystallized operations of PCRAM (RESET)
Success, improves the performance of PCRAM.
Fig. 4 is that the flow process of the processing method of phase transition storage described in the present invention one is specifically implemented is illustrated
Figure, methods described includes:
Step S1:The applied voltage on the grid of the transistor, to turn on the transistor, and by institute
State one end of anionic aggregated in the phase-change material layers of phase change memory resistance unit electric with the negative electrode of the pulse power
Connection, one end of the phase-change material layers cationic aggregation electrically connects with the anode of the pulse power;
Step S2:Apply pulse voltage, so that the cation that migration occurs is restored, make generation composition
The composition of the phase-change material layers of segregation is returned to normally.
Embodiment two
The present invention is in order to solve problems of the prior art, there is provided a kind of process of phase transition storage
Method, is further described below in conjunction with the accompanying drawings to the method for the invention.Wherein, Fig. 1 is this
The structural representation of the bright one specifically processing method of phase transition storage described in embodiment;Fig. 2 is this
The structural representation of bright one specifically phase transition storage described in embodiment;Fig. 3 for the present invention one specifically
The schematic diagram of the pulse voltage applied in embodiment.
The present invention is in order to solve problems of the prior art, there is provided a kind of process of phase transition storage
Method, is further described below in conjunction with the accompanying drawings to the method for the invention.Wherein, Fig. 1 is this
The structural representation of the bright one specifically processing method of phase transition storage described in embodiment;Fig. 2 is this
The structural representation of bright one specifically phase transition storage described in embodiment;Fig. 3 for the present invention one specifically
The schematic diagram of the pulse voltage applied in embodiment.
The invention discloses a kind of processing method of phase transition storage, a kind of processing method of phase transition storage,
The phase transition storage includes transistor and phase change memory resistance unit, the drain electrode of the transistor with it is described
Phase change memory resistance unit is electrically connected, and methods described includes:
Step S1:Applied voltage on the grid of the transistor, to turn on the transistor, and will
There is one end and the pulse electricity of cation transport aggregation in the phase-change material layers of the phase change memory resistance unit
The negative electrode electrical connection in source, the source electrode of the transistor is electrically connected with the anode of the pulse power, and such as Fig. 1 is left
Shown in the figure of side;
Step S2:Apply pulse voltage, so that the cation that migration occurs is restored, make generation composition
The composition of the phase-change material layers of segregation is returned to normally.
Wherein, in the phase transition storage, the transistor can be transistor common in this area,
For example include Semiconductor substrate, the grid structure in the Semiconductor substrate, positioned at grid knot
The primary elements such as source, the drain terminal at structure two ends, can also include other conventional components and parts, here certainly
Repeat no more.
Wherein, the phase change memory resistance unit includes:
Tie comprising semiconductor device, metal interconnection in Semiconductor substrate 100, the Semiconductor substrate 100
Structure and isolation structure;
Bottom electrode 101 in the Semiconductor substrate 100, the surface of the bottom electrode 101 and institute
The surface for stating Semiconductor substrate 100 flushes, partly leading in the bottom electrode 101 and Semiconductor substrate 100
Body device or metal interconnection structure are electrically connected;
First medium layer 102 in the Semiconductor substrate 100;Positioned at the first medium layer 102
Interior small electrode 103, the small electrode 103 is electrically connected with the bottom electrode 101, the small electrode
103 cross-sectional area less than the bottom electrode 101 cross-sectional area, the surface of the small electrode 103 with
The surface of the first medium layer 102 flushes;
Phase-change material layers 105 on the small electrode 103, wherein the phase-change material layers 105 are selected
With the one kind in Ge, Sb and Te, in this embodiment from Ge;Positioned at the phase-change material layers 105
On transition metal layer 106, the transition metal layer 106 play bonding and heat-insulated effect;
Top electrode 107 on the transition metal layer 106, the Top electrode 107 and external circuit
Connection;Coat the phase-change material layers 105, the transition metal layer 106 and the Top electrode 107
Second dielectric layer 104, the surface of the second dielectric layer 104 flushes with the surface of the Top electrode 107,
As shown in Figure 2.
It should be understood that the structure of heretofore described phase transition storage is merely exemplary not
According to being confined to the example.
The one end for the phase-change material layers that the present invention assembles generation cation transport and the moon of the pulse power
Pole electrically connects, by applying pulse voltage, the recovery so that cation that migration occurs is moved back, to repair
The composition of the multiple phase-change material layers, as shown in right figure in Fig. 1.
Wherein, in step S2, as shown in right in Figure 3 phase-change material is less than into left figure at one
The operation (applying second pulse voltage) that telecommunications is felt the pulse high, makes temperature less than the melting of phase-change material
Point, and multiple signal of telecommunication operation (repeating to apply second pulse voltage) is carried out, make phase-change material
Temperature is gradually increasing, but is consistently less than fusion point temperature, and the second pulse voltage is removed afterwards, judges phase transformation
Whether material can do decrystallized operation, if it can, explanation composition recovers normal, it is not all right, then need weight
Multiple described electrically operated to operate until decrystallized operation be done, the phase-change material can do decrystallized operation operation
Then illustrate that composition recovers normal.
In the embodiment as different from Example 1, high the first larger arteries and veins of arteries and veins is applied in embodiment 1
Rush voltage and apply once, so that the temperature of the phase-change material reaches melt temperature, and in the enforcement
Example on top of the phase change material apply less than left figure telecommunications feel the pulse the second high pulse voltage and repeat applying institute
State the second pulse voltage several times, be gradually increasing phase-change material temperature, but be consistently less than fusion point temperature,
In this embodiment, little second pulse voltage of pulse amplitude and pulse width, such as pulse are applied
Amplitude V2, pulse width is T2, as shown in right figure in Fig. 3.
Specifically, in an embodiment of the present invention, phase-change material layers exceed about 160 when applying pulse voltage
Degree, in an embodiment of the present invention, the operating parameter is to rely on process condition, such as bottom contact
Electrode size and material, phase-change material composition etc. are for different bottom electrode sizes and its arteries and veins height of material and arteries and veins
Wide value is different, such as, for 80nm tungsten electrode bottom electrode sizes, arteries and veins is high about attached in 1mA
Closely, pulsewidth is about within 1 millisecond.
Wherein, the phase-change material layers are generally from Ge, Sb or Te etc..
The present invention is illustrated by above-described embodiment, but it is to be understood that, above-described embodiment
Citing and descriptive purpose are only intended to, and are not intended to limit the invention to described scope of embodiments
It is interior.In addition it will be appreciated by persons skilled in the art that the invention is not limited in above-described embodiment, root
More kinds of variants and modifications can also be made according to the teachings of the present invention, these variants and modifications all fall within this
Within inventing scope required for protection.Protection scope of the present invention is by the appended claims and its waits
Effect scope is defined.
Claims (7)
1. a kind of processing method of phase transition storage, the phase transition storage includes transistor and phase change memory
Resistance unit, the drain electrode of the transistor is electrically connected with the phase change memory resistance unit, methods described bag
Include:
Step S1:The applied voltage on the grid of the transistor, to turn on the transistor, and by institute
State one end of anionic aggregated in the phase-change material layers of phase change memory resistance unit electric with the negative electrode of the pulse power
Connection, one end of the phase-change material layers cationic aggregation electrically connects with the anode of the pulse power;
Step S2:Apply pulse voltage, so that the cation that migration occurs is restored, make generation composition
The composition of the phase-change material layers of segregation is returned to normally.
2. method according to claim 1, it is characterised in that the phase-change material layers cationic
The source electrode of transistor is electrically connected with the anode of the pulse power described in one end Jing of aggregation.
3. method according to claim 1, it is characterised in that step S2 includes step S211:
Apply the first pulse voltage, so that temperature of the phase-change material layers under signal of telecommunication operation exceedes institute
The fusion point of phase-change material layers is stated, first pulse voltage is removed afterwards.
4. method according to claim 3, it is characterised in that the institute after step S211
Stating method also includes step S212:
After first pulse voltage is removed, judge that can the phase-change material layers carry out decrystallized behaviour
Make, if successfully carrying out decrystallized operation, the composition of the phase-change material layers recovers normal;
If carrying out decrystallized operation failure, repeating said steps S211 are to successfully carrying out the decrystallized behaviour
As only.
5. method according to claim 1, it is characterised in that step S2 includes step S221:
Apply the second pulse voltage, so that temperature of the phase-change material layers under signal of telecommunication operation is less than institute
The fusion point of phase-change material layers is stated, and repeats to apply second pulse voltage several times, so that the phase
Change material layer temperature is gradually increasing and less than the fusion point of the phase-change material layers, described second is removed afterwards
Pulse voltage.
6. method according to claim 5, it is characterised in that the institute after step S221
Stating method also includes step S222:
After second pulse voltage is removed, judge that can the phase-change material layers carry out decrystallized behaviour
Make, if successfully carrying out decrystallized operation, the composition of the phase-change material layers recovers normal;
If carrying out decrystallized operation failure, repeating said steps S221 are to decrystallized operation is successfully carried out
Only.
7. method according to claim 1, it is characterised in that the phase change memory resistance unit is extremely
Include Top electrode and bottom electrode and the phase transformation material between the Top electrode and the bottom electrode less
The bed of material.
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Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050169093A1 (en) * | 2004-02-04 | 2005-08-04 | Byung-Gil Choi | Phase-change memory device and method of writing a phase-change memory device |
CN1747058A (en) * | 2004-06-19 | 2006-03-15 | 三星电子株式会社 | Adopt the phase-change memory device and the control method thereof of Control current method |
US20070103972A1 (en) * | 2005-11-07 | 2007-05-10 | Yu-Hwan Ro | Non-volatile phase-change memory device and method of reading the same |
CN101093723A (en) * | 2006-06-19 | 2007-12-26 | 奇梦达北美公司 | Memory cell programmed using a temperature controlled set pulse |
US20080212362A1 (en) * | 2004-05-08 | 2008-09-04 | Byung-Gil Choi | Control of set/reset pulse in response to peripheral temperature in pram device |
CN101818294A (en) * | 2010-04-28 | 2010-09-01 | 中国科学院上海微系统与信息技术研究所 | Nanometer composite phase-change material, preparation method and optimization method |
CN1819059B (en) * | 2005-02-10 | 2012-07-18 | 瑞萨电子株式会社 | Semiconductor memory device |
CN103325940A (en) * | 2013-05-31 | 2013-09-25 | 中国科学院上海微系统与信息技术研究所 | Phase-change memory cell and manufacturing method thereof |
-
2015
- 2015-10-13 CN CN201510669893.3A patent/CN106571160A/en active Pending
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050169093A1 (en) * | 2004-02-04 | 2005-08-04 | Byung-Gil Choi | Phase-change memory device and method of writing a phase-change memory device |
US20080212362A1 (en) * | 2004-05-08 | 2008-09-04 | Byung-Gil Choi | Control of set/reset pulse in response to peripheral temperature in pram device |
CN1747058A (en) * | 2004-06-19 | 2006-03-15 | 三星电子株式会社 | Adopt the phase-change memory device and the control method thereof of Control current method |
CN1819059B (en) * | 2005-02-10 | 2012-07-18 | 瑞萨电子株式会社 | Semiconductor memory device |
US20070103972A1 (en) * | 2005-11-07 | 2007-05-10 | Yu-Hwan Ro | Non-volatile phase-change memory device and method of reading the same |
CN101093723A (en) * | 2006-06-19 | 2007-12-26 | 奇梦达北美公司 | Memory cell programmed using a temperature controlled set pulse |
CN101818294A (en) * | 2010-04-28 | 2010-09-01 | 中国科学院上海微系统与信息技术研究所 | Nanometer composite phase-change material, preparation method and optimization method |
CN103325940A (en) * | 2013-05-31 | 2013-09-25 | 中国科学院上海微系统与信息技术研究所 | Phase-change memory cell and manufacturing method thereof |
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