CN106569888A - ARM interrupt processing method and system - Google Patents
ARM interrupt processing method and system Download PDFInfo
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- CN106569888A CN106569888A CN201610972905.4A CN201610972905A CN106569888A CN 106569888 A CN106569888 A CN 106569888A CN 201610972905 A CN201610972905 A CN 201610972905A CN 106569888 A CN106569888 A CN 106569888A
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
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Abstract
The invention discloses an ARM interrupt processing method. The ARM interrupt processing method comprises the steps of calling a package program code written based on a compilation language in advance if a first interrupt event is triggered, and performing corresponding processing by the package program code; calling an interrupt processing function written based on a C language in advance when an ARM processor is in a system mode state, executing an interrupt service program corresponding to the first interrupt event by employing the interrupt processing function, and closing shielding on interrupt during execution process of the interrupt service program; calling the package program code again to achieve interrupt nesting if a second interrupt event is triggered during the execution process of the interrupt service program corresponding to the first interrupt event. By the ARM interrupt processing method, labor cost and time cost which are required during the process of achieving ARM interrupt nesting can be substantially reduced. Moreover, the invention also discloses an ARM interrupt processing system.
Description
Technical field
The present invention relates to interrupt techniques field, more particularly to a kind of ARM interruption processing methods and system.
Background technology
Currently, the use of arm processor core is more and more extensive.In mobile device market, the market share of arm processor
More than 90%, in server market, arm processor becomes main flow and also points the day and await for it.
Arm processor is when processing to interrupt event, it is often necessary to carry out nested place to multiple interrupt events
Reason.However, when underway disconnected nested every time, being required to technical staff and writing again corresponding code manually, to realize correlation
The preservation of content of registers and recover original working condition, so obviously waste time and energy, be unfavorable for improving efficiency.
In sum as can be seen that cost of labor needed for how reducing during ARM interrupt nestings are realized and when
Between cost be have problem to be solved at present.
The content of the invention
In view of this, it is an object of the invention to provide a kind of ARM interruption processing methods and system, reduce and realizing
Cost of labor and time cost needed for during ARM interrupt nestings.Its concrete scheme is as follows:
A kind of ARM interruption processing methods, including:
If the first interrupt event is triggered, the canned program code for being in advance based on that assembler language is write is transferred, and utilizes institute
State canned program code to be processed accordingly, specifically include:Start the shielding to interrupting, by the mode of operation of arm processor
Interrupt mode is switched to, Current interrupt context is preserved, interrupted status information accordingly, by the ARM
The mode of operation of processor switches to system model by interrupt mode, records the system mode in presently described arm processor, obtains
To corresponding system status information;
In the arm processor in the state of system model, the interrupt processing letter for being in advance based on that C language is write is transferred
Number, and the interrupt processing function is utilized, interrupt service routine corresponding with first interrupt event is performed, and is taken in the interruption
In the implementation procedure of business program, the shielding to interrupting is closed;
In the implementation procedure of interrupt service routine corresponding with first interrupt event, if the second interrupt event is touched
Send out, then transfer the canned program code again, to realize interrupt nesting.
Preferably, first interrupt event be IRQ events, FIQ events, Reset events, Undef events, SWI events,
PAbort events, dAbort events or Reserved events.
Preferably, the ARM interruption processing methods, also include:
After the implementation procedure of interrupt service routine corresponding with first interrupt event terminates, restart to interrupting
Shielding.
Preferably, the corresponding processor architecture of the arm processor be ARMv4 frameworks, ARMv5 frameworks, ARMv6 frameworks or
ARMv7 frameworks.
Preferably, it is described to transfer the process for being in advance based on the interrupt processing function that C language is write, including:
Instructed by BX, transfer the interrupt processing function.
Preferably, the interrupt service routine is the interrupt service routine for being in advance based on the plate correlation that C language is write.
The present invention further correspondingly discloses a kind of ARM interrupt processing systems, including:
Status information preserving module, for when the triggering of the first interrupt event, then transferring and being in advance based on what assembler language was write
Canned program code, and processed using the canned program code accordingly, specifically include:Start the shielding to interrupting,
The mode of operation of arm processor is switched to into interrupt mode, Current interrupt context is preserved, obtained corresponding interruption and transport
The mode of operation of the arm processor is switched to system model by interrupt mode by row status information, records presently described ARM
System mode in processor, obtains corresponding system status information;
Function transfers module, in the state of system model, transfers and is in advance based on C languages in the arm processor
The interrupt processing function that speech is write;
Interruption processing module, for being transferred the interrupt processing function of module calls using the function, is performed and described the
The corresponding interrupt service routine of one interrupt event, and in the implementation procedure of the interrupt service routine, close the shielding to interrupting;
Interrupt nesting module, in the implementation procedure of interrupt service routine corresponding with first interrupt event,
If the second interrupt event is triggered, the canned program code is transferred again, to realize interrupt nesting.
Preferably, the ARM interrupt processing systems, also include:
Interrupt screen unit again, for the implementation procedure in interrupt service routine corresponding with first interrupt event
After end, the shielding to interrupting is restarted.
Preferably, the function transfers module, in the state of being in system model in the arm processor,
Instructed by BX, transfer the interrupt processing function.
In the present invention, ARM interruption processing methods include:If the first interrupt event is triggered, transfer and be in advance based on the language that collects
The canned program code that speech is write, and processed using canned program code accordingly, specifically include:Start the screen to interrupting
Cover, the mode of operation of arm processor is switched to into interrupt mode, Current interrupt context is preserved, in obtaining accordingly
The mode of operation of arm processor is switched to system model by interrupt mode by disconnected running state information, records current ARM process
System mode in device, obtains corresponding system status information;In arm processor in the state of system model, transfer pre-
The interrupt processing function first write based on C language, and the interrupt processing function is utilized, during execution is corresponding with the first interrupt event
Disconnected service routine, and in the implementation procedure of the interrupt service routine, close the shielding to interrupting;With the first interrupt event pair
In the implementation procedure of the interrupt service routine answered, if the triggering of the second interrupt event, transfers canned program code again, to realize
Interrupt nesting.
It can be seen that, canned program code has been write in advance in the present invention, after having interrupt event to trigger, just can directly invoke this
Canned program code, to realize the preservation of related status information, then performs corresponding interrupt service routine under system model,
And in the process of implementation, it will close the shielding to interrupting, so that be capable of identify that the interrupt event of new triggering, if
In above-mentioned implementation procedure, there is new interrupt event, then as the shielding now to interrupting is in failure state, so by energy
Enough recognize the interrupt event of the new triggering, so a upper interrupt event also it is untreated finish in the case of, transfer again
Canned program code is stated, interrupt nesting is achieved in.Therefore, as the present invention has been pre-created above-mentioned canned program code
And corresponding interrupt processing function, when underway disconnected nested, only need to repeat to call at above-mentioned canned program code and interruption
Reason function, the cost of labor and time cost needed for thus being greatly decreased during ARM interrupt nestings are realized.
Description of the drawings
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
Accompanying drawing to be used needed for having technology description is briefly described, it should be apparent that, drawings in the following description are only this
Inventive embodiment, for those of ordinary skill in the art, on the premise of not paying creative work, can be with basis
The accompanying drawing of offer obtains other accompanying drawings.
Fig. 1 is a kind of ARM interruption processing methods flow chart disclosed in the embodiment of the present invention;
Fig. 2 is a kind of ARM interrupt processing systems structural representation disclosed in the embodiment of the present invention.
Specific embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation is described, it is clear that described embodiment is only a part of embodiment of the invention, rather than the embodiment of whole.It is based on
Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of creative work is not made
Embodiment, belongs to the scope of protection of the invention.
The embodiment of the invention discloses a kind of ARM interruption processing methods, shown in Figure 1, the method includes:
Step S11:If the first interrupt event is triggered, the canned program code for being in advance based on that assembler language is write is transferred,
And processed using canned program code accordingly, specifically include:Start the shielding to interrupting, by the work of arm processor
Pattern switching is preserved to interrupt mode to Current interrupt context, and interrupted status information accordingly, by ARM
The mode of operation of processor switches to system model by interrupt mode, records the system mode in current arm processor, obtains phase
The system status information answered.
It is understood that above-mentioned first interrupt event is specifically as follows IRQ events (interrupt request), FIQ
Event (fast interrupt request), Reset events, Undef events (undefined instruction), SWI things
Part (software interrupt), pAbort events (prefetch abort interrupt), dAbort event (data
Abort interrupt) or Reserved events (arm reserved interrupt).
In addition, in the present embodiment, when above-mentioned canned program code is write, specifically can be in the universal stand of arm processor
Under structure, write using assembler language, can so enable above-mentioned canned program code to be applied to the ARM of different frameworks
Processor.In the present embodiment, the corresponding processor architecture of above-mentioned arm processor be specifically as follows ARMv4 frameworks, ARMv5 frameworks,
ARMv6 frameworks or ARMv7 frameworks.
In the present embodiment, by above-mentioned canned program code, can be to the running state information of respective interrupt and ARM at
The system status information of reason device carries out record preservation.It should be noted that the present embodiment specifically can be by preserving corresponding deposit
The mode of the content of device, realizes the preservation to above-mentioned interrupt operation status information and system status information.
Step S12:In arm processor in the state of system model, transfer and be in advance based at the interruption that C language is write
Reason function, and the interrupt processing function is utilized, interrupt service routine corresponding with the first interrupt event is performed, and is taken in the interruption
In the implementation procedure of business program, the shielding to interrupting is closed.
In the present embodiment, the above-mentioned process for transferring interrupt processing function can specifically include:Instructed by BX, in transferring
It is disconnected to process function.It should be noted that above-mentioned BX instructions refer to the carrier state switching jump instruction in arm processor.Using BX
Instruct to transfer above-mentioned interrupt processing function, ensure that when being compiled to above-mentioned interrupt processing function, no matter use
It is ARM instruction set or Thumb instruction set, can realizes compatibility.
In the present embodiment, above-mentioned interrupt service routine is specially the interruption service for being in advance based on the plate correlation that C language is write
Program, that is to say the interrupt service routine related with BSP (i.e. Board Support Package, board suppot package).
Step S13:In the implementation procedure of interrupt service routine corresponding with the first interrupt event, if the second interrupt event
Triggering, then transfer canned program code, again to realize interrupt nesting.
Further, in the present embodiment, terminate in the implementation procedure of interrupt service routine corresponding with the first interrupt event
Afterwards, shielding of the restarting to interrupting.
It can be seen that, write canned program code in the embodiment of the present invention in advance, after having interrupt event to trigger, just can be direct
The canned program code is called, and to realize the preservation of related status information, then corresponding interruption is performed under system model and is taken
Business program, and in the process of implementation, it will close the shielding to interrupting, so that be capable of identify that the interruption thing of new triggering
Part, if in above-mentioned implementation procedure, there is new interrupt event, then as the shielding now to interrupting is in failure state,
So be possible to recognize the interrupt event of the new triggering, so a upper interrupt event also it is untreated finish in the case of, then
It is secondary to transfer above-mentioned canned program code, it is achieved in interrupt nesting.Therefore, as the embodiment of the present invention has been pre-created
Canned program code and corresponding interrupt processing function are stated, when underway disconnected nested, only need to repeat to call above-mentioned encapsulation journey
Sequence code and interrupt processing function, needed for thus being greatly decreased during ARM interrupt nestings are realized it is artificial into
Sheet and time cost.
The embodiment of the invention discloses a kind of specific ARM interruption processing methods, relative to a upper embodiment, the present embodiment
Further instruction and optimization are made to technical scheme.Specifically:
In upper embodiment step S11, needs transfer the canned program code write in advance, and utilize the canned program generation
Code is processed accordingly.The present embodiment carries out the mistake of respective handling to above-mentioned utilization canned program code by taking IRQ interruptions as an example
Journey is described in detail.Specifically include below step S201 to S210:
Step S201:Shielding IRQ interrupts and FIQ interrupts, into IRQ interrupt modes;
Step S202:R0, r1 register value is temporarily stored in into r13_irq and r14_irq respectively;
That is, carrying out r0->R13_irq, r1->r14_irq.
Step S203:Preserve the value in return add and spsr depositors using r0, r1 depositor respectively;
That is, carry out (lr-4)->R0_sys, spsr->r1_sys.
Step S204:SYS mode are switched to, FIQ is enabled;
That is, being switched to system model, and close the shielding interrupted to FIQ.
Step S205:By r0, r1 ramming system stack, and by r2, r3, r12, lr depositor ramming system stack.
Step S206:Temporary sp_sys to r0 depositors.
That is, carrying out sp_sys->R0, to ensure that sp_sys is visible after IRQ interrupt modes are switched to.
Step S207:Adjustment stack pointer, is r0_sys and r1_sys depositor headspaces.
Step S208:IRQ interrupt modes are switched to, the masked state for keeping IRQ to interrupt.
Step S209:By r0, r1 depositor press-in sp_sys temporary before.
Step S210:SYS mode are switched to, the masked state for keeping IRQ to interrupt.
In the present embodiment, by above-mentioned steps S201 to S210, following detailed process is just capable of achieving:Start the screen to interrupting
Cover, the mode of operation of arm processor is switched to into interrupt mode, Current interrupt context is preserved, in obtaining accordingly
The mode of operation of arm processor is switched to system model by interrupt mode by disconnected running state information, records current ARM process
System mode in device, obtains corresponding system status information.
Accordingly, the embodiment of the invention also discloses a kind of ARM interrupt processing systems, shown in Figure 2, the system bag
Include:
Status information preserving module 11, for when the triggering of the first interrupt event, then transferring and being in advance based on assembler language and write
Canned program code, and processed using canned program code accordingly, specifically included:Start the shielding to interrupting, will
The mode of operation of arm processor switches to interrupt mode, Current interrupt context is preserved, is interrupted accordingly
The mode of operation of arm processor is switched to system model by interrupt mode by status information, is recorded in current arm processor
System mode, obtains corresponding system status information;
Function transfers module 12, in the state of system model, transfers and is in advance based on C language in arm processor
The interrupt processing function write;
Interruption processing module 13, for transferring the interrupt processing function that module 12 is transferred using function, in execution and first
The corresponding interrupt service routine of disconnected event, and in the implementation procedure of the interrupt service routine, close the shielding to interrupting;
Interrupt nesting module 14, in the implementation procedure of interrupt service routine corresponding with the first interrupt event, if
Second interrupt event is triggered, then transfer canned program code again, to realize interrupt nesting.
Further, above-mentioned ARM interrupt processing systems, also include:Interrupt screen unit again, for interrupting with first
After the implementation procedure of the corresponding interrupt service routine of event terminates, the shielding to interrupting is restarted.
In addition, above-mentioned function transfers module, can lead in the state of system model specifically in arm processor
BX instructions are crossed, interrupt processing function is transferred.
It can be seen that, write canned program code in the embodiment of the present invention in advance, after having interrupt event to trigger, just can be direct
The canned program code is called, and to realize the preservation of related status information, then corresponding interruption is performed under system model and is taken
Business program, and in the process of implementation, it will close the shielding to interrupting, so that be capable of identify that the interruption thing of new triggering
Part, if in above-mentioned implementation procedure, there is new interrupt event, then as the shielding now to interrupting is in failure state,
So be possible to recognize the interrupt event of the new triggering, so a upper interrupt event also it is untreated finish in the case of, then
It is secondary to transfer above-mentioned canned program code, it is achieved in interrupt nesting.Therefore, as the embodiment of the present invention has been pre-created
Canned program code and corresponding interrupt processing function are stated, when underway disconnected nested, only need to repeat to call above-mentioned encapsulation journey
Sequence code and interrupt processing function, needed for thus being greatly decreased during ARM interrupt nestings are realized it is artificial into
Sheet and time cost.
Finally, in addition it is also necessary to explanation, herein, such as first and second or the like relational terms be used merely to by
One entity or operation are made a distinction with another entity or operation, and are not necessarily required or implied these entities or operation
Between there is any this actual relation or order.And, term " including ", "comprising" or its any other variant are anticipated
Covering including for nonexcludability, so that a series of process, method, article or equipment including key elements not only includes that
A little key elements, but also including other key elements being not expressly set out, or also include for this process, method, article or
The intrinsic key element of equipment.In the absence of more restrictions, the key element for being limited by sentence "including a ...", does not arrange
Except also there is other identical element in including the process of the key element, method, article or equipment.
Above a kind of ARM interruption processing methods provided by the present invention and system are described in detail, herein should
The principle and embodiment of the present invention are set forth with specific case, the explanation of above example is only intended to help and manages
The solution method of the present invention and its core concept;Simultaneously for one of ordinary skill in the art, according to the thought of the present invention,
Will change in specific embodiment and range of application, in sum, this specification content is should not be construed as to this
Bright restriction.
Claims (9)
1. a kind of ARM interruption processing methods, it is characterised in that include:
If the first interrupt event is triggered, the canned program code for being in advance based on that assembler language is write is transferred, and utilizes the envelope
Dress program code is processed accordingly, is specifically included:Start the shielding to interrupting, the mode of operation of arm processor is switched
To interrupt mode, Current interrupt context is preserved, interrupted status information accordingly, by the ARM process
The mode of operation of device switches to system model by interrupt mode, records the system mode in presently described arm processor, obtains phase
The system status information answered;
In the arm processor in the state of system model, the interrupt processing function for being in advance based on that C language is write is transferred,
And the interrupt processing function is utilized, interrupt service routine corresponding with first interrupt event is performed, and is serviced in the interruption
In the implementation procedure of program, the shielding to interrupting is closed;
In the implementation procedure of interrupt service routine corresponding with first interrupt event, if the triggering of the second interrupt event,
The canned program code is transferred again, to realize interrupt nesting.
2. ARM interruption processing methods according to claim 1, it is characterised in that first interrupt event is IRQ things
Part, FIQ events, Reset events, Undef events, SWI events, pAbort events, dAbort events or Reserved events.
3. ARM interruption processing methods according to claim 1, it is characterised in that also include:
After the implementation procedure of interrupt service routine corresponding with first interrupt event terminates, the screen to interrupting is restarted
Cover.
4. ARM interruption processing methods according to claim 1, it is characterised in that the corresponding processor of the arm processor
Framework is ARMv4 frameworks, ARMv5 frameworks, ARMv6 frameworks or ARMv7 frameworks.
5. ARM interruption processing methods according to claim 1, it is characterised in that described transferring is in advance based on C language and writes
Interrupt processing function process, including:
Instructed by BX, transfer the interrupt processing function.
6. ARM interruption processing methods according to any one of claim 1 to 5, it is characterised in that the interrupt service routine
To be in advance based on the interrupt service routine of the plate correlation that C language is write.
7. a kind of ARM interrupt processing systems, it is characterised in that include:
Status information preserving module, for when the triggering of the first interrupt event, then transferring the encapsulation for being in advance based on that assembler language is write
Program code, and processed using the canned program code accordingly, specifically include:Start the shielding to interrupting, by ARM
The mode of operation of processor switches to interrupt mode, and Current interrupt context is preserved, and interrupted shape accordingly
The mode of operation of the arm processor is switched to system model by interrupt mode by state information, records presently described ARM process
System mode in device, obtains corresponding system status information;
Function transfers module, is in advance based on C language volume for, transferring in the state of system model in the arm processor
The interrupt processing function write;
Interruption processing module, for the interrupt processing function of module calls is transferred using the function, in execution and described first
The corresponding interrupt service routine of disconnected event, and in the implementation procedure of the interrupt service routine, close the shielding to interrupting;
Interrupt nesting module, in the implementation procedure of interrupt service routine corresponding with first interrupt event, if
Two interrupt events are triggered, then transfer the canned program code again, to realize interrupt nesting.
8. ARM interrupt processing systems according to claim 7, it is characterised in that also include:
Interrupt screen unit again, for terminating in the implementation procedure of interrupt service routine corresponding with first interrupt event
Afterwards, shielding of the restarting to interrupting.
9. ARM interrupt processing systems according to claim 7, it is characterised in that the function transfers module, specifically for
In the arm processor in the state of system model, instructed by BX, transfer the interrupt processing function.
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CN111240816A (en) * | 2020-01-03 | 2020-06-05 | 上海瀚之友信息技术服务有限公司 | Program interruptible operation system and method |
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Application publication date: 20170419 |