CN106557304A - 用于预测子程序返回指令的目标的取指单元 - Google Patents
用于预测子程序返回指令的目标的取指单元 Download PDFInfo
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- CN106557304A CN106557304A CN201610853165.2A CN201610853165A CN106557304A CN 106557304 A CN106557304 A CN 106557304A CN 201610853165 A CN201610853165 A CN 201610853165A CN 106557304 A CN106557304 A CN 106557304A
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Classifications
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30054—Unconditional branch instructions
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
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- G06F9/00—Arrangements for program control, e.g. control units
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- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
- G06F9/3806—Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer
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- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
- G06F9/4482—Procedural
- G06F9/4484—Executing subprograms
- G06F9/4486—Formation of subprogram jump address
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
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- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/30134—Register stacks; shift registers
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
- G06F9/30163—Decoding the operand specifier, e.g. specifier format with implied specifier, e.g. top of stack
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3808—Instruction prefetching for instruction reuse, e.g. trace cache, branch target cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3818—Decoding for concurrent execution
- G06F9/382—Pipelined decoding, e.g. using predecoding
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Advance Control (AREA)
Abstract
Description
Claims (18)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202210097700.1A CN114546485A (zh) | 2015-09-30 | 2016-09-26 | 用于预测子程序返回指令的目标的取指单元 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB1517321.4 | 2015-09-30 | ||
GB1517321.4A GB2542831B (en) | 2015-09-30 | 2015-09-30 | Fetch unit for predicting target for subroutine return instructions |
Related Child Applications (1)
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CN202210097700.1A Division CN114546485A (zh) | 2015-09-30 | 2016-09-26 | 用于预测子程序返回指令的目标的取指单元 |
Publications (2)
Publication Number | Publication Date |
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CN106557304A true CN106557304A (zh) | 2017-04-05 |
CN106557304B CN106557304B (zh) | 2022-02-18 |
Family
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CN201610853165.2A Active CN106557304B (zh) | 2015-09-30 | 2016-09-26 | 用于预测子程序返回指令的目标的取指单元 |
CN202210097700.1A Pending CN114546485A (zh) | 2015-09-30 | 2016-09-26 | 用于预测子程序返回指令的目标的取指单元 |
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CN202210097700.1A Pending CN114546485A (zh) | 2015-09-30 | 2016-09-26 | 用于预测子程序返回指令的目标的取指单元 |
Country Status (3)
Country | Link |
---|---|
US (1) | US10360037B2 (zh) |
CN (2) | CN106557304B (zh) |
GB (1) | GB2542831B (zh) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2571996B (en) * | 2018-03-16 | 2020-09-09 | Advanced Risc Mach Ltd | Branch target variant of branch-with-link instruction |
US10705846B2 (en) | 2018-08-15 | 2020-07-07 | Intel Corporation | Methods and apparatus to insert profiling instructions into a graphics processing unit kernel |
US10990405B2 (en) | 2019-02-19 | 2021-04-27 | International Business Machines Corporation | Call/return stack branch target predictor to multiple next sequential instruction addresses |
US11941401B1 (en) * | 2022-06-09 | 2024-03-26 | Apple Inc. | Instruction fetch using a return prediction circuit |
Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5968169A (en) * | 1995-06-07 | 1999-10-19 | Advanced Micro Devices, Inc. | Superscalar microprocessor stack structure for judging validity of predicted subroutine return addresses |
CN1560734A (zh) * | 2004-03-09 | 2005-01-05 | 中国人民解放军国防科学技术大学 | 双栈返回地址预测器设计方法 |
CN1632877A (zh) * | 2004-01-16 | 2005-06-29 | 智权第一公司 | 可变延滞时间堆栈快取存储器及提供资料的方法 |
US20060026410A1 (en) * | 2004-07-29 | 2006-02-02 | Fujitsu Limited | Branch predicting apparatus and branch predicting method |
US20060224870A1 (en) * | 1999-09-29 | 2006-10-05 | Tago Shin-Ichiro | Information processing device |
EP1853995A2 (en) * | 2005-02-18 | 2007-11-14 | Qualcomm Incorporated | Method and apparatus for managing a return stack |
CN101604235A (zh) * | 2009-07-10 | 2009-12-16 | 杭州电子科技大学 | 一种嵌入式处理器分支预测的方法 |
US20120297167A1 (en) * | 2011-05-20 | 2012-11-22 | Shah Manish K | Efficient call return stack technique |
CN104252335A (zh) * | 2013-06-28 | 2014-12-31 | 国际商业机器公司 | 用于选择的返回指令的预测获取和解码方法和系统 |
US20150089208A1 (en) * | 2013-06-28 | 2015-03-26 | International Business Machines Corporation | Predictor data structure for use in pipelined processing |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07239782A (ja) * | 1994-02-28 | 1995-09-12 | Toshiba Corp | 演算処理装置 |
JP4247132B2 (ja) * | 2004-01-29 | 2009-04-02 | 株式会社ルネサステクノロジ | 情報処理装置 |
US8341383B2 (en) * | 2007-11-02 | 2012-12-25 | Qualcomm Incorporated | Method and a system for accelerating procedure return sequences |
US7882338B2 (en) * | 2008-02-20 | 2011-02-01 | International Business Machines Corporation | Method, system and computer program product for an implicit predicted return from a predicted subroutine |
US9317293B2 (en) * | 2012-11-28 | 2016-04-19 | Qualcomm Incorporated | Establishing a branch target instruction cache (BTIC) entry for subroutine returns to reduce execution pipeline bubbles, and related systems, methods, and computer-readable media |
CN105511838B (zh) * | 2014-09-29 | 2018-06-29 | 上海兆芯集成电路有限公司 | 处理器及其执行方法 |
-
2015
- 2015-09-30 GB GB1517321.4A patent/GB2542831B/en not_active Expired - Fee Related
-
2016
- 2016-09-26 CN CN201610853165.2A patent/CN106557304B/zh active Active
- 2016-09-26 CN CN202210097700.1A patent/CN114546485A/zh active Pending
- 2016-09-30 US US15/281,661 patent/US10360037B2/en active Active
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5968169A (en) * | 1995-06-07 | 1999-10-19 | Advanced Micro Devices, Inc. | Superscalar microprocessor stack structure for judging validity of predicted subroutine return addresses |
US20060224870A1 (en) * | 1999-09-29 | 2006-10-05 | Tago Shin-Ichiro | Information processing device |
CN1632877A (zh) * | 2004-01-16 | 2005-06-29 | 智权第一公司 | 可变延滞时间堆栈快取存储器及提供资料的方法 |
CN1560734A (zh) * | 2004-03-09 | 2005-01-05 | 中国人民解放军国防科学技术大学 | 双栈返回地址预测器设计方法 |
US20060026410A1 (en) * | 2004-07-29 | 2006-02-02 | Fujitsu Limited | Branch predicting apparatus and branch predicting method |
EP1853995A2 (en) * | 2005-02-18 | 2007-11-14 | Qualcomm Incorporated | Method and apparatus for managing a return stack |
CN101604235A (zh) * | 2009-07-10 | 2009-12-16 | 杭州电子科技大学 | 一种嵌入式处理器分支预测的方法 |
US20120297167A1 (en) * | 2011-05-20 | 2012-11-22 | Shah Manish K | Efficient call return stack technique |
CN104252335A (zh) * | 2013-06-28 | 2014-12-31 | 国际商业机器公司 | 用于选择的返回指令的预测获取和解码方法和系统 |
US20150089208A1 (en) * | 2013-06-28 | 2015-03-26 | International Business Machines Corporation | Predictor data structure for use in pipelined processing |
Also Published As
Publication number | Publication date |
---|---|
GB2542831A (en) | 2017-04-05 |
CN114546485A (zh) | 2022-05-27 |
US20170090933A1 (en) | 2017-03-30 |
CN106557304B (zh) | 2022-02-18 |
GB2542831B (en) | 2018-05-30 |
GB201517321D0 (en) | 2015-11-11 |
US10360037B2 (en) | 2019-07-23 |
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Address after: Hertfordshire Applicant after: Mex Technology Co.,Ltd. Address before: Hertfordshire Applicant before: Hai Luo Software Co.,Ltd. |
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Effective date of registration: 20180713 Address after: California, USA Applicant after: Imagination Technologies Ltd. Address before: Hertfordshire Applicant before: Mex Technology Co.,Ltd. Effective date of registration: 20180713 Address after: Hertfordshire Applicant after: Hai Luo Software Co.,Ltd. Address before: Hertfordshire Applicant before: Imagination Technologies Ltd. |
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