CN106556973A - Photoetching method - Google Patents
Photoetching method Download PDFInfo
- Publication number
- CN106556973A CN106556973A CN201510629794.2A CN201510629794A CN106556973A CN 106556973 A CN106556973 A CN 106556973A CN 201510629794 A CN201510629794 A CN 201510629794A CN 106556973 A CN106556973 A CN 106556973A
- Authority
- CN
- China
- Prior art keywords
- photoresist
- thickness
- photoetching method
- layer
- baking
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
The present invention relates to a kind of photoetching method, including step：The photoresist of first thickness is coated on the surface layer to be etched of wafer；Wafer to being coated with photoresist is toasted；The top layer of photoresist is removed after baking, the photoresist of remaining second thickness；Development is exposed after removal to remaining photoresist, patterned photoresist is formed；Layer to be etched perform etching to described under the protection of the patterned photoresist.The present invention makes the organic molecule in photoresist fully be bonded, improve anti-etching ability, photoresist is comparatively dense and uniform, with higher anti-etching ability, so as to be effectively increased the surplus of photoresist after etching, prevent etch step to damage layer to be etched, improve the stability of the electric property and yield of device.
Description
Technical field
The present invention relates to semiconductor fabrication, more particularly to a kind of photoetching method.
Background technology
In chip manufacturing flow process, after MOS (metal-oxide semiconductor (MOS)) pipe is formed, will be into metal
The manufacture process of wire.It is for 8 inch wafer, 0.13 micron process processing procedure, most of to be made using AL (aluminium)
For plain conductor.The manufacture process of plain conductor includes several committed steps such as the deposition of AL, photoetching, etching.
In a kind of traditional technique, plain conductor in structure including bottom Ti/TiN (i.e. titanium or titanium nitride,
Similarly hereinafter), main body A L and top layer Ti/TiN.Wherein the thickness of first layer metal (Metal 1) AL is 3000
Angstrom.The etch step of first layer metal needs the metal film of specific region to etch away, and by below the region
Silica also etch away certain thickness (ensureing certain oxide loss).Photoresist is for need not carve
Play and stop that thickness adopts 5400 angstroms (thick through the optimised process of checking to the work for etching with photoresist in the region of erosion
Degree).
But inventor has found, the product manufactured using above-mentioned technique, it may appear that plain conductor loose contact
Situation, cause open circuit, chip rejection.Jing is looked into
Damage, as shown in figure 1, causing plain conductor meeting and the plain conductor loose contact on upper strata.Dotted line in Fig. 1
Frame represents preferable metal level outline line.
Inventor thinks that the photoresist consistency of the formation of above-mentioned traditional handicraft is inadequate, photoresist by analysis
Relatively more in the loss amount of etch step, remaining photoresist thickness is less, typically only 500 angstrom of -1000 Izod
It is right.And the etch rate of etch step and the selection ratio for photoresist have certain fluctuation, when fluctuation becomes
When big, the loss amount of photoresist can be bigger, so as to the photoresist for causing subregion loses totally, makes
The plain conductor gas that is etched into the sections bottom is hindered.
The content of the invention
Based on this, it is necessary to which photoresist loss when etching for plain conductor excessively causes what plain conductor was damaged
A kind of problem, there is provided photoetching method.
A kind of photoetching method, including step：The photoresist of first thickness is coated on the surface layer to be etched of wafer；
Wafer to being coated with photoresist is toasted；The top layer of photoresist is removed after baking, remaining second thickness
Photoresist；Development is exposed after removal to remaining photoresist, patterned photoresist is formed；Institute
State.
Wherein in one embodiment, the step of after the baking remove the top layer of photoresist, it is using quarter
Erosion equipment is using without the removal of mask etching technique.
Wherein in one embodiment, the step of after the baking remove the top layer of photoresist, it is using ash
Change degumming equipment to be removed.
Wherein in one embodiment, the step of the described pair of wafer for being coated with photoresist is toasted in, dry
Roasting temperature is 110 degrees Celsius～130 degrees Celsius, and baking time is 5 minutes～15 minutes.
Wherein in one embodiment, the step of the described pair of wafer for being coated with photoresist is toasted in, dry
Roasting temperature is 120 degrees Celsius, and baking time is 10 minutes.
Wherein in one embodiment, the second thickness is optimal work of the photoresist under current photolithographic technique
Skill thickness；When the optimised process thickness increases or decreases unit thickness for photoresist, the fluctuation of critical size
Minimum thickness.
Wherein in one embodiment, the first thickness is 1000 angstroms, and the optimised process thickness is 5400
Angstrom.
Wherein in one embodiment, it is described crystal column surface coat first thickness photoresist the step of in,
Model SEPR602 of photoresist.
Wherein in one embodiment, the step of after the baking remove the top layer of photoresist before, also wrap
Include the step of being determined by experiment the optimised process thickness.
It is wherein in one embodiment, described layer to be etched for metal level.
Wherein in one embodiment, the metal level is three-decker, and middle is aluminium lamination, top layer and bottom
For titanium layer or titanium nitride layer.
Above-mentioned photoetching method, increased a step low-temperature bake step after gluing, makes organic in photoresist
Molecule is fully bonded, and improves anti-etching ability, at the same can by the bioactive molecule and moisture in photoresist to
Upper evaporation, focuses on photoresist top layer, and after so remove top layer, remaining bottom photoresist is just more caused
It is dense and uniform, with higher anti-etching ability, so as to be effectively increased the surplus of photoresist after etching, prevent
Only etch step improves the stability of the electric property and yield of device to damage layer to be etched.
Description of the drawings
Fig. 1 is the schematic diagram that etching causes that metal level is damaged；
Fig. 2 is the flow chart of photoetching method in an embodiment.
Specific embodiment
For the ease of understanding the present invention, the present invention is described more fully below with reference to relevant drawings.
The first-selected embodiment of the present invention is given in accompanying drawing.But, the present invention can come real in many different forms
It is existing, however it is not limited to embodiment described herein.On the contrary, the purpose for providing these embodiments is made to this
Disclosure of the invention content is more thorough comprehensive.
Unless otherwise defined, all of technology used herein and scientific terminology and the technology for belonging to the present invention
The implication that the technical staff in field is generally understood that is identical.The art for being used in the description of the invention herein
Language is intended merely to the purpose for describing specific embodiment, it is not intended that of the invention in limiting.It is used herein
Term " and/or " including the arbitrary and all of combination of one or more related Listed Items.
Photoresist loss occurs in the starting point of the present invention when being and etching for metal level totally cause subregion
Metal level there occurs our the proposed improvement projects of undesirable etching loss.It should be understood that this
Bright photoetching method can also be applied to the etching technics of other levels, such as polysilicon (Poly) etching, oxygen
SiClx etching etc..
Fig. 2 is the flow chart of photoetching method in an embodiment, is comprised the following steps：
S110, coats the photoresist of first thickness on the surface layer to be etched of wafer.
In the present embodiment, it is layer to be etched for metal level.The metal level of three-decker can be specifically adopted, in
Between be aluminium lamination, top layer and bottom are titanium layer or titanium nitride layer, such as TiN/Al/TiN three-deckers.First is thick
Spend for the thickness more than optimised process thickness under current photolithographic technique.Optimised process thickness refers to photoresist
When increasing or decreasing unit thickness, the thickness of the fluctuation minimum of critical size (CD).Illustrate, for
Thickness is 6000 angstroms of photoresist, and when thickness has 100 angstroms of fluctuation, (i.e. thickness is changed into 5900 angstroms and 6100
Angstrom), CD can change 10-15nm.And when photoresist thickness is 5400 angstroms, thickness has 100 angstroms of fluctuation
(i.e. thickness is changed into 5300 angstroms and 6500 angstroms), the difference of CD<5nm, therefore 5400 angstroms relative to 6000
Angstrom thickness more preferably.Jing measurings when photoetching is carried out to metal level, using 5400 angstroms of thickness, photoetching
Impact of the thickness fluctuation of glue to CD is minimum, therefore is optimised process thickness.
S120, the wafer to being coated with photoresist are toasted.
The purpose of this step low-temperature bake photoresist is the organic molecule in photoresist is fully bonded, and improves anti-
Etching power, while being evaporated the bioactive molecule and moisture in photoresist upwards, focuses on photoresist table
Layer, the photoresist layer of such bottom are just comparatively dense and uniform, so that the photoresist layer of bottom has more
Strong anti-etching ability.
S130, the top layer of photoresist is removed, the photoresist of remaining second thickness.
Moisture and bioactive molecule more top layer is removed, so remaining photoresist layer is just comparatively dense and equal
It is even.The removal of top layer photoresist can carry out (entering photoresist top layer without mask etching using etching apparatus
The indiscriminate etching of row), it would however also be possible to employ ashing degumming equipment is removed photoresist by ashing and is removed.In this enforcement
In example, in order to control the fluctuation of CD during photoresist thickness fluctuation, second thickness is aforementioned optimised process thickness.
It should be understood that second thickness is selected excessively to lead with photoresist loss when solving etching for optimised process thickness
It doesn't matter for the problem that cause plain conductor is damaged.The optimised process thickness can be empirical value, it is also possible to make
Used time is measured by operator oneself.
S140, is exposed development to remaining photoresist, forms patterned photoresist.
This step can adopt known exposure imaging technique.So far, complete the step of photoetching.
S150, performs etching to layer to be etched under the protection of photoresist.
Photoetching is completed by above-mentioned steps, after forming photoetching offset plate figure, it is possible to which the patterned photoresist is
Mask is performed etching.
Above-mentioned photoetching method, increased a step low-temperature bake after gluing, makes the organic molecule in photoresist
Fully it is bonded, improves anti-etching ability, while the bioactive molecule and moisture in photoresist can be evaporated upwards,
Photoresist top layer is focused on, after so remove top layer, remaining bottom photoresist is just comparatively dense and uniform,
With higher anti-etching ability, so as to be effectively increased the surplus of photoresist after etching, etch step is prevented
Damage to (such as plain conductor) layer to be etched, the electric property and yield that improve device are stablized
Property.
Wherein in one embodiment, the baking temperature of step S120 is 110～130 degrees Celsius, baking time
For 5～15 minutes, preferably 120 degrees Celsius, 10 minutes.It should be understood that baking temperature is too high can bring
Series of problems, for example, reduce the adhesion of photoresist layer, reduces the sensitiveness of photoresist in exposure etc..
In embodiment of the remaining photoresist thickness of step S130 for optimised process thickness, the photoresist of removal
Top layer has how thick depending on first thickness.It should be understood that first thickness is blocked up to cause to waste.Wherein
In one embodiment, optimised process thickness isFirst thickness isInventor Jing experiments are surveyed
It is fixed, the preferably anti-etching effect of photoresist ensure that using this thickness.
Embodiment described above only expresses the several embodiments of the present invention, and its description is more concrete and detailed,
But therefore can not be construed as limiting the scope of the patent.It should be pointed out that for this area
For those of ordinary skill, without departing from the inventive concept of the premise, some deformations can also be made and is changed
Enter, these belong to protection scope of the present invention.Therefore, the protection domain of patent of the present invention should be with appended power
Profit requires to be defined.
Claims (10)
1. a kind of photoetching method, including step：
The photoresist of first thickness is coated on the surface layer to be etched of wafer；
Wafer to being coated with photoresist is toasted；
The top layer of photoresist is removed after baking, the photoresist of remaining second thickness；
Development is exposed after removal to remaining photoresist, patterned photoresist is formed；
Layer to be etched perform etching to described under the protection of the patterned photoresist.
2. photoetching method according to claim 1, it is characterised in that by photoresist after the baking
The step of top layer removes, is using without the removal of mask etching technique using etching apparatus.
3. photoetching method according to claim 1, it is characterised in that by photoresist after the baking
The step of top layer removes, is removed using ashing degumming equipment.
4. photoetching method according to claim 1, it is characterised in that described pair is coated with photoresist
In the step of wafer is toasted, baking temperature is 110 degrees Celsius～130 degrees Celsius, and baking time is 5 points
Clock～15 minute.
5. photoetching method according to claim 4, it is characterised in that the baking temperature is taken the photograph for 120
Family name's degree, baking time are 10 minutes.
6. photoetching method according to claim 1, it is characterised in that the second thickness is photoresist
Optimised process thickness under current photolithographic technique；The optimised process thickness increases or decreases list for photoresist
During the thickness of position, the thickness of the fluctuation minimum of critical size.
7. photoetching method according to claim 6, it is characterised in that the first thickness is 1000
Angstrom, the optimised process thickness is 5400 angstroms.
8. photoetching method according to claim 6, it is characterised in that by photoresist after the baking
Before the step of top layer removes, also including the optimised process thickness is determined by experiment the step of.
9. the photoetching method according to any one in claim 1-8, it is characterised in that described to be etched
Erosion layer is metal level.
10. photoetching method according to claim 9, it is characterised in that the metal level is three-layered node
Structure, middle is aluminium lamination, and top layer and bottom are titanium layer or titanium nitride layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510629794.2A CN106556973A (en) | 2015-09-28 | 2015-09-28 | Photoetching method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510629794.2A CN106556973A (en) | 2015-09-28 | 2015-09-28 | Photoetching method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106556973A true CN106556973A (en) | 2017-04-05 |
Family
ID=58417012
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510629794.2A Pending CN106556973A (en) | 2015-09-28 | 2015-09-28 | Photoetching method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106556973A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113436548A (en) * | 2021-06-23 | 2021-09-24 | 南方科技大学 | Preparation method of black matrix |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003100616A (en) * | 2001-09-27 | 2003-04-04 | Kyocera Corp | Method of forming wiring pattern |
| CN1433052A (en) * | 2002-01-16 | 2003-07-30 | 松下电器产业株式会社 | Pattern forming method |
| CN1608309A (en) * | 2001-10-25 | 2005-04-20 | 东京毅力科创株式会社 | Thermal treatment equipment and thermal treatment method |
| KR20060068595A (en) * | 2004-12-16 | 2006-06-21 | 주식회사 하이닉스반도체 | Method for fabricating semiconductor device |
| US20110263136A1 (en) * | 2010-04-26 | 2011-10-27 | Soo-Young Kim | Methods of forming a passivation layer |
| CN102509699A (en) * | 2011-11-02 | 2012-06-20 | 上海宏力半导体制造有限公司 | Metal layer photoresist repainting method and photoetching method |
| CN104820341A (en) * | 2015-04-02 | 2015-08-05 | 华南师范大学 | Method for preparing nano-patterns based on laser interferometric lithography |
| CN104838316A (en) * | 2012-12-07 | 2015-08-12 | 富士胶片株式会社 | Method for manufacturing cured film, cured film, liquid crystal display device and organic EL display device |
-
2015
- 2015-09-28 CN CN201510629794.2A patent/CN106556973A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003100616A (en) * | 2001-09-27 | 2003-04-04 | Kyocera Corp | Method of forming wiring pattern |
| CN1608309A (en) * | 2001-10-25 | 2005-04-20 | 东京毅力科创株式会社 | Thermal treatment equipment and thermal treatment method |
| CN1433052A (en) * | 2002-01-16 | 2003-07-30 | 松下电器产业株式会社 | Pattern forming method |
| KR20060068595A (en) * | 2004-12-16 | 2006-06-21 | 주식회사 하이닉스반도체 | Method for fabricating semiconductor device |
| US20110263136A1 (en) * | 2010-04-26 | 2011-10-27 | Soo-Young Kim | Methods of forming a passivation layer |
| CN102509699A (en) * | 2011-11-02 | 2012-06-20 | 上海宏力半导体制造有限公司 | Metal layer photoresist repainting method and photoetching method |
| CN104838316A (en) * | 2012-12-07 | 2015-08-12 | 富士胶片株式会社 | Method for manufacturing cured film, cured film, liquid crystal display device and organic EL display device |
| CN104820341A (en) * | 2015-04-02 | 2015-08-05 | 华南师范大学 | Method for preparing nano-patterns based on laser interferometric lithography |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113436548A (en) * | 2021-06-23 | 2021-09-24 | 南方科技大学 | Preparation method of black matrix |
| CN113436548B (en) * | 2021-06-23 | 2024-01-30 | 南方科技大学 | Preparation method of black matrix |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE112011102130T5 (en) | Planar cavity MEMS structures and related structures, fabrication processes, and design structures | |
| US10204933B2 (en) | Thin film transistor and method for manufacturing the same, and display panel | |
| Argoud et al. | 300mm pilot line DSA contact hole process stability | |
| US8372752B1 (en) | Method for fabricating ultra-fine nanowire | |
| TWI301296B (en) | Method for fabricating a hard mask polysilicon gate | |
| CN104977820A (en) | Method for removing photoresist though PR rework and semiconductor forming method | |
| CN106556973A (en) | Photoetching method | |
| WO2016047047A1 (en) | Soi wafer manufacturing method | |
| JP3544622B2 (en) | Method of forming double oxide film | |
| CN108630527B (en) | Contact hole cleaning method | |
| JP3957856B2 (en) | Manufacturing method of semiconductor device | |
| CN106783565B (en) | Improve the method for active area pit corrosion defect | |
| JP2004260189A (en) | Cleaning solution and board cleaning method using the same | |
| US9656860B2 (en) | Use of metal native oxide to control stress gradient and bending moment of a released MEMS structure | |
| JP2006148046A (en) | Method for manufacturing semiconductor device | |
| CN109300781B (en) | Method for manufacturing ONO film layer | |
| US20070072390A1 (en) | Techniques for removal of photolithographic films | |
| JPS598356A (en) | Fabrication of semiconductor integrated circuit device | |
| CN103871869A (en) | Non-photosensitive polyimide passivation layer manufacturing method | |
| JP6445717B2 (en) | Wet etching method and semiconductor device manufacturing method | |
| Aoki et al. | Direct Microrolling Processing on a Silicon Wafer | |
| JP2007123768A (en) | Thin film capacitor and its manufacturing method | |
| KR101776265B1 (en) | Method of producing hardmask layer, method of producing semiconductor device, and semiconductor device thereof | |
| CN106298494A (en) | A kind of polycrystalline silicon etching method | |
| US20020144972A1 (en) | Method for forming rough surface |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20170405 |