CN106547714A

CN106547714A - 232 transmitter circuit of High-Speed RS with self adaptation edge accelerating circuit

Info

Publication number: CN106547714A
Application number: CN201510851819.3A
Authority: CN
Inventors: 杨永华; 葛利明
Original assignee: YINGLIAN ELECTRONIC SCIENCE AND TECHNOLOGY Co Ltd SHANGHAI
Current assignee: YINGLIAN ELECTRONIC SCIENCE AND TECHNOLOGY Co Ltd SHANGHAI
Priority date: 2015-11-30
Filing date: 2015-11-30
Publication date: 2017-03-29

Abstract

A kind of RS232 transmitter circuits of suitable high-speed data communication application, the circuit can constitute 232 communication interface circuit of High-Speed RS together with 232 receptor of High-Speed RS.The transmitter automatically adjusts the rising edge and trailing edge of transmitter output RS232 signals according to the voltage difference of the speed and input and output signal of signal, makes it possible to meet the needs of the communication of High-Speed RS 232, solves the problems, such as that tradition RS232 transmitters are unable to high-speed applications.

Description

232 transmitter circuit of High-Speed RS with self adaptation edge accelerating circuit

Technical field

RS232 transmitter circuit of the present invention for RS232 transmitter circuits, particularly high-speed serial communication.

Background technology

, because communication mode is flexible, application scenario is more for RS232 communication standards, on line simple (only needing to RX, three lines of TX and ground), and in the electronic system being widely used in based on microcomputer and minicomputer.Traditional RS232 circuit communication speed ratios are relatively low, are typically limited to 250KBPS.As the data volume that communication is exchanged becomes increasing, the demand of the communication of High-Speed RS 232 is continuously increased.The present invention proposes a kind of high-speed transitions circuit of high speed TTL/CMOS to the RS232 signals with self adaptation edge accelerating circuit.RS232 transmitter data speed is allow to reach more than 5Mbps.

The content of the invention

The core of traditional RS232 transmitter circuits is the level shifting circuit of TTL/CMOS to RS232, change-over circuit adopt open loop approach by the TTL/CMOS level translations of low pressure for high pressure RS232 level.Due to being affected by circuit parasitic parameter and than larger conversion voltage difference, the switching rate of level shifting circuit is restricted.The present invention increases additional signal edge accelerating circuit, accelerate TTL/CMOS level to the conversion speed of RS232 level, and detect the amplitude of output RS232 level, edge accelerating circuit is automatically switched off after RS232 output levels reach suitable scope, realizes TTL/CMOS level to the high-speed transitions of RS232 level.

Description of the drawings

Fig. 1：TTL/CMOS to the RS232 level shifting circuits of traditional structure

Fig. 2：TTL/CMOS to the RS232 level shifting circuits of the present invention

Fig. 3：The N tube edges that level shifting circuit of the present invention is adopted are along accelerating circuit

Fig. 4：The P tube edges that level shifting circuit of the present invention is adopted are along accelerating circuit

Specific embodiment

Traditional RS232 transmitter circuits are by two-stage level shifting circuit by the amplitude of oscillation from logic power V_CCInput logic signal to ground changes into signal swing from high positive voltage V_DDPTo high negative voltage V_DDNThe output signal for meeting RS232 communication standards.

The drive circuit of traditional TTL/CMOS to RS232 is as shown in Figure 1, MP1 and MN1 constitutes first order phase inverter, MP2 and MN2 constitutes second level phase inverter, MP3, MP4 and MN3, MN4 composition first order level shifting circuits, MP5, MN5, MN7 and MP6, MN6, MN8 composition second level level shifting circuit, MP7, MN9 and MN10 composition output driver circuit.Output driving MN4 of first order phase inverter, output driving MN3 of second level driver, so as to by amplitude be 0～V_CCD_INSignal is converted into 0～～V of output amplitude_DDPM signal DM1 and DM2, DM1 and DM2 signals drive MP6, MP5 in the level shifting circuit of the second level respectively, so as to obtain output amplitude for V_DDP _~V_DDNOutput signal DM3, DM3 exports D Jing after output buffer that MP7, MN9, MN10 are constituted increase output current ability_OUT。

Due to V_DDP、V_DDNVoltage is higher, with V_CCAnd GND potential differences are larger, by MN3, MN4, MP5, MP6 size restriction and parasitic parameter affected, the DM3 for finally obtaining and D_OUTThe rising edge of signal and trailing edge and D_INCompare it is significantly slack-off, so as to be not suitable with high speed signal conversion requirement.

If can reduce rising edge and the trailing edge time of level conversion, accelerate the operating frequency that level conversion process can just improve RS232 transmitter circuits.

The implementation of the present invention is as shown in Fig. 2 increase above earth potential respectively and to RS232 domains power supply V at DM1, DM2, DM11, DM12 signal_DDPEdging trigger accelerating circuit NOSH1, NOSH2, POSH3 and POSH4, OSH1 and OSH2 accelerate the trailing edge of DM1 and DM2, OSH3 and OSH4 to accelerate the rising edge of DM1 and DM2 respectively.The operating frequency of RS232 transmitters can then be improved.

NOSH1's and NOSH2 realizes that circuit is as shown in Figure 3, IN terminals meet signal DM01 or DM02, FB terminals meet DM1 or DM2, during IN signal saltus steps, OUT output high level opens auxiliary tube MN31 or MN41, accelerates the trailing edge of DM1 or DM2, when turn threshold of the DM1 or DM2 signals fall less than Schmidt trigger SMITINV U4, OUT signal upset step-down closes MN31 or MN41, and accelerator terminates.

POSH3's and POSH4 realizes that circuit is as shown in Figure 4, IN short circuit DM1 or DM2 terminals, FB terminals connect DM11 or DM12 terminals, during IN signal saltus steps, OUT output low level signals open auxiliary tube MP51 or MP61, accelerate the rising edge of DM11 or DM12 signals, when turn threshold of the DM11 or DM12 signals ascensional range more than Schmidt trigger SMITINV U4, MP51 and MP61 is closed in OUT signal upset, and accelerator terminates.

DOUT signals can also adopt similar edge accelerating circuit, shorten rising edge and the trailing edge time of DOUT, improve the operating frequency of output driver.

Claims

1. 232 transmitter circuit of High-Speed RS with self adaptation edge accelerating circuit, is characterized in that in TTL/CMOS Logic input signal is to the output that input signal situation of change combination feedback are monitored during RS232 level conversion Signal condition accelerates the State Transferring of output signal, so that circuit can adapt to high speed TTL/CMOS letter Number to 232 signal of High-Speed RS change.

2. RS232 transmitter circuits with self adaptation edge accelerating circuit according to claim 1, which is special Levying one is：In common GND from logical end V_ccThe level of power supply is to RS232 ends V_DDPThe level of power supply turns When changing, output signal GND state transformations time over the ground is shortened using single pulse edge accelerating circuit.

3. RS232 transmitter circuits added with self adaptation along accelerating circuit according to claim 1, which is special Levying two is：In common RS232 domains positive supply V_DDPFrom logical end ground level GND to RS232 ends negative level V_DDNWhen being the level conversion of reference, output signal is shortened to RS232 using single pulse edge accelerating circuit Domain positive supply V_DDPThe state transformation time.

4. the control circuit of the self adaptation edge accelerating circuit being applied in claim 1, is characterized in that by main control Signal is triggered, and closes accelerating circuit by output state feedback, and main control signal can be single-ended signal, It can also be both-end differential signal.