CN106505073A - A kind of wafer scale glass top chip encapsulating structure - Google Patents
A kind of wafer scale glass top chip encapsulating structure Download PDFInfo
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- CN106505073A CN106505073A CN201610841571.7A CN201610841571A CN106505073A CN 106505073 A CN106505073 A CN 106505073A CN 201610841571 A CN201610841571 A CN 201610841571A CN 106505073 A CN106505073 A CN 106505073A
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- road
- input
- image sensor
- glass
- projection
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- 239000011521 glass Substances 0.000 title claims abstract description 49
- 229910052751 metal Inorganic materials 0.000 claims abstract description 38
- 239000002184 metal Substances 0.000 claims abstract description 38
- 239000006059 cover glass Substances 0.000 claims abstract description 32
- 238000000034 method Methods 0.000 claims abstract description 15
- 238000004544 sputter deposition Methods 0.000 claims description 13
- 239000004744 fabric Substances 0.000 claims description 12
- 238000007747 plating Methods 0.000 claims description 12
- 229910052782 aluminium Inorganic materials 0.000 claims description 11
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 10
- 230000004888 barrier function Effects 0.000 claims description 10
- 239000010949 copper Substances 0.000 claims description 10
- 238000005516 engineering process Methods 0.000 claims description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 9
- 229910052802 copper Inorganic materials 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 8
- 238000011900 installation process Methods 0.000 claims description 6
- 238000009713 electroplating Methods 0.000 claims description 5
- 229910000679 solder Inorganic materials 0.000 claims description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 4
- 239000010931 gold Substances 0.000 claims description 4
- 229910052737 gold Inorganic materials 0.000 claims description 4
- 238000001465 metallisation Methods 0.000 claims description 4
- 150000002739 metals Chemical class 0.000 claims description 4
- 238000002161 passivation Methods 0.000 claims description 4
- 238000003466 welding Methods 0.000 claims description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 3
- 230000006835 compression Effects 0.000 claims description 3
- 238000007906 compression Methods 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims description 3
- 239000003822 epoxy resin Substances 0.000 claims description 3
- 229920002521 macromolecule Polymers 0.000 claims description 3
- 229920000647 polyepoxide Polymers 0.000 claims description 3
- 239000010980 sapphire Substances 0.000 claims description 3
- 229910052594 sapphire Inorganic materials 0.000 claims description 3
- 239000000741 silica gel Substances 0.000 claims description 3
- 229910002027 silica gel Inorganic materials 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 3
- 229910052721 tungsten Inorganic materials 0.000 claims description 3
- 239000010937 tungsten Substances 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 239000004568 cement Substances 0.000 claims description 2
- 239000011248 coating agent Substances 0.000 claims description 2
- 238000000576 coating method Methods 0.000 claims description 2
- 230000005611 electricity Effects 0.000 claims 1
- 238000005538 encapsulation Methods 0.000 abstract description 8
- 239000007788 liquid Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 230000005496 eutectics Effects 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 238000012856 packing Methods 0.000 description 2
- 239000011435 rock Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000005304 optical glass Substances 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 230000002787 reinforcement Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
Abstract
The invention discloses a kind of wafer scale glass top chip encapsulating structure, reroutes road, the first input and output projection, seal, cover glass, the second rewiring road, conducting metal, triple wiring topologies and the second input and output projection including image sensor dice, first；Road is rerouted in the front arrangement first of CIS chip；Then arrangement meets the first input and output projection of Flip Chip Bond Technique requirement；Then triple wiring topologies being arranged in the upper surface of cover glass, road being rerouted in the lower surface arrangement second of cover glass, the second rewiring road of triple wiring topologies and lower surface of cover glass upper surface is attached conducting by turning on metal then；Seal is filled in the surrounding of image sensor dice and cover glass, plays protection and adds the function of shield.The present invention efficiently solves the problems, such as that the height of intelligent mobile terminal camera module encapsulation cannot be thinner, makes sensor chip encapsulate more lightening, higher performance and more inexpensive.
Description
Technical field
The present invention relates to a kind of technical field of semiconductor encapsulation, specifically a kind of wafer scale glass top chip encapsulating structure.
Background technology
Image sensor dice is widely used for various terminal equipment, such as smart mobile phone, panel computer etc..Most common should
Camera module encapsulation for image sensor dice generally includes chip size packages（CSP is encapsulated）, circuit chip on board
Encapsulation（COB is encapsulated）, chip face-down bonding（FCB）Deng these encapsulation are required for for wiring board being placed in image sensor dice
The back side, cause camera module encapsulation depend highly on chip thickness, circuit plate thickness and the weld layer thickness between them,
Therefore the height of camera module encapsulation cannot be thinner.The present invention provides a kind of wafer scale glass top chip packing forms, Chinese
Full name is encapsulated for wafer scale glass top chip（Referred to as：WLCOG, i.e. Wafer Level Chip On Glass）, it is that the whole world is pioneering
A kind of brand-new semiconductor packaging method, this packing forms not only collects that CSP, COB, FCB three is whole,
And the shortcoming more less than CSP, COB, FCB three, therefore WLCOG encapsulation will be a kind of following direction.
Content of the invention
It is an object of the invention to provide a kind of wafer scale glass top chip encapsulating structure, to solve in above-mentioned background technology
The problem of proposition.
For achieving the above object, the present invention provides following technical scheme：
A kind of wafer scale glass top chip encapsulating structure, reroutes road, the first input and output including image sensor dice, first
Projection, seal, cover glass, second reroute road, conducting metal, triple wiring topologies and the second input and output projection；Institute
State image sensor dice to weld with cover glass, the first input and output projection is defeated for the newly input of image sensor dice
The new input/output pads for going out the bottom surface of pad and cover glass is electrically connected with；Described first reroutes road by rerouting
Road technology arrangement is electrically connected with the first rewiring road in the front of image sensor dice, image sensor dice；Institute
The upper surface for stating cover glass is disposed with triple wiring topologies, has the second rewiring road, institute in the lower surface arrangement of cover glass
State the triple wiring topologies of the second rewiring Lu Yu and be electrically connected with by turning on metal；The first described input and output projection sets
Put on the first pad for rerouting on road, the first rewiring road is electrically connected with the first input and output projection；Described
One input and output projection is connected to the pad on the second rewiring road, the first input and output projection and the second weight by reverse installation process
Wiring topology is electrically connected with；The second described input and output projection is arranged on the pad of triple wiring topologies, triple cloth
Circuit is electrically connected with the second input and output projection；Described seal is filled in image sensor dice and cover glass
Surrounding.
As further scheme of the invention：Described image sensor dice be by Silicon Wafer cast out with shadow
Integrated circuit die as sensor.
As further scheme of the invention：Aluminum pad is additionally provided with the image sensor dice, the first weight cloth
Circuit arranges adhesion layer, BCB1 barrier layers and BCB2 barrier layers along the aluminum pad surrounding of image sensor dice, and welds from aluminium
The first weight cloth multiple layer metal line drawn by disk, arrangement sputtering ubm layer on the first weight cloth multiple layer metal line；And in sputtering
The first input and output projection is planted on ubm layer；Again by reverse installation process by the first input and output weld tabs to described
It is electrically connected on the metal wire on the second rewiring road of cover glass, and increases passivation in the second metal wire for rerouting road
Layer is protected.
As further scheme of the invention：Described first reroutes road, the second rewiring road and the 3rd and reroutes
Road is to increase some metals and dielectric layer on wafer material using rewiring road technique；Reroute road technique and adopt BCB/
Dielectric layers of the PI as redistribution, using copper as redistribution line metal, accumulates underbump metallization layer, silk printing using sputtering method
Brush method solder paste deposited simultaneously flows back.
As further scheme of the invention：The seal is a kind of firm and protection materials, and material is silica gel, glass
One kind in glass glue and epoxy resin.
As further scheme of the invention：The conducting metal is applied for plating copper post, plating tungsten and macromolecule conductor
One kind in cloth.
As further scheme of the invention：The second described input and output projection electrically connects dress for outside, even
Dress mode is using surface mounting technology or thermal compression welding technology.
As further scheme of the invention：The seal respectively with image sensor dice and described covering glass
Glass bonding.
As further scheme of the invention：The first described input and output projection is convex for rectangle gold projection, spherical tin
One kind in block and column copper bump.
As further scheme of the invention：The cover glass is simple glass, sapphire glass and coated glass
In one kind.
Compared with prior art, the invention has the beneficial effects as follows：
This wafer scale glass top chip encapsulating structure proposes a kind of wafer stage chip encapsulating structure, efficiently solves intelligent mobile
The height of terminal camera module packaging cannot be thinner problem, can realize that sensor chip encapsulates more lightening, higher property
Can and more inexpensive.
Description of the drawings
Profiles of the Fig. 1 for wafer scale glass top chip encapsulating structure.
Top views of the Fig. 2 for wafer scale glass top chip encapsulating structure.
Upward views of the Fig. 3 for wafer scale glass top chip encapsulating structure.
Fig. 4 is the connection figure of the first input and output projection in wafer scale glass top chip encapsulating structure.
In figure：11- image sensor dices, 12- cover glass, 13- first reroute road, and the first input and output of 14- are convex
Block, 15- seals, the rewirings of 16- second road, 17- conducting metals, the triple wiring topologies of 18-, 19- the second input and output projections,
111- aluminum pads, 131- adhesion layers, 132-BCB1 barrier layers, 133-BCB2 barrier layers, the weight cloth multiple layer metal lines of 134- first,
135- sputters ubm layer, 161- passivation layers, 162- metal wires.
Specific embodiment
Technical scheme is described in more detail with reference to specific embodiment.
Fig. 1-4 are referred to, a kind of wafer scale glass top chip encapsulating structure, including image sensor dice 11, the first weight
Wiring topology 13, the first input and output projection 14, seal 15, cover glass 12, second reroute road 16, conducting metal 17, the
Triple wiring topologies 18 and the second input and output projection 19；
Described image sensor dice 11 is the integrated circuit die with image sensor cast out by Silicon Wafer；So
Carry out rearranging circuit on the front of nude film by rerouting road technique afterwards, by increasing metal and dielectric layer, naked
The aluminum pad 111 in piece front is extracted by metal wire and carries out wrapping up in using dielectric and protects and formed new input/output pads；
The cover glass 12 is optical wafer glass, including but not limited to simple glass, sapphire glass, coated glass
Deng；Cover glass 12 is the optical glass sheet that glass wafer casts out, then wafer glass is carried out penetrating process formation hole
Hole, carries out metallization landfill step and obtains described conducting metal 17 to hole；Then by rerouting road technique in optics glass
Triple wiring topologies 18 of the second rewiring 16 sum of road that the bottom surface of glass piece and top surface are respectively obtained, so that obtain upper and lower sandwich circuit
Connection simultaneously forms new input/output pads in bottom surface and top surface respectively.
The image sensor dice 11 is welded with cover glass 12, and the first input and output projection 14 is image sensing
The new input/output pads of the bottom surface of the new input/output pads and cover glass 12 of device chip 11 is electrically connected with；
Described first reroutes road 13 by rerouting road technology arrangement in the front of image sensor dice 11, image sensor
Chip 11 is electrically connected with the first rewiring road 13；The upper surface of the cover glass 12 is disposed with triple wiring topologies
18, there is the second rewiring road 16 in the lower surface arrangement of cover glass 12, described second reroutes road 16 and triple wiring topologies
18 are electrically connected with by turning on metal 17；The first described input and output projection 14 is arranged on the first rewiring road 13
On pad, the first rewiring road 13 is electrically connected with the first input and output projection 14；The first input and output projection 14
Pad on second rewiring road 16 is connected to by reverse installation process, the first input and output projection 14 is entered with the second rewiring road 16
Row is electrically connected with；The second described input and output projection 19 is arranged on the pad of triple wiring topologies 18, triple wiring topologies
18 are electrically connected with the second input and output projection 19；Described seal 15 is filled in image sensor dice 11 and covers
The surrounding of glass 12, purpose play protection and reinforcement effect；
Aluminum pad 111 is additionally provided with the image sensor dice 11, and first reroutes road 13 along image sensor dice
11 111 surrounding of aluminum pad increases adhesion layer 131 and BCB1 barrier layers 132 and BCB2 barrier layers 133, and draws from aluminum pad 111
Go out the first weight cloth multiple layer metal line 134, and arrangement sputtering ubm layer 135 on the first weight cloth multiple layer metal line 134；And
The first input and output projection 14 is planted on sputtering ubm layer 135；Pass through reverse installation process again by the first input and output projection
It is electrically connected on the metal wire 162 on 14 the second rewiring roads 16 for being welded to described cover glass 12, and in the second weight
The metal wire 162 of wiring topology 16 increases passivation layer 161 and is protected.
It is using rewiring road work that the first described rewiring road 13, second reroutes road 16 and triple wiring topologies 18
Skill increases some metals and dielectric layer on wafer material；Road technique is rerouted using BCB/PI as the medium for redistributing
Layer, using copper (Cu) as redistribution line metal, accumulates underbump metallization layer using sputtering method, and mitography method solder paste deposited is simultaneously
Backflow；
The seal 15 is a kind of firm and protection materials, including but not limited to silica gel, glass cement, epoxy resin etc..Described
Seal 15 is bonding with image sensor dice 11 and described cover glass 12 respectively, it is therefore an objective to plays fixed, protection, prop up
The effects such as support, reliability.
The conducting metal 17 including but not limited to electroplates copper post, plating tungsten, macromolecule conductor coating etc..
Described the first input and output projection 14 including but not limited to rectangle gold projection, spherical tin projection, column copper bump
Deng.
The second described input and output projection 19 electrically connects dress for outside, and even dress mode includes but is not limited to surface patch
Dress technology, thermal compression welding technology etc..
The first input and output projection 14 carries out print fluxing on the described first rewiring road 13, then plants bulb
Soldered ball is placed by template perforate, then reflow soldering is carried out through reflow ovens obtain eutectic solder projection；First input is defeated
Go out projection 14 to be implanted on the new input/output pads in the image sensor dice 11.
Alternatively or further, the first described input and output projection 14 is formed on the first described rewiring road 13
Sputtering ubm layer 135, constitutes adhesion layer, barrier layer and soakage layer metal, forms the Seed Layer of plating；Then to sputtering
Ubm layer 135 carries out thick resist lithography and forms electroplating hole；Then rack plating method is adopted, by the plating piece of anode and negative electrode point
Jin Ru not be in electroplate liquid, position is relative to put and rocks plating piece, and then electroplate liquid is ejected in electroplating hole and obtains golden projection；Institute
The the first input and output projection 14 that states is implanted on the new input/output pads of described image sensor dice 11.
The second input and output projection 19 carries out print fluxing on triple wiring topologies 18, then plants bulb
Soldered ball is placed by template perforate, then reflow soldering is carried out through reflow ovens obtain eutectic solder projection；The second described input
Output projection 19 is implanted on the new input/output pads of cover glass 12.
Alternatively or further, the second described input and output projection carries out sputtering convex in described triple wiring topologies
Point lower metal layer 135, constitutes adhesion layer, barrier layer and soakage layer metal, forms the Seed Layer of plating；Then to sputtering under salient point
Metal level 135 carries out thick resist lithography and forms electroplating hole；Then using rack plating method, the plating piece of anode and negative electrode is immersed respectively
In electroplate liquid, position is relative to put and rocks plating piece, and then electroplate liquid is ejected in electroplating hole and obtains golden projection；Described
Two input and output projections are implanted on the new input/output pads of described cover glass.
Above the better embodiment of the present invention is explained in detail, but the present invention is not limited to above-mentioned embodiment party
Formula, in the ken that one skilled in the relevant art possesses, can be with the premise of without departing from present inventive concept
Various changes can be made.
Claims (10)
1. a kind of wafer scale glass top chip encapsulating structure, it is characterised in that including image sensor dice（11）, first weight cloth
Circuit（13）, the first input and output projection（14）, seal（15）, cover glass（12）, second reroute road（16）, conducting gold
Category（17）, triple wiring topologies（18）With the second input and output projection（19）；The image sensor dice（11）With covering glass
Glass（12）Welding, the first input and output projection（14）Image sensor dice（11）New input/output pads and covering
Glass（12）The new input/output pads of bottom surface be electrically connected with；Described first reroutes road（13）By rerouting road work
Skill is arranged in image sensor dice（11）Front, image sensor dice（11）Road is rerouted with first（13）Carry out electrically
Connection；The cover glass（12）Upper surface be disposed with triple wiring topologies（18）, in cover glass（12）Lower surface cloth
It is equipped with the second rewiring road（16）, described second reroutes road（16）With triple wiring topologies（18）By turning on metal（17）Electricity
Property connection；The first described input and output projection（14）It is arranged on the first rewiring road（13）On pad on, first reroute
Road（13）With the first input and output projection（14）It is electrically connected with；The first input and output projection（14）By reverse installation process
It is connected to the second rewiring road（16）On pad, the first input and output projection（14）Road is rerouted with second（16）Carry out electrically
Connection；The second described input and output projection（19）It is arranged on triple wiring topologies（18）Pad on, triple wiring topologies
（18）With the second input and output projection（19）It is electrically connected with；Described seal（15）It is filled in image sensor dice
（11）And cover glass（12）Surrounding.
2. wafer scale glass top chip encapsulating structure according to claim 1, it is characterised in that described image sensor
Chip（11）It is the integrated circuit die with image sensor cast out by Silicon Wafer.
3. wafer scale glass top chip encapsulating structure according to claim 1, it is characterised in that the image sensor core
Piece（11）On be additionally provided with aluminum pad（111）, first reroutes road（13）Along image sensor dice（11）Aluminum pad
（111）Surrounding arranges adhesion layer（131）, BCB1 barrier layers（132）With BCB2 barrier layers（133）, and from aluminum pad（111）Draw
First weight cloth multiple layer metal line（134）, in the first weight cloth multiple layer metal line（134）Upper arrangement sputtering ubm layer（135）；
And in sputtering ubm layer（135）The first input and output projection of upper plant（14）；Again will be defeated for the first input by reverse installation process
Go out projection（14）It is welded to described cover glass（12）Second rewiring road（16）Metal wire（162）Upper formation electrically connects
Connect, and road is rerouted second（16）Metal wire（162）Increase passivation layer（161）Protected.
4. wafer scale glass top chip encapsulating structure according to claim 1, it is characterised in that the first described rewiring
Road（13）, second reroute road（16）With triple wiring topologies（18）It is to be increased on wafer material using rewiring road technique
Some metals and dielectric layer；Road technique is rerouted using BCB/PI as the dielectric layer of redistribution, is connected as redistribution using copper
Line metal, accumulates underbump metallization layer using sputtering method, and mitography method solder paste deposited simultaneously flows back.
5. wafer scale glass top chip encapsulating structure according to claim 1, it is characterised in that the seal（15）It is
A kind of firm and protection materials, material are the one kind in silica gel, glass cement and epoxy resin.
6. wafer scale glass top chip encapsulating structure according to claim 1, it is characterised in that the conducting metal（17）
For electroplating the one kind in copper post, plating tungsten and macromolecule conductor coating.
7. wafer scale glass top chip encapsulating structure according to claim 1, it is characterised in that the second described input is defeated
Go out projection（19）Electrically connect dress for outside, even dress mode is using surface mounting technology or thermal compression welding technology.
8. wafer scale glass top chip encapsulating structure according to claim 1, it is characterised in that the seal（15）Point
Not and image sensor dice（11）With described cover glass（12）Bonding.
9. wafer scale glass top chip encapsulating structure according to claim 1, it is characterised in that the first described input is defeated
Go out projection（14）For the one kind in rectangle gold projection, spherical tin projection and column copper bump.
10. wafer scale glass top chip encapsulating structure according to claim 1, it is characterised in that the cover glass
（12）For the one kind in simple glass, sapphire glass and coated glass.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610841571.7A CN106505073A (en) | 2016-09-23 | 2016-09-23 | A kind of wafer scale glass top chip encapsulating structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610841571.7A CN106505073A (en) | 2016-09-23 | 2016-09-23 | A kind of wafer scale glass top chip encapsulating structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106505073A true CN106505073A (en) | 2017-03-15 |
Family
ID=58290292
Family Applications (1)
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| CN201610841571.7A Pending CN106505073A (en) | 2016-09-23 | 2016-09-23 | A kind of wafer scale glass top chip encapsulating structure |
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| CN103579259A (en) * | 2012-07-18 | 2014-02-12 | 宏翔光电股份有限公司 | Wafer-level image module structure |
| CN104538380A (en) * | 2014-12-10 | 2015-04-22 | 华进半导体封装先导技术研发中心有限公司 | Small-spacing PoP monomer |
| CN104576424A (en) * | 2014-12-10 | 2015-04-29 | 华进半导体封装先导技术研发中心有限公司 | Method for realizing fan-out wafer encapsulation by preparing bumps on chip in advance |
| CN105895605A (en) * | 2016-06-12 | 2016-08-24 | 华天科技（昆山）电子有限公司 | Thin chip mounted substrate fan-out type packaging structure and manufacturing method therefor |
| CN105858588A (en) * | 2016-06-23 | 2016-08-17 | 中国科学院半导体研究所 | Packaging structure and application thereof |
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