CN106468757B - The test method and semiconductor module of semiconductor module - Google Patents
The test method and semiconductor module of semiconductor module Download PDFInfo
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- CN106468757B CN106468757B CN201510518300.3A CN201510518300A CN106468757B CN 106468757 B CN106468757 B CN 106468757B CN 201510518300 A CN201510518300 A CN 201510518300A CN 106468757 B CN106468757 B CN 106468757B
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Abstract
The test method and semiconductor module of present invention offer semiconductor module, the test method can determine that the malfunction tolerance degree of the semiconductor module based on noise, the semiconductor module can be more reliably prevented from malfunction caused by noise by simple method.It is characterized in that, comprising: step 1 is rapid, and the tie point between the tie point between the 1st high-side switch and the 1st low side switch that constitute the 1st half-bridge and the 2nd high-side switch and the 2nd low side switch that constitute the 2nd half-bridge is connected to test section；Second step makes the 1st high-side switch become on state after the step 1 is rapid；Third step makes the 1st high-side switch become off state after the second step；And step 4 is rapid, after the third step, according to the signal exported from the test section, detecting semiconductor module has error-free motion.
Description
Technical field
The present invention relates to half-bridge (half bridge) and for driving the semiconductor integrated circuit of half-bridge to carry out resin
The test method and semiconductor module for the semiconductor module being sealed to form, in particular to using motor as the inductive load of representative
The test method and semiconductor module of the semiconductor module driven.
Background technique
Patent document 1 is disclosed the half-bridge including power switch and the integrated electricity of semiconductor for being used to drive half-bridge
Semiconductor module of the path built-in in 1 resin package covers and the inverter circuit for having used the semiconductor module.According to special
Sharp document 1, so that the connection distance of the metal fine for connecting power switch and semiconductor integrated circuit becomes minimum limit
Distance and can be prevented because in power switch thereby, it is possible to realize the minimum of inductance l values and inhibit to generate noise
Generated noise when carrying out the charge and discharge of charge on grid and the case where cause power switch to be malfunctioned.
Patent document 1: Japanese Unexamined Patent Publication 2002-057282 bulletin
Summary of the invention
But semiconductor module caused by noise is prevented merely with the countermeasure of patent document 1 with being unable to fully
Malfunction.For example, due to by semiconductor technology precision and particle (particle) influenced, the spy of semiconductor integrated circuit
Property there is error to a certain degree.Therefore, expect fully implement noise countermeasure to semiconductor module and can determine be
The no test method that can cause malfunction caused by noise.Meanwhile expecting to be not easy malfunction caused by causing noise
Semiconductor module.The present invention provides the malfunction tolerance that can determine the semiconductor module based on noise by simple method
The test method of degree and the semiconductor module that malfunction caused by noise can be more reliably prevented from.
According to one method of the present invention, the test method of semiconductor module tests semiconductor module, and described half
Conductor module is the semiconductor collection at least to the 1st half-bridge and the 2nd half-bridge and for driving the 1st half-bridge and the 2nd half-bridge
It is carried out made of resin seal at circuit, which is characterized in that it is rapid that the test method of the semiconductor module includes step 1, will constitute
2nd high side of tie point and composition the 2nd half-bridge between the 1st high-side switch and the 1st low side switch of the 1st half-bridge
Tie point between switch and the 2nd low side switch is connected to test section；Second step makes the described 1st after the step 1 is rapid
High-side switch becomes on state；Third step makes the 1st high-side switch become off state after the second step；
And step 4 is rapid, after the third step, according to the signal exported from the test section, detecting the semiconductor module has
Error-free motion.
According to the present invention, it is possible to provide can determine the malfunction of the semiconductor module based on noise by simple method
The test method of tolerance degree and the semiconductor module that malfunction caused by noise can be more reliably prevented from.
Detailed description of the invention
Fig. 1 is the circuit diagram for showing the motor driver of the semiconductor module including embodiments of the present invention.
Fig. 2 is the structure chart for showing the semiconductor module of embodiments of the present invention.
Fig. 3 is the structure chart for showing the test device of semiconductor module of embodiments of the present invention.
Fig. 4 is the figure for showing the test method of semiconductor module of embodiments of the present invention.
Fig. 5 is the figure for showing the test method of semiconductor module of embodiments of the present invention.
Label declaration
1: semiconductor module；2: motor inverter；3: semiconductor integrated circuit；4: control device；5: test device；10:
Sealing resin；21: the 1 half-bridges；22: the 2 half-bridges；23: the 3 half-bridges；31: output section；32: logic section；35: level shift electricity
Road；Q1: the 1 high-side switch；Q2: the 1 low side switch；Q3: the 2 high-side switch；Q4: the 2 low side switch；Q5: the 3 high side is opened
It closes；Q6: the 3 low side switch；R1: the 1 resistance；R2: the 2 resistance；FET1: the 1 switch；FET2: the 2 switch.
Specific embodiment
Then, embodiments of the present invention are explained with reference to.In the record of attached drawing below, to same or like
Part mark same or similar label.But, it shall be noted that attached drawing is schematically to scheme.In addition, implementation as shown below
Mode instantiates the device and method for embodying technical idea of the invention, and embodiments of the present invention can't make structure
At the structure of component, configuration etc. specific to following contents.Embodiments of the present invention can be applied within the scope of the claims
Add various changes.
Fig. 1 is the circuit diagram for showing the motor driver of the semiconductor module including embodiments of the present invention.This reality
The semiconductor module 1 for applying mode, using sealing resin 10 at least to the 1st half-bridge and the 2nd half-bridge 21,22 and for driving the 1st half
The semiconductor integrated circuit 3 of bridge and the 2nd half-bridge 21,22 carries out resin seal and forms.Semiconductor module 1 is in the outer of sealing resin 10
Edge has multiple external terminals for connecting with external structure.For example, the DC power supply V1 of HV Terminal VBB and 600V or so
Plus end connection, the negative terminal of the 1st ground terminal GND1 and DC power supply V1 is connected to the fixed current potential such as earthing potential together,
1st output terminal to the 3rd output terminal U, V, W and three-phase brushless dc motor M connection.In addition, for example, the 1st high-voltage signal end
Son is to the 3rd high-voltage signal terminal HIN1~HIN3 and the 1st low-voltage signal terminal to the 3rd low-voltage signal terminal LIN1~LIN3 and controls
Device 4 processed connects.In addition, in addition to this there are also terminals (not shown) for semiconductor module 1, but omit these terminal explanations.
1st half-bridge to the 3rd half-bridge 21~23 constitute provided to three-phase brushless dc motor M export from DC power supply V1 it is straight
The three-phase motor inverter 2 of galvanic electricity.1st half-bridge to the 3rd half-bridge 21~23 is respectively provided with the 1st high-side switch to the 3rd high-side switch
Q1, Q3, Q5 and the 1st low side switch to the 3rd low side switch Q2, Q4, Q6.Between 1st high-side switch Q1 and the 1st low side switch Q2
Tie point be connected to the 1st output terminal U.Tie point between 2nd high-side switch Q3 and the 2nd low side switch Q4 is connected to the 2nd
Output terminal V.Tie point between 3rd high-side switch Q5 and the 3rd low side switch Q6 is connected to the 3rd output terminal W.This embodiment party
The high-side switch and low side switch of formula such as are made of MOSFET, but can also be replaced as IGBT at the switching semiconductors element.1st high side
It switchs to the drain terminal of the 3rd high-side switch Q1, Q3, Q5 and is connect via HV Terminal VBB with the plus end of DC power supply V1.The
1 high-side switch is to the source terminal of the 3rd high-side switch Q1, Q3, Q5 and the 1st low side switch to the 3rd low side switch Q2, Q4, Q6's
Drain terminal connection, and respectively via the 1st output terminal to the 3rd output terminal U, V, W and three-phase brushless dc motor M connection.
The source terminal of 1st low side switch to the 3rd low side switch Q2, Q4, Q6 is via the negative of the 1st ground terminal GND1 and DC power supply V1
Terminal connection.The gate terminal respectively switched via each high-voltage signal terminal HIN1~HIN3 and each low-voltage signal terminal LIN1~
LIN3 is connect with semiconductor integrated circuit 3.
Semiconductor integrated circuit 3 is according to the driving instruction signal pair generated of control device 4 being made of microprocessor
The inverter driving apparatus that three-phase motor inverter 2 is driven.Semiconductor integrated circuit 3 is connected to the 1st high-side switch to the 3rd
The respective gate terminal of high-side switch Q1, Q3, Q5 and the 1st low side switch to the 3rd respective gate terminal of low side switch Q2, Q4, Q6
Son, and via the 1st high-voltage signal terminal to the 3rd high-voltage signal terminal HIN1~HIN3 and the 1st low-voltage signal terminal to the 3rd low
Pressure signal terminal LIN1~LIN3 is connect with control device 4.
Fig. 2 is the structure chart for showing a part of semiconductor module of embodiments of the present invention.Because for three-phase
The structure of each phase in the semiconductor integrated circuit 3 of motor inverter 2 respectively mutually driven is equivalent to each other, so only right herein
Structure mutually relevant to the 1st is illustrated, and the repetitive description thereof will be omitted.The semiconductor integrated circuit 3 of present embodiment have with
1st high-side switch Q1 gate terminal connection high-pressure side output section 31, connect with high-pressure side output section 31 logic section 32, with
And the level shift circuit 35 being connect with logic section 32.In addition, semiconductor integrated circuit 3 has and logic section 32 and level shift
Filter 33 that circuit 35 connects, 34, the pulse generating unit 36 that is connect with level shift circuit 35, connect with pulse generating unit 36
Input unit 37, the voltage-stablizer 38 that is connect with pulse generating unit 36 and input unit 37 and the gate terminal with the 1st low side switch Q2
The low-pressure side output section 39 of son connection.
In addition, there is semiconductor integrated circuit 3 bootstrapping (bootstrap) terminal VB, driving power terminal VCC and the 2nd to connect
Ground terminal GND2.It is connected with boottrap capacitor Cb between bootstrapping terminal VB and the 1st output terminal U, in bootstrapping terminal VB and is driven
It is connected with bootstrap diode Db between dynamic power supply terminal VCC, is connected between driving power terminal VCC and the 2nd ground terminal GND2
It is connected to driving power V2.
Driving power V2 charges to boottrap capacitor Cb via bootstrap diode Db.Therefore, output section 31, logic section
32 and filter 33,34 using between the bootstrapping terminal VB and the 1st output terminal U the potential difference that generates work.
Level shift circuit 35 includes the 1st level shift circuit, is opened by the 1st resistance R1 being serially connected and the 1st
FET1 is closed to constitute；And the 2nd level shift circuit, it is made of the 2nd resistance R2 being serially connected and the 2nd switch FET2.
The output of 1st level shift circuit makes the 1st high-side switch Q1 become the signal of on state, and the 2nd level shift circuit, which exports, makes the 1st
High-side switch Q1 becomes the signal of off state.One end of 1st resistance R1 and one end of the 2nd resistance R2 are connected to the 1st bootstrapping end
Sub- VB1.The other end of 1st resistance R1 and the other end of the 2nd resistance R2 are opened with the drain terminal of the 1st switch FET1 and the 2nd respectively
Close the drain terminal connection of FET2.In addition, set terminal of the other end of the 1st resistance R1 via filter section 33 and logic section 32
S connection.The other end of 2nd resistance R2 is connect via filter section 34 with the reseting terminal R of logic section 32.1st switch FET1's
The source terminal of source terminal and the 2nd switch FET2 are connected to the 2nd ground terminal GND2.The gate terminal of 1st switch FET1 and
The gate terminal of 2nd switch FET2 is connected to pulse generating unit 36.
The movement of semiconductor module 1 is illustrated.Pulse generating unit 36 connects according to via the 1st high-voltage signal terminal HIN1
The driving instruction signal of receipts generates the pulse signal for making the 1st high-side switch Q1 turn-on deadline, exports to level shift circuit 35.
Specifically, when pulse generating unit 36 makes the 1st high-side switch Q1 become on state, to the 1st switch FET1 output high level
Signal exports low level signal to the 2nd switch FET2, when pulse generating unit 36 makes the 1st high-side switch Q1 become off state,
Low level signal is exported to the 1st switch FET1, the signal of high level is exported to the 2nd switch FET2.When the 1st switch and the 2nd are opened
When closing FET1, FET2 return pulse signal and moving on state from off state, the 1st switch and the 2nd switch FET1, FET2
Drain potential be changing into low level from high level.According to the variation of the drain potential, logic section 32 makes from output terminal Q output
1st high-side switch Q1 becomes the high level of on state or makes low level high pressure of the 1st high-side switch Q1 as off state
Pulse signal.Output section 31 exports after amplifying to the high-voltage pulse signal exported from logic section 32 to the 1st high-side switch Q1
Gate terminal.
The mechanism for the malfunction that the 1st high-side switch Q1 occurs is illustrated.Known FET in a general case has each
Kind parasitic capacitance is deposited between the 1st switch of present embodiment and the drain terminal and source terminal of the 2nd switch FET1, FET2
In the parasitic capacitance being represented by dashed line.When the 1st output terminal due to turn-on deadline movement respectively switched for constituting motor inverter 2
To the 3rd output terminal U, V, W potential change when, bootstrapping terminal VB current potential influenced and varied widely by this.The electricity
Noise current caused by position changes flows through the 1st resistance and the 2nd resistance R1, R2 and the 1st switch and the 2nd switch FET1, FET2 is posted
Raw capacitor, and the drain potential and driving instruction of the 1st switch and the 2nd switch FET1, FET2 independently change.In drain electrode electricity
In the case where the changing greatly of position, which is transferred to logic section 32 and causes the malfunction of the 1st high-side switch Q1.In this way,
In the case where inhibiting the variation of drain potential with being unable to fully because of the error of the manufacture view of level shift circuit 35, sometimes
Generate the malfunction of the 1st high-side switch Q1 as caused by noise current.
The check device and inspection method of semiconductor module are illustrated, the check device and inspection of the semiconductor module
Method inspection is directed to the safety of noise as described above.Fig. 3 is the survey for showing the semiconductor module of embodiments of the present invention
The structure chart that trial assembly is set.Because each other to the structure of the 1st high-side switch to the 3rd high-side switch Q1, Q3, Q5 each phase tested
It is equivalent, so only illustrating the structure of the malfunction test of the 2nd high-side switch Q2 herein, and the repetitive description thereof will be omitted.This embodiment party
The test device 5 of formula includes multiple connection terminals for connecting with semiconductor module 1, DC power supply V3, source driving signal
Vp and test section DET.DC power supply V3 is configured to output and DC power supply V1 same DC voltage.Direct current
The plus end of source V3 is connect with HV Terminal VBB, and the negative terminal of DC power supply V3 connect and connects with ground terminal GND1, GND2
Ground.Source driving signal Vp is configured to generate the same pulse signal of the driving instruction signal generated with control device 4, and
It is connect with the gate terminal of the 1st i.e. the 1st high-side switch Q1 of high-voltage signal terminal HIN1.Test section DET is included divider resistance
The I/V converter section that R3, R4 are connected in series and the voltage that the voltage of the tie point of divider resistance R3, R4 is detected
Test section Vdet.Test section DET is connected to the 1st output terminal between the 3rd output terminal U, V, W and ground, and to from direct current
The electric current that source V3 is flowed via HV Terminal VBB and the 1st output terminal to the 3rd output terminal U, V, W is detected.2nd is high
Press signal terminal and the 3rd high-voltage signal terminal HIN2, HIN3 i.e. gate terminal of the 2nd high-side switch and the 3rd high-side switch Q3, Q5
Son, the 1st low-voltage signal terminal to the 3rd low-voltage signal terminal LIN1~LIN3 and ground terminal GND1, GND2 ground connection.
Fig. 4 is the flow chart for showing the test method of semiconductor module of embodiments of the present invention.In addition, Fig. 5 is to show
The structure chart of semiconductor module in the rapid S4 of the step 4 of Fig. 4 out.Because for what is driven to three-phase brushless dc motor M
The structure of each phase in semiconductor module 1 is equivalent to each other, so herein only to the structure for malfunctioning tolerance degree for determining the 2nd phase
It is illustrated, and the repetitive description thereof will be omitted.In the rapid S1 of step 1, semiconductor module 1 is connect with test device 5, source driving signal
Vp exports low level signal to the gate terminal of the 1st high-side switch Q1.According to this structure, make the 1st high-side switch to the 3rd high side
Switch Q1, Q3, Q5 and the 1st low side switch to the 3rd low side switch Q2, Q4, Q6 become off state.In second step S2, driving
Signal source Vp exports the signal of high level, and the 1st high-side switch Q1 is made to be switched on state from off state.1st output end
The current potential of son and the 2nd output terminal U, V are equal with the current potential of HV Terminal VBB, and as shown in (a) of Fig. 5, electric current is from DC power supply
V3 is flowed via HV Terminal VBB, the 1st high-side switch Q1 and test section DET.In third step S3, source driving signal Vp is defeated
Low level signal out, and the 1st high-side switch Q1 is made to be switched to off state from state.At this point, the 1st output terminal and
The current potential of 2 output terminal U, V sharply declines, and noise current caused by the influence flows through semiconductor integrated circuit 3.The 4th
In step S4, according to the electric current flowed through in test section DET, determine whether semiconductor module 1 is malfunctioned.In general,
The electric current flowed through in second step S2 is cut off in third step S3, therefore, in the case where electric current does not flow through test section DET
Test section DET exports low level signal.But when the 2nd high-side switch Q3 in second step and third step S2, S3 due to generating
Noise and when being mistakenly connected, electric current flows through the signal of test section DET and test section DET output high level, is judged to partly leading
Module is malfunctioned.
In other words, it is partly led to be constituted in such a way that above-mentioned test method makes each high-side switch not will do it malfunction
Body integrated circuit 3, and may make up the semiconductor module of malfunction caused by capable of being more reliably prevented from noise.Specifically,
It by meeting at least one party in following situations, and is able to suppress the generation of malfunction: making to constitute the 1st of level shift circuit 35
The case where resistance value of resistance and the 2nd resistance R1, R2 fully improve；Make the 1st switch and the parasitism of the 2nd switch FET1, FET2
The case where capacitor fully reduces.Required resistance value and capability value are not fixed and invariable, can be with semiconductor module
The structure of block or motor driver and change.
The test method of semiconductor module according to the present embodiment, test device 5 from source driving signal Vp by exporting
Pulse signal and so that the 1st high-side switch Q1 is carried out turn-on deadline movement, and become the current potential of the output terminal of each half-bridge sharp
It is dynamic.That is, can be generated in semiconductor module 1 identical with situation about being applied to semiconductor module 1 in motor driver
Noise.In addition, test device 5 flows through the electric current of the output terminal of fifty-fifty bridge using test section DET detection, and according to from test section
The signal of DET output determines that semiconductor module 1 has error-free motion.The present invention can provide can determine by simple method
The test method of the malfunction tolerance degree of semiconductor module based on noise, and be capable of providing by using test method and
The semiconductor module of malfunction caused by noise can be more reliably prevented from.
It is as described above, the present invention is described by embodiment, it is to be understood that constituting the opinion of a part of this disclosure
It states and does not limit the present invention with attached drawing.To those skilled in the art, various alternate embodiments, reality according to the disclosure
It applies example and application technology is obvious.That is, the present invention includes the various embodiments etc. that do not record herein certainly.Therefore,
Technical scope of the invention is only dependent upon based on the specific thing of invention involved in above explained the scope of the claims appropriate
?.For example, the malfunction tolerance degree in order to more reliably determine semiconductor module as shown in phantom in Figure 4 both can be multiple
It repeats second step and third step S2, S3 executes the rapid S4 of step 4 later, can also be repeated several times and execute second step to the 4th
Step S2~S4.In addition, the present invention can also apply to include monophase machine inverter semiconductor module.
Claims (9)
1. a kind of test method of semiconductor module, tests semiconductor module, the semiconductor module is at least to the 1st
Half-bridge and the 2nd half-bridge and for drive the 1st half-bridge and the 2nd half-bridge semiconductor integrated circuit carry out resin seal
Made of, which is characterized in that the test method of the semiconductor module includes
Step 1 is rapid, by the tie point between the 1st high-side switch and the 1st low side switch that constitute the 1st half-bridge and constitutes institute
The tie point stated between the 2nd high-side switch and the 2nd low side switch of the 2nd half-bridge is connected to test section；
Second step makes the 1st high-side switch become on state after the step 1 is rapid；
Third step makes the 1st high-side switch become off state after the second step；And
Step 4 is rapid, and after the third step, according to the signal exported from the test section, detecting the semiconductor module has
Error-free motion.
2. the test method of semiconductor module according to claim 1, which is characterized in that
In the step 1 is rapid, make the 1st high-side switch and the 2nd high-side switch and the 1st low side switch and institute
The 2nd low side switch is stated as off state.
3. the test method of semiconductor module according to claim 2, which is characterized in that
In the step 1 is rapid, the grid of the 1st high-side switch is connect with source driving signal, by the 2nd high-side switch
Grid and the grid of the 1st low side switch and the 2nd low side switch be connected to fixed current potential.
4. the test method of semiconductor module according to claim 3, which is characterized in that
The fixed current potential is earthing potential.
5. the test method of semiconductor module according to claim 1, which is characterized in that
In the step 1 is rapid,
The plus end of one end and DC power supply of the 1st half-bridge and the 2nd half-bridge connects,
The other end of 1st half-bridge and the 2nd half-bridge is connect with the negative terminal of the DC power supply.
6. the test method of semiconductor module according to claim 1, which is characterized in that
In the step 4 is rapid, if the test section detects electric current, it is determined as that the semiconductor module has carried out malfunction
Make.
7. the test method of semiconductor module according to claim 1, which is characterized in that
Repeat the second step and the third step.
8. the test method of semiconductor module according to claim 1, which is characterized in that
It is rapid to the step 4 to repeat the second step.
9. a kind of semiconductor module is at least to the 1st half-bridge and the 2nd half-bridge and for driving the 1st half-bridge and described
The semiconductor integrated circuit of 2 half-bridges carries out made of resin seal, which is characterized in that
1st half-bridge has the 1st high-side switch,
The semiconductor integrated circuit includes high-pressure side output section, connect with the gate terminal of the 1st high-side switch；It patrols
The portion of collecting, connect with the high-pressure side output section；And level shift circuit, it is connect with the logic section,
The level shift circuit includes the 1st level shift circuit, by the 1st resistance being serially connected and the 1st switch structure
At；And the 2nd level shift circuit, it is made of the 2nd resistance being serially connected and the 2nd switch,
The described 1st is set in such a way that the test method described in any one of claim 1 to 8 not will do it malfunction
The parasitic capacitance of the resistance value or the 1st switch and the 2nd switch of resistance and the 2nd resistance.
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| US11735599B2 (en) * | 2018-03-12 | 2023-08-22 | Rohm Co., Ltd. | Semiconductor device and semiconductor device identification method |
| CN112684318A (en) * | 2020-12-17 | 2021-04-20 | 聚辰半导体股份有限公司 | Bootstrap type half-bridge driver common-mode voltage change rate tolerance testing device and method |
| CN112986779B (en) * | 2021-02-08 | 2022-08-23 | 厦门市三安集成电路有限公司 | Reliability testing device and method for gallium nitride device |
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|---|---|---|---|---|
| CN1542960A (en) * | 2003-04-30 | 2004-11-03 | ���µ�����ҵ��ʽ���� | Semiconductor device and design method thereof |
| CN1630172A (en) * | 2003-12-15 | 2005-06-22 | 三菱电机株式会社 | Semiconductor device |
| CN101814854A (en) * | 2009-02-23 | 2010-08-25 | 三菱电机株式会社 | Semiconductor switching device |
| CN102882467A (en) * | 2011-07-11 | 2013-01-16 | 麦格纳电动汽车系统公司 | Converter for an electrical machine, controller and method for operating a converter |
| CN104348346A (en) * | 2013-08-05 | 2015-02-11 | 三菱电机株式会社 | Semiconductor driving device and semiconductor device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3812878B2 (en) * | 2000-08-11 | 2006-08-23 | 松下電器産業株式会社 | Semiconductor device and inverter circuit using the same |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1542960A (en) * | 2003-04-30 | 2004-11-03 | ���µ�����ҵ��ʽ���� | Semiconductor device and design method thereof |
| CN1630172A (en) * | 2003-12-15 | 2005-06-22 | 三菱电机株式会社 | Semiconductor device |
| CN101814854A (en) * | 2009-02-23 | 2010-08-25 | 三菱电机株式会社 | Semiconductor switching device |
| CN102882467A (en) * | 2011-07-11 | 2013-01-16 | 麦格纳电动汽车系统公司 | Converter for an electrical machine, controller and method for operating a converter |
| CN104348346A (en) * | 2013-08-05 | 2015-02-11 | 三菱电机株式会社 | Semiconductor driving device and semiconductor device |
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