CN106468757A - The method of testing of semiconductor module and semiconductor module - Google Patents
The method of testing of semiconductor module and semiconductor module Download PDFInfo
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- CN106468757A CN106468757A CN201510518300.3A CN201510518300A CN106468757A CN 106468757 A CN106468757 A CN 106468757A CN 201510518300 A CN201510518300 A CN 201510518300A CN 106468757 A CN106468757 A CN 106468757A
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Abstract
The present invention provides method of testing and the semiconductor module of semiconductor module, this method of testing can judge the misoperation tolerance degree of the semiconductor module based on noise by simple method, and this semiconductor module can be more reliably prevented from the misoperation caused by noise.It is characterised by having：1st step, the junction point between the 2nd high-side switch of the junction point between the 1st high-side switch of composition the 1st half-bridge and the 1st low side switch and composition the 2nd half-bridge and the 2nd low side switch is connected to test section；Second step, after described 1st step, makes described 1st high-side switch become conducting state；Third step, after described second step, makes described 1st high-side switch become cut-off state；And the 4th step, after described third step, according to the signal exporting from described test section, detect that semiconductor module has error-free motion.
Description
Technical field
The present invention relates to the semiconductor integrated circuit to half-bridge (half bridge) with for driving half-bridge to carry out resin close
The method of testing of semiconductor module of envelope and semiconductor module, bear particularly to the inductance with motor as representative
It is loaded into method of testing and the semiconductor module of the semiconductor module of row cutting.
Background technology
The integrated electricity of quasiconductor that patent document 1 discloses that the half-bridge including on and off switch and be used for driving half-bridge
Semiconductor module in 1 resin package covers for the path built-in and the inverter circuit employing this semiconductor module.Root
According to patent documentation 1 so that the connection distance for the metal fine that connects on and off switch and semiconductor integrated circuit becomes
Minimal distance, thereby, it is possible to realizing the minimum of inductance l values and suppressing to produce noise, and is prevented from
Because carry out on the grid of on and off switch electric charge discharge and recharge when produced noise and cause on and off switch to carry out malfunction
Situation about making.
Patent documentation 1：Japanese Unexamined Patent Publication 2002-057282 publication
Content of the invention
But, the countermeasure merely with patent documentation 1 cannot fully prevent the semiconductor module caused by noise
Misoperation.For example, due to being affected by the precision of semiconductor technology and particle (particle), the integrated electricity of quasiconductor
The characteristic on road has error to a certain degree.Therefore, expect semiconductor module fully implemented noise countermeasure and
Can determine that the method for testing that whether can cause the misoperation caused by noise.Meanwhile, expect to be not easy to cause noise institute
The semiconductor module of the misoperation causing.The present invention provides and can judge partly leading based on noise by simple method
The method of testing of misoperation tolerance degree of module and the misoperation caused by noise can be more reliably prevented from half
Conductor module.
According to a mode of the present invention, the method for testing of semiconductor module is tested to semiconductor module, and described half
Conductor module is at least to the 1st half-bridge and the 2nd half-bridge and to be used for driving described 1st half-bridge and described 2nd half-bridge
Semiconductor integrated circuit carry out resin seal it is characterised in that the method for testing of this semiconductor module has：
1st step, will constitute junction point and structure between the 1st high-side switch of described 1st half-bridge and the 1st low side switch
The junction point between the 2nd high-side switch of described 2nd half-bridge and the 2nd low side switch is become to be connected to test section；2nd
Step, after described 1st step, makes described 1st high-side switch become conducting state；Third step, described
After second step, described 1st high-side switch is made to become cut-off state；And the 4th step, in described third step
Afterwards, according to the signal exporting from described test section, detect that described semiconductor module has error-free motion.
According to the present invention, it is possible to provide the misoperation of the semiconductor module based on noise can be judged by simple method
The method of testing of tolerance degree and the semiconductor module that the misoperation caused by noise can be more reliably prevented from.
Brief description
Fig. 1 is the circuit diagram of the motor driver illustrating the semiconductor module including embodiments of the present invention.
Fig. 2 is the structure chart of the semiconductor module illustrating embodiments of the present invention.
Fig. 3 is the structure chart of the test device of the semiconductor module illustrating embodiments of the present invention.
Fig. 4 is the figure of the method for testing of the semiconductor module illustrating embodiments of the present invention.
Fig. 5 is the figure of the method for testing of the semiconductor module illustrating embodiments of the present invention.
Label declaration
1：Semiconductor module；2：Motor inverter；3：Semiconductor integrated circuit；4：Control device；5：Test
Device；10：Sealing resin；21：1st half-bridge；22：2nd half-bridge；23：3rd half-bridge；31：Output section；
32：Logic section；35：Level shift circuit；Q1：1st high-side switch；Q2：1st low side switch；Q3：The
2 high-side switch；Q4：2nd low side switch；Q5：3rd high-side switch；Q6：3rd low side switch；R1：The
1 resistance；R2：2nd resistance；FET1：1st switch；FET2：2nd switch.
Specific embodiment
Then, it is explained with reference to embodiments of the present invention.In the record of following accompanying drawing, to identical or class
As partly mark same or similar label.But it shall be noted that accompanying drawing is schematic figure.In addition, following institute
The embodiment showing has illustrated the apparatus and method for making the technological thought of the present invention embody, the embodiment party of the present invention
Formula can't make the structure of component parts, configuration etc. specific to following contents.Embodiments of the present invention can be in power
Profit applies various changes in the range of requiring.
Fig. 1 is the circuit diagram of the motor driver illustrating the semiconductor module including embodiments of the present invention.This reality
Apply the semiconductor module 1 of mode, at least to the 1st half-bridge and the 2nd half-bridge 21,22 and used using sealing resin 10
Carry out resin seal in the semiconductor integrated circuit 3 driving the 1st half-bridge and the 2nd half-bridge 21,22 to form.Quasiconductor
Module 1 has multiple outside terminals for being connected with external structure in the outer rim of sealing resin 10.For example, high pressure
Terminal VBB with 600V about the plus end of DC source V1 be connected, the 1st ground terminal GND1 and direct current
The negative terminal of power supply V1 is connected to the fixed potentials such as earthing potential together, the 1st lead-out terminal to the 3rd lead-out terminal U,
V, W are connected with three-phase brushless dc motor M.In addition, for example, the 1st high-voltage signal terminal is believed to the 3rd high pressure
Number terminal HIN1～HIN3 and the 1st low-voltage signal terminal to the 3rd low-voltage signal terminal LIN1～LIN3 with control dress
Put 4 connections.Additionally, in addition semiconductor module 1 also has terminal (not shown), but omit these terminal explanations.
1st half-bridge to the 3rd half-bridge 21～23 constitutes defeated from DC source V1 to three-phase brushless dc motor M offer
The galvanic three phase electric machine inverter 2 going out.1st half-bridge is respectively provided with the 1st high side to the 3rd half-bridge 21～23 and opens
Close to the 3rd high-side switch Q1, Q3, Q5 and the 1st low side switch to the 3rd low side switch Q2, Q4, Q6.The
Junction point between 1 high-side switch Q1 and the 1st low side switch Q2 is connected to the 1st lead-out terminal U.2nd high side
Junction point between switch Q3 and the 2nd low side switch Q4 is connected to the 2nd lead-out terminal V.3rd high-side switch Q5
Junction point and the 3rd low side switch Q6 between is connected to the 3rd lead-out terminal W.The high-side switch of present embodiment and
Low side switch is made up of MOSFET but it is also possible to be replaced as the switching semiconductor element such as IGBT.1st high side is opened
Close to the 3rd high-side switch Q1, Q3, Q5 drain terminal via HV Terminal VBB and DC source V1 just
Terminal connects.The source terminal of the 1st high-side switch to the 3rd high-side switch Q1, Q3, Q5 and the 1st low side switch
Drain terminal to the 3rd low side switch Q2, Q4, Q6 connects, and defeated to the 3rd via the 1st lead-out terminal respectively
Go out terminal U, V, W to be connected with three-phase brushless dc motor M.1st low side switch to the 3rd low side switch Q2,
The source terminal of Q4, Q6 is connected with the negative terminal of DC source V1 via the 1st ground terminal GND1.Each switch
Gate terminal via each high-voltage signal terminal HIN1～HIN3 and each low-voltage signal terminal LIN1～LIN3 with partly lead
Body integrated circuit 3 connects.
Semiconductor integrated circuit 3 is the driving instruction signal pair being generated according to the control device 4 being made up of microprocessor
The inverter driving apparatus that three phase electric machine inverter 2 is driven.Semiconductor integrated circuit 3 is connected to the 1st high side and opens
Close to the respective gate terminal of the 3rd high-side switch Q1, Q3, Q5 and the 1st low side switch to the 3rd low side switch Q2,
The respective gate terminal of Q4, Q6, and via the 1st high-voltage signal terminal to the 3rd high-voltage signal terminal HIN1～
HIN3 and the 1st low-voltage signal terminal are connected to the 3rd low-voltage signal terminal LIN1～LIN3 with control device 4.
Fig. 2 is the structure chart of a part for the semiconductor module illustrating embodiments of the present invention.Because for three-phase
The structure of each phase in each semiconductor integrated circuit 3 being mutually driven of motor inverter 2 is equivalent to each other, so
This only illustrates to the structure mutually related to the 1st, and the repetitive description thereof will be omitted.The quasiconductor of present embodiment is integrated
Circuit 3 has the high-pressure side output section 31 being connected with the gate terminal of the 1st high-side switch Q1 and high-pressure side output section
The logic section 32 of 31 connections and the level shift circuit 35 being connected with logic section 32.In addition, quasiconductor is integrated
Circuit 3 has the wave filter 33,34 being connected with logic section 32 and level shift circuit 35 and level shift circuit
The input unit 37 that is connected with pulse generating unit 36 of pulse generating units 36 of 35 connections and pulse generating unit 36 and defeated
Enter the manostat 38 of portion 37 connection and the low-pressure side output section being connected with the gate terminal of the 1st low side switch Q2
39.
In addition, semiconductor integrated circuit 3 have bootstrapping (bootstrap) terminal VB, driving power supply terminal VCC and
2nd ground terminal GND2.It is connected with boottrap capacitor Cb between bootstrapping terminal VB and the 1st lead-out terminal U,
It is connected with bootstrap diode Db between bootstrapping terminal VB and driving power supply terminal VCC, in driving power supply terminal
It is connected with driving power supply V2 between VCC and the 2nd ground terminal GND2.
Driving power supply V2 is charged to boottrap capacitor Cb via bootstrap diode Db.Therefore, output section 31,
Logic section 32 and wave filter 33,34 are using the current potential producing between bootstrapping terminal VB and the 1st lead-out terminal U
Differ from and to be operated.
Level shift circuit 35 has：1st level shift circuit, it is by the 1st resistance R1 being serially connected
Constitute with the 1st switch FET1；And the 2nd level shift circuit, it is by the 2nd resistance R2 being serially connected
Constitute with the 2nd switch FET2.1st level shift circuit output makes the 1st high-side switch Q1 become conducting state
Signal, the 2nd level shift circuit output makes the 1st high-side switch Q1 become the signal of cut-off state.1st resistance
One end of one end of R1 and the 2nd resistance R2 is connected to the 1st bootstrapping terminal VB1.The other end of the 1st resistance R1 and
The other end of the 2nd resistance R2 switchs the drain electrode end of FET2 respectively with the drain terminal and the 2nd of the 1st switch FET1
Son connects.In addition, the other end of the 1st resistance R1 connects via the set terminal S in wave filter portion 33 and logic section 32
Connect.The other end of the 2nd resistance R2 is connected with the reseting terminal R of logic section 32 via wave filter portion 34.1st opens
The source terminal of the source terminal and the 2nd switch FET2 that close FET1 is connected to the 2nd ground terminal GND2.1st
The gate terminal of the gate terminal of switch FET1 and the 2nd switch FET2 is connected to pulse generating unit 36.
Action to semiconductor module 1 illustrates.Pulse generating unit 36 is according to via the 1st high-voltage signal terminal
The driving instruction signal that HIN1 receives, generates the pulse signal making the 1st high-side switch Q1 ON-OFF, to level
Shift circuit 35 exports.Specifically, when pulse generating unit 36 makes the 1st high-side switch Q1 become conducting state,
Export low level signal to the signal of the 1st switch FET1 output high level, to the 2nd switch FET2, pulse is given birth to
When one-tenth portion 36 makes the 1st high-side switch Q1 become cut-off state, to the 1st switch FET1 export low level signal,
Export the signal of high level to the 2nd switch FET2.When the 1st switch and the 2nd switch FET1, FET2 receive pulse
Signal and when cut-off state moves to conducting state, the 1st switch and the 2nd switch FET1, FET2 drain potential
It is changing into low level from high level.According to the change of this drain potential, logic section 32 makes the from lead-out terminal Q output
1 high-side switch Q1 becomes the high level of conducting state or makes the 1st high-side switch Q1 become the low electricity of cut-off state
Flat high-voltage pulse signal.Output section 31 export after the high-voltage pulse signal exporting from logic section 32 is amplified to
The gate terminal of the 1st high-side switch Q1.
The mechanism of the misoperation that the 1st high-side switch Q1 occurs is illustrated.The known tool of FET in a general case
There are various parasitic capacitances, in the 1st switch of present embodiment and the drain terminal of the 2nd switch FET1, FET2 and source
Extremely there is, between son, the parasitic capacitance being represented by dashed line.ON-OFF when each switch because constituting motor inverter 2
Action and during the potential change of the 1st lead-out terminal to the 3rd lead-out terminal U, V, W, the current potential of bootstrapping terminal VB
Affected by this and large change is occurred.The noise current that this potential change causes flows through the 1st resistance and the 2nd resistance
R1, R2 and the 1st switch and the 2nd switch FET1, FET2 parasitic capacitance, and the 1st switch and the 2nd switch FET1,
The drain potential of FET2 and driving instruction independently change.In the case of the changing greatly of drain potential, should
Change is transferred to logic section 32 and causes the misoperation of the 1st high-side switch Q1.So, because of level shift circuit
The error of 35 manufacture view and in the case of the change of drain potential cannot be adequately suppressed, produce by making an uproar sometimes
The misoperation of the 1st high-side switch Q1 that acoustoelectric current causes.
The check device and inspection method of semiconductor module is illustrated, the check device of this semiconductor module and inspection
Method inspection is directed to the safety of noise as described above.Fig. 3 is the semiconductor module illustrating embodiments of the present invention
Test device structure chart.Because testing to the 3rd high-side switch Q1, Q3, Q5 to the 1st high-side switch
Each phase structure equivalent to each other, so here only illustrate the 2nd high-side switch Q2 misoperation test structure, and
The repetitive description thereof will be omitted.The test device 5 of present embodiment has：Multiple companies for being connected with semiconductor module 1
Connecting terminal, DC source V3, source driving signal Vp and test section DET.DC source V3 is configured to
The enough output DC voltage equal with DC source V1.The plus end of DC source V3 is connected with HV Terminal VBB,
The negative terminal of DC source V3 is connected with ground terminal GND1, GND2 and is grounded.Source driving signal Vp is by structure
Become and can generate the equal pulse signal of driving instruction signal generating with control device 4, and with the 1st high-voltage signal
Terminal HIN1 is that the gate terminal of the 1st high-side switch Q1 connects.Test section DET has：By divider resistance R3,
I/V converter section that R4 is connected in series and the voltage to the junction point of divider resistance R3, R4 are detected
Voltage detection department Vdet.Test section DET is connected to the 1st lead-out terminal to the 3rd lead-out terminal U, V, W and ground
Between, and to from DC source V3 via HV Terminal VBB and the 1st lead-out terminal to the 3rd lead-out terminal U, V,
W and the electric current that flows are detected.2nd high-voltage signal terminal and the 3rd high-voltage signal terminal HIN2, HIN3 are
2nd high-side switch and the gate terminal of the 3rd high-side switch Q3, Q5, the 1st low-voltage signal terminal are believed to the 3rd low pressure
Number terminal LIN1～LIN3 and ground terminal GND1, GND2 ground connection.
Fig. 4 is the flow chart of the method for testing of the semiconductor module illustrating embodiments of the present invention.In addition, Fig. 5
It is the structure chart of the semiconductor module in the 4th step S4 illustrate Fig. 4.Because for three-phase brushless dc motor
The structure of each phase in the semiconductor module 1 that M is driven is equivalent to each other, so here is only to judgement the 2nd phase
The structure of misoperation tolerance degree illustrates, and the repetitive description thereof will be omitted.In the 1st step S1, semiconductor module
Block 1 is connected with test device 5, and source driving signal Vp exports low level to the gate terminal of the 1st high-side switch Q1
Signal.According to this structure, the 1st high-side switch is made to open to the 3rd high-side switch Q1, Q3, Q5 and the 1st downside
Close and become cut-off state to the 3rd low side switch Q2, Q4, Q6.In second step S2, source driving signal Vp
The signal of output high level, and make the 1st high-side switch Q1 be switched to conducting state from cut-off state.1st outfan
The current potential of son and the 2nd lead-out terminal U, V is equal with the current potential of HV Terminal VBB, such as shown in (a) of Fig. 5,
Electric current flows via HV Terminal VBB, the 1st high-side switch Q1 and test section DET from DC source V3.
In third step S3, source driving signal Vp exports low level signal, and makes the 1st high-side switch Q1 from conducting
State is switched to cut-off state.Now, the current potential of the 1st lead-out terminal and the 2nd lead-out terminal U, V drastically declines,
And the noise current caused by this impact flows through semiconductor integrated circuit 3.In the 4th step S4, according in detection
The electric current flowing through in portion DET, judges whether semiconductor module 1 has carried out misoperation.Generally, in second step S2
In the electric current that flows through cut-off in third step S3, therefore, in the case that electric current does not flow through test section DET
Test section DET exports low level signal.But, when the 2nd high-side switch Q3 is due to second step and the 3rd step
The noise that produces in rapid S2, S3 and when mistakenly turning on, electric current flows through test section DET and test section DET output
The signal of high level, is judged to that semiconductor module has carried out misoperation.
In other words, by partly being led with making each high-side switch will not be constituted by way of carrying out misoperation using above-mentioned method of testing
Body integrated circuit 3, and may make up the semiconductor module that can be more reliably prevented from the misoperation caused by noise.Specifically
For, by meeting at least one party in following situations, and the generation of misoperation can be suppressed：Make composition level shift
The situation that the resistance value of the 1st resistance of circuit 35 and the 2nd resistance R1, R2 fully improves；Make the 1st switch and
The situation that the parasitic capacitance of the 2nd switch FET1, FET2 fully reduces.Required resistance value and capability value are not
It is changeless, can change with the structure of semiconductor module or motor driver.
The method of testing of the semiconductor module according to present embodiment, test device 5 is passed through defeated from source driving signal Vp
Go out pulse signal and make the 1st high-side switch Q1 carry out ON-OFF action, and make the current potential of the lead-out terminal of each half-bridge
Sharp change.That is, can produce in semiconductor module 1 and semiconductor module 1 is applied to motor driver
In situation identical noise.In addition, test device 5 flows through the outfan of half and half bridge using test section DET detection
The electric current of son, and according to the signal exporting from test section DET, judge that semiconductor module 1 has error-free motion.This
Bright provide the survey that can judge the misoperation tolerance degree of semiconductor module based on noise by simple method
Method for testing, and can provide and can be more reliably prevented from misoperation caused by noise by using method of testing
Semiconductor module.
As described above, the present invention is described by embodiment, it is to be understood that constituting the opinion of a part of this disclosure
State and do not limit the present invention with accompanying drawing.To those skilled in the art, the various replacement embodiment party according to the disclosure
Formula, embodiment and application technology are obvious.That is, the present invention includes the various embodiment party that non-here is recorded certainly
Formula etc..Therefore, the technical scope of the present invention is only dependent upon involved by the scope based on the suitable claim of described above
And the specific item of invention.For example, in order to more reliably judge the misoperation tolerance degree of semiconductor module, such as Fig. 4
Shown in middle dotted line, after execution second step and third step S2, S3 both can be repeated several times, executed the 4th step S4,
Execution second step can also be repeated several times to the 4th step S2～S4.In addition, the present invention can also apply to including
The semiconductor module of monophase machine inverter.
Claims (9)
1. a kind of method of testing of semiconductor module, tests to semiconductor module, described semiconductor module be to
Less to the 1st half-bridge and the 2nd half-bridge and the integrated electricity of quasiconductor for driving described 1st half-bridge and described 2nd half-bridge
Road carry out resin seal it is characterised in that the method for testing of this semiconductor module has：
1st step, by constitute junction point between the 1st high-side switch of described 1st half-bridge and the 1st low side switch,
With the junction point constituting between the 2nd high-side switch of described 2nd half-bridge and the 2nd low side switch is connected to test section；
Second step, after described 1st step, makes described 1st high-side switch become conducting state；
Third step, after described second step, makes described 1st high-side switch become cut-off state；And
4th step, after described third step, according to the signal exporting from described test section, detection is described partly to be led
Module has error-free motion.
2. semiconductor module according to claim 1 method of testing it is characterised in that
In described 1st step, make described 1st high-side switch and described 2nd high-side switch and described 1st downside
Switch and described 2nd low side switch become cut-off state.
3. semiconductor module according to claim 2 method of testing it is characterised in that
In described 1st step, the grid of described 1st high-side switch is connected with source driving signal, by the described 2nd
The grid of the grid of high-side switch and described 1st low side switch and described 2nd low side switch is connected to fixed potential.
4. semiconductor module according to claim 3 method of testing it is characterised in that
Described fixed potential is earthing potential.
5. semiconductor module according to claim 1 method of testing it is characterised in that
In described 1st step,
One end of described 1st half-bridge and described 2nd half-bridge is connected with the plus end of DC source,
The other end of described 1st half-bridge and described 2nd half-bridge is connected with the negative terminal of described DC source.
6. semiconductor module according to claim 1 method of testing it is characterised in that
In described 4th step, if described test section detects electric current, it is judged to that described semiconductor module is carried out
Misoperation.
7. semiconductor module according to claim 1 method of testing it is characterised in that
Repeat described second step and described third step.
8. semiconductor module according to claim 1 method of testing it is characterised in that
Repeat described second step to described 4th step.
9. a kind of semiconductor module, it is at least to the 1st half-bridge and the 2nd half-bridge and to be used for driving the described 1st half
The semiconductor integrated circuit of bridge and described 2nd half-bridge carry out resin seal it is characterised in that
Using the method for testing described in any one in claim 1 to 9, misoperation will not be carried out.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510518300.3A CN106468757B (en) | 2015-08-21 | 2015-08-21 | The test method and semiconductor module of semiconductor module |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510518300.3A CN106468757B (en) | 2015-08-21 | 2015-08-21 | The test method and semiconductor module of semiconductor module |
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| CN106468757B CN106468757B (en) | 2019-09-17 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111868537A (en) * | 2018-03-12 | 2020-10-30 | 罗姆股份有限公司 | Semiconductor device and method for identifying semiconductor device |
| CN112986779A (en) * | 2021-02-08 | 2021-06-18 | 厦门市三安集成电路有限公司 | Reliability testing device and method for gallium nitride device |
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| JP2002057282A (en) * | 2000-08-11 | 2002-02-22 | Matsushita Electric Ind Co Ltd | Semiconductor device and inverter circuit using it |
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| JP2002057282A (en) * | 2000-08-11 | 2002-02-22 | Matsushita Electric Ind Co Ltd | Semiconductor device and inverter circuit using it |
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| CN112986779A (en) * | 2021-02-08 | 2021-06-18 | 厦门市三安集成电路有限公司 | Reliability testing device and method for gallium nitride device |
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| Publication number | Publication date |
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| CN106468757B (en) | 2019-09-17 |
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