CN106407554A - LPC bus simulation verification method and device capable of simultaneously supporting master and slave machine functions - Google Patents
LPC bus simulation verification method and device capable of simultaneously supporting master and slave machine functions Download PDFInfo
- Publication number
- CN106407554A CN106407554A CN201610824288.3A CN201610824288A CN106407554A CN 106407554 A CN106407554 A CN 106407554A CN 201610824288 A CN201610824288 A CN 201610824288A CN 106407554 A CN106407554 A CN 106407554A
- Authority
- CN
- China
- Prior art keywords
- slave
- function
- simulating
- verifying
- lpc bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/33—Design verification, e.g. functional simulation or model checking
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Management, Administration, Business Operations System, And Electronic Commerce (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Debugging And Monitoring (AREA)
Abstract
The invention discloses an LPC (Low Pin Count) bus simulation verification method and device capable of simultaneously supporting master and slave machine functions. The method comprises the following steps: constructing an overall simulation environment; configuring the master machine and the slave machine; and connecting simulation environments and applying excitation according to functions respectively used as the master and slave machines so as to perform simulation verification, and switching the master machine and the slave machine in real time in the simulation verification process. The device comprises a construction unit for constructing the overall simulation environment, a configuration unit for configuring the master machine and the slave machine, and a simulation verification unit for connecting simulation environments and applying excitation according to the functions respectively used as the master and slave machines so as to perform simulation verification, and switching the master machine and the slave machine in real time in the simulation verification process. The method and the device can comprehensively and effectively complete the simulation verification of logic codes.
Description
Technical field
The invention belongs to Design of Digital Circuit technical field, more particularly to a kind of LPC simultaneously supporting slave function
Bus simulator verification method and device.
Background technology
LPC (Low Pin Count) is Intel is the 4bit parallel bus protocol replacing isa bus to propose, its address
Bus data bus is multiplexing, and required number of pins is fewer.Typically all it is integrated with one at present on the south bridge of computer motherboard
Individual lpc bus controller, for being communicated with equipment such as SIO, EC.Typically both may be used based on the logic module that lpc bus are realized
Slave can be served as to serve as main frame, then be accomplished by considering to each act as the simulating, verifying of slave again, this be one urgently
The problem solving.
Content of the invention
For solving the above problems, the invention provides a kind of lpc bus simulating, verifying side simultaneously supporting slave function
Method and device, can comprehensively and effectively complete the simulating, verifying of logical code.
A kind of lpc bus emulation verification method of slave function of support simultaneously that the present invention provides includes：
Build overall simulated environment；
Configuration main frame and slave；
Excitation is applied according to the corresponding simulated environment of the function connects each acting as during slave, carries out simulating, verifying,
Carry out the switching of described main frame and described slave in real time during simulating, verifying.
Preferably, in the above-mentioned lpc bus emulation verification method simultaneously supporting slave function, the described entirety that builds is imitated
True environment includes：
Create a new engineering project in emulation tool, by other required to logical code to be emulated and emulation
Master-slave equipment code file loads into described engineering project, builds overall simulated environment.
Preferably, above-mentioned simultaneously support slave function lpc bus emulation verification method in, described configuration main frame and
Slave includes：
If logical code is configured to main frame, connects from equipment, be built into the environment of host function emulation；
If logical code is configured to slave, main equipment in connection, it is built into the environment of slave functional simulation.
Preferably, in the above-mentioned lpc bus emulation verification method simultaneously supporting slave function, described according to filling respectively
The corresponding simulated environment of function connects when slave applies excitation, carries out simulating, verifying and includes：
It is respectively directed to described host function and described slave function, write corresponding excitation according to lpc bus agreement, and plus
It is downloaded in engineering and is emulated, analyze simulation waveform, obtain simulation result and conclusion.
A kind of lpc bus simulating, verifying device of slave function of support simultaneously that the present invention provides includes：
Construction unit, for building overall simulated environment；
Dispensing unit, for configuring main frame and slave；
Simulating, verifying unit, for applying to swash according to the corresponding simulated environment of function connects each acting as during slave
Encourage, carry out simulating, verifying, carry out the switching of described main frame and described slave during simulating, verifying in real time.
Preferably, in the above-mentioned lpc bus simulating, verifying unit simultaneously supporting slave function, described construction unit tool
Body is used for：
Create a new engineering project in emulation tool, by other required to logical code to be emulated and emulation
Master-slave equipment code file loads into described engineering project, builds overall simulated environment.
Preferably, in the above-mentioned lpc bus simulating, verifying unit simultaneously supporting slave function, described dispensing unit tool
Body is used for：
If logical code is configured to main frame, connection becomes the environment of host function emulation from device build；
If logical code is configured to slave, in connection, main equipment is built into the environment of slave functional simulation.
Preferably, in the above-mentioned lpc bus simulating, verifying unit simultaneously supporting slave function, described simulating, verifying list
Unit specifically for：
It is respectively directed to described host function and described slave function, write corresponding excitation according to lpc bus agreement, and plus
It is downloaded in engineering and is emulated, analyze simulation waveform, obtain simulation result and conclusion.
By foregoing description, the above-mentioned lpc bus simulating, verifying simultaneously supporting slave function that the present invention provides
Method and apparatus, because the method includes：Build overall simulated environment；Configuration main frame and slave；According to each acting as slave
When the corresponding simulated environment of function connects apply excitation, carry out simulating, verifying, carry out described during simulating, verifying in real time
Main frame and the switching of described slave, therefore, it is possible to comprehensively and effectively complete the simulating, verifying of logical code.
Brief description
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
Have technology description in required use accompanying drawing be briefly described it should be apparent that, drawings in the following description be only this
Inventive embodiment, for those of ordinary skill in the art, on the premise of not paying creative work, can also basis
The accompanying drawing providing obtains other accompanying drawings.
Fig. 1 provide for the embodiment of the present application the first support the lpc bus emulation verification method of slave function simultaneously
Schematic diagram；
Fig. 2 provide for the embodiment of the present application the first support the lpc bus simulating, verifying device of slave function simultaneously
Schematic diagram.
Specific embodiment
The core concept of the present invention be to provide a kind of lpc bus emulation verification method simultaneously supporting slave function and
Device, can comprehensively and effectively complete the simulating, verifying of logical code.
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation description is it is clear that described embodiment is only a part of embodiment of the present invention, rather than whole embodiments.It is based on
Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of not making creative work
Embodiment, broadly falls into the scope of protection of the invention.
The first of the embodiment of the present application offer supports lpc bus emulation verification method such as Fig. 1 of slave function simultaneously
Shown, Fig. 1 provide for the embodiment of the present application the first support the showing of lpc bus emulation verification method of slave function simultaneously
It is intended to.The method comprises the steps：
S1：Build overall simulated environment；
Specifically, set various simulation parameters, be that simulation process is ready.
S2：Configuration main frame and slave；
That is, related configuration is all carried out to the parameter of main frame and slave.
S3：Excitation is applied according to the corresponding simulated environment of the function connects each acting as during slave, carries out simulating, verifying,
Carry out the switching of described main frame and described slave in real time during simulating, verifying.
The configuration conversion of slave function in simulation process, can be carried out in real time, thus can comprehensively and effectively complete
The simulating, verifying of logical code.
By foregoing description, the above-mentioned lpc bus simultaneously supporting slave function that the embodiment of the present application provides are imitated
True verification method, due to including：Build overall simulated environment；Configuration main frame and slave；According to the work(each acting as during slave
Corresponding simulated environment can be connected and apply excitation, carry out simulating, verifying, carry out in real time during simulating, verifying described main frame and
The switching of described slave, therefore, it is possible to comprehensively and effectively complete the simulating, verifying of logical code.
The second that the embodiment of the present application provides supports the lpc bus emulation verification method of slave function simultaneously, be
Above-mentioned the first support the lpc bus emulation verification method of slave function simultaneously on the basis of, also include following technical characteristic：
The described entirety simulated environment that builds includes：
Create a new engineering project in emulation tool, by other required to logical code to be emulated and emulation
Master-slave equipment code file loads into described engineering project, builds overall simulated environment.
Certainly may also take on other modes to build overall simulated environment, be not intended to limit herein.
The embodiment of the present application provide the third support the lpc bus emulation verification method of slave function simultaneously, be
On the basis of above-mentioned second supports the lpc bus emulation verification method of slave function simultaneously, also include following technical characteristic：
Described configuration main frame and slave include：
If logical code is configured to main frame, connects from equipment, be built into the environment of host function emulation；
If logical code is configured to slave, main equipment in connection, it is built into the environment of slave functional simulation.
Using aforesaid way, carry out treating the slave configuration of emulation logic code and the selection of simulated environment.
The embodiment of the present application provide the 4th kind simultaneously support slave function lpc bus emulation verification method, be
On the basis of above-mentioned the third supports the lpc bus emulation verification method of slave function simultaneously, also include following technical characteristic：
The corresponding simulated environment of function connects that described basis each acts as during slave applies excitation, carries out simulating, verifying
Including：
It is respectively directed to described host function and described slave function, write corresponding excitation according to lpc bus agreement, and plus
It is downloaded in engineering and is emulated, analyze simulation waveform, obtain simulation result and conclusion.
The first of the embodiment of the present application offer supports lpc bus simulating, verifying device such as Fig. 2 of slave function simultaneously
Shown, Fig. 2 provide for the embodiment of the present application the first support the showing of lpc bus simulating, verifying device of slave function simultaneously
It is intended to.This device includes：
Construction unit 201, specific for building overall simulated environment, it is used for setting various simulation parameters, for emulation
Process is ready；
Dispensing unit 202, for configuring main frame and slave that is to say, that all carrying out correlation to the parameter of main frame and slave
Configuration；
Simulating, verifying unit 203, for applying according to the corresponding simulated environment of function connects each acting as during slave
Excitation, carries out simulating, verifying, carries out the switching of described main frame and described slave in real time, in simulation process during simulating, verifying
In, the configuration conversion of slave function can be carried out in real time, thus can comprehensively and effectively complete the simulating, verifying of logical code.
By foregoing description, the above-mentioned lpc bus simultaneously supporting slave function that the embodiment of the present application provides are imitated
True checking device, can comprehensively and effectively complete the simulating, verifying of logical code.
The second that the embodiment of the present application provides supports the lpc bus simulating, verifying device of slave function simultaneously, be
Above-mentioned the first support the lpc bus simulating, verifying device of slave function simultaneously on the basis of, also include following technical characteristic：
Described construction unit specifically for：
Create a new engineering project in emulation tool, by other required to logical code to be emulated and emulation
Master-slave equipment code file loads into described engineering project, builds overall simulated environment.
The embodiment of the present application provide the third support the lpc bus simulating, verifying device of slave function simultaneously, be
On the basis of above-mentioned second supports the lpc bus simulating, verifying device of slave function simultaneously, also include following technical characteristic：
Described dispensing unit specifically for：
If logical code is configured to main frame, connection becomes the environment of host function emulation from device build；
If logical code is configured to slave, in connection, main equipment is built into the environment of slave functional simulation.
That is, carrying out treating the slave configuration of emulation logic code and the choosing of simulated environment using this dispensing unit
Select.
The embodiment of the present application provide the 4th kind simultaneously support slave function lpc bus simulating, verifying device, be
On the basis of above-mentioned the third supports the lpc bus simulating, verifying device of slave function simultaneously, also include following technical characteristic：
Described simulating, verifying unit specifically for：
It is respectively directed to described host function and described slave function, write corresponding excitation according to lpc bus agreement, and plus
It is downloaded in engineering and is emulated, analyze simulation waveform, obtain simulation result and conclusion.
Described above to the disclosed embodiments, makes professional and technical personnel in the field be capable of or uses the present invention.
Multiple modifications to these embodiments will be apparent from for those skilled in the art, as defined herein
General Principle can be realized without departing from the spirit or scope of the present invention in other embodiments.Therefore, the present invention
It is not intended to be limited to the embodiments shown herein, and be to fit to and principles disclosed herein and features of novelty phase one
The scope the widest causing.
Claims (8)
1. a kind of lpc bus emulation verification method simultaneously supporting slave function is it is characterised in that include：
Build overall simulated environment；
Configuration main frame and slave；
Excitation is applied according to the corresponding simulated environment of the function connects each acting as during slave, carries out simulating, verifying, in emulation
Carry out the switching of described main frame and described slave in real time in proof procedure.
2. according to claim 1 simultaneously support slave function lpc bus emulation verification method it is characterised in that
The described entirety simulated environment that builds includes：
Create a new engineering project in emulation tool, by other principals and subordinates required to logical code to be emulated and emulation
Device code file loads into described engineering project, builds overall simulated environment.
3. according to claim 2 simultaneously support slave function lpc bus emulation verification method it is characterised in that
Described configuration main frame and slave include：
If logical code is configured to main frame, connects from equipment, be built into the environment of host function emulation；
If logical code is configured to slave, main equipment in connection, it is built into the environment of slave functional simulation.
4. according to claim 3 simultaneously support slave function lpc bus emulation verification method it is characterised in that
The corresponding simulated environment of function connects that described basis each acts as during slave applies excitation, carries out simulating, verifying and includes：
It is respectively directed to described host function and described slave function, write corresponding excitation according to lpc bus agreement, and be loaded into
Emulated in engineering, analyze simulation waveform, obtain simulation result and conclusion.
5. a kind of lpc bus simulating, verifying device simultaneously supporting slave function is it is characterised in that include：
Construction unit, for building overall simulated environment；
Dispensing unit, for configuring main frame and slave；
Simulating, verifying unit, for applying excitation according to the corresponding simulated environment of function connects each acting as during slave, enters
Row simulating, verifying, carries out the switching of described main frame and described slave during simulating, verifying in real time.
6. according to claim 5 simultaneously support slave function lpc bus simulating, verifying unit it is characterised in that
Described construction unit specifically for：
Create a new engineering project in emulation tool, by other principals and subordinates required to logical code to be emulated and emulation
Device code file loads into described engineering project, builds overall simulated environment.
7. according to claim 6 simultaneously support slave function lpc bus simulating, verifying device it is characterised in that
Described dispensing unit specifically for：
If logical code is configured to main frame, connection becomes the environment of host function emulation from device build；
If logical code is configured to slave, in connection, main equipment is built into the environment of slave functional simulation.
8. according to claim 7 simultaneously support slave function lpc bus simulating, verifying device it is characterised in that
Described simulating, verifying unit specifically for：
It is respectively directed to described host function and described slave function, write corresponding excitation according to lpc bus agreement, and be loaded into
Emulated in engineering, analyze simulation waveform, obtain simulation result and conclusion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610824288.3A CN106407554B (en) | 2016-09-14 | 2016-09-14 | Lpc bus emulation verification method and device a kind of while that support slave function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610824288.3A CN106407554B (en) | 2016-09-14 | 2016-09-14 | Lpc bus emulation verification method and device a kind of while that support slave function |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106407554A true CN106407554A (en) | 2017-02-15 |
| CN106407554B CN106407554B (en) | 2019-09-24 |
Family
ID=57996597
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610824288.3A Active CN106407554B (en) | 2016-09-14 | 2016-09-14 | Lpc bus emulation verification method and device a kind of while that support slave function |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106407554B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107229793A (en) * | 2017-05-27 | 2017-10-03 | 郑州云海信息技术有限公司 | The method of testing and device of a kind of advanced extensible interface bus platform |
| CN114384403A (en) * | 2022-03-22 | 2022-04-22 | 浙江大学 | Chip verification IP device and test method thereof |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101526930A (en) * | 2008-10-13 | 2009-09-09 | 建荣集成电路科技(珠海)有限公司 | USB interface master-slave machine detection device and detection method |
| CN101907683A (en) * | 2009-06-02 | 2010-12-08 | 上海摩波彼克半导体有限公司 | Automatic circuit testing structure of I2C module in digital baseband chip and method thereof |
| CN103064805A (en) * | 2012-12-25 | 2013-04-24 | 深圳先进技术研究院 | Serial Peripheral Interface (SPI) controller and communication method |
| CN104021101A (en) * | 2014-05-09 | 2014-09-03 | 深圳市汇川控制技术有限公司 | USB interface system and implementation method based on LPC1768 platform |
| CN104123204A (en) * | 2013-04-23 | 2014-10-29 | 鸿富锦精密工业（深圳）有限公司 | LPC bus detection system and method |
| CN104573228A (en) * | 2015-01-06 | 2015-04-29 | 中国人民解放军国防科学技术大学 | Microprocessor silicone-fed verification device and method for compatibility design |
-
2016
- 2016-09-14 CN CN201610824288.3A patent/CN106407554B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101526930A (en) * | 2008-10-13 | 2009-09-09 | 建荣集成电路科技(珠海)有限公司 | USB interface master-slave machine detection device and detection method |
| CN101907683A (en) * | 2009-06-02 | 2010-12-08 | 上海摩波彼克半导体有限公司 | Automatic circuit testing structure of I2C module in digital baseband chip and method thereof |
| CN103064805A (en) * | 2012-12-25 | 2013-04-24 | 深圳先进技术研究院 | Serial Peripheral Interface (SPI) controller and communication method |
| CN104123204A (en) * | 2013-04-23 | 2014-10-29 | 鸿富锦精密工业（深圳）有限公司 | LPC bus detection system and method |
| CN104021101A (en) * | 2014-05-09 | 2014-09-03 | 深圳市汇川控制技术有限公司 | USB interface system and implementation method based on LPC1768 platform |
| CN104573228A (en) * | 2015-01-06 | 2015-04-29 | 中国人民解放军国防科学技术大学 | Microprocessor silicone-fed verification device and method for compatibility design |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107229793A (en) * | 2017-05-27 | 2017-10-03 | 郑州云海信息技术有限公司 | The method of testing and device of a kind of advanced extensible interface bus platform |
| CN107229793B (en) * | 2017-05-27 | 2020-12-01 | 苏州浪潮智能科技有限公司 | Test method and device for advanced extensible interface bus platform |
| CN114384403A (en) * | 2022-03-22 | 2022-04-22 | 浙江大学 | Chip verification IP device and test method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106407554B (en) | 2019-09-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103713932B (en) | The update method of application program and device in a kind of electronic control unit | |
| CN107784152A (en) | Include the simulation of multiple simulators | |
| CN109472061B (en) | Reusable simulation verification platform and simulation verification method | |
| US20140052430A1 (en) | Partitionless Multi User Support For Hardware Assisted Verification | |
| CN113076227A (en) | MCU verification method, system and terminal equipment | |
| CN104598373B (en) | A kind of embedded software test method of multi-technical fusion | |
| CN106844271A (en) | A kind of system verification platform and method | |
| CN105940384A (en) | Universal serial bus emulation of peripheral devices | |
| CN106293625A (en) | A kind of method and apparatus of configuration register | |
| JP2014517948A (en) | System and method for setting up a clustered simulation network | |
| CN116089281A (en) | Chip testing method, testing platform and device | |
| CN106407554A (en) | LPC bus simulation verification method and device capable of simultaneously supporting master and slave machine functions | |
| CN103544105A (en) | Debug method and device of multi-core processor based on VCPU (virtual central processing unit) | |
| CN104834591A (en) | Method and system for testing AUTOSAR software component | |
| CN109325900A (en) | A kind of dispositions method and system of algorithm | |
| EP2469416A1 (en) | Test bed for an AUTOSAR software component and method for checking an AUTOSAR software component | |
| CN105389200A (en) | Multi-group stimulation batch simulation method and system applied to super-large scale chip verification | |
| CN108228965B (en) | Simulation verification method, device and equipment for memory cell | |
| CN114548027A (en) | Method for tracking signal in verification system, electronic device and storage medium | |
| CN103440133A (en) | Development method and system of chip testing software | |
| CN104181927B (en) | A kind of Flight Control Law management method and device | |
| CN112764981A (en) | Cooperative test system and method | |
| CN102135762B (en) | Time trigger type real-time simulation control system | |
| CN105765468A (en) | System-setup assistance apparatus | |
| Nangia et al. | Functional verification of I2C core using SystemVerilog |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |