CN106385237A - Highly-stable signal processing system for sewage discharging network monitoring device based on big data - Google Patents
Highly-stable signal processing system for sewage discharging network monitoring device based on big data Download PDFInfo
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- CN106385237A CN106385237A CN201610749890.5A CN201610749890A CN106385237A CN 106385237 A CN106385237 A CN 106385237A CN 201610749890 A CN201610749890 A CN 201610749890A CN 106385237 A CN106385237 A CN 106385237A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
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Abstract
The invention discloses a highly-stable signal processing system for a sewage discharging network monitoring device based on big data. The highly-stable signal processing system is mainly formed by a processing chip U, a triode VT2, a polar capacitor C6, a polar capacitor C7, a signal bandwidth regulation circuit, a differential amplification circuit, a second-order lowpass filtering circuit, and a frequency error correcting circuit connected with a CS tube pin, a G tube pin and an OUT tube pin of the processing chip U. The differential amplification circuit is serially connected between a CLK tube pipe of the processing chip U and the frequency error correcting circuit. Low-frequency interference signals of the processing chip can be eliminated or prohibited; frequency point of the signal after anti-interference process can be amplified, so the signal can be more stable; phase positions of multi-carrier wave signals of data signals, and frequency errors can be corrected, so signal processing effect can be improved; and accuracy of sewage data information acquired from a data processing center can be effectively guaranteed.
Description
Technical field
The present invention relates to a kind of processing system, specifically refer to a kind of blowdown net monitoring device high stable based on big data
Property signal processing system.
Background technology
Present society is the society of a high speed development, and science and technology is flourishing, information flow, and the exchange between people is increasingly
Closely, life is also more and more convenient, and big data is exactly the product of this cyberage.Big data refers to many n-ary form ns, from
The huge data set that many sources are collected and come, has stronger real-time.With the continuous development of Information technology, big data quilt
It is widely used in sewerage network monitoring device.Current mainly processed by big data based on the sewerage network monitoring device of big data
The heart, monitoring point collecting cassette, regional signal receive-transmit system, regional signal processing system and area data storage system composition；And it is big
Whether the sewage data message that data processing centre obtains accurately then depends primarily on regional signal processing system to signal processing
Whether accurate.
However, there is signal processing effect in the regional signal processing system of the existing sewerage network monitoring device based on big data
Really poor, lead to the sewage data message accuracy that data processing centre obtains not high, cause sewerage network monitoring personnel accurate
The sewage information understanding in soil pipe it is impossible to effectively be administered to sewage so that the living environment of people be subject to tight
The impact of weight.
Therefore it provides a kind of sewerage network monitoring device signal processing based on big data that can improve signal processing effect
System then seem excellent for important.
Content of the invention
It is an object of the invention to overcoming the regional signal processing system of the existing sewerage network monitoring device based on big data
There is the defect of signal processing effect difference in system, the present invention provides a kind of blowdown net monitoring device high stability based on big data
Signal processing system.
The present invention is achieved through the following technical solutions：Blowdown net monitoring device high stability signal based on big data
Processing system, mainly by process chip U, audion VT2, positive pole is connected with the IN pin of process chip U after resistance R8, bears
The polar capacitor C6 that pole is connected with the COMP pin of process chip U after inductance L1, one end is connected with the base stage of audion VT2
Connect, resistance R11 that the other end is connected with the COMP pin of process chip U, N pole is connected with the base stage of audion VT2, P pole
The diode D5 being connected with the B pin of process chip U after resistance R9, positive pole is connected with the B pin of process chip U, bears
The polar capacitor C7 that pole is connected with the base stage of audion VT2 after adjustable resistance R10, is connected with the VC pin of process chip U
The second-order low-pass filter circuit connecing, is serially connected in the signal bandwidth between second-order low-pass filter circuit and the IN pin of process chip U
Adjustment circuit, the correction of frequency errors circuit being connected with the CS pin of process chip U, G pin and OUT pin respectively, and
It is serially connected in the differential amplifier circuit composition between the CLK pin of process chip U and correction of frequency errors circuit；Described audion
The emitter stage of VT2 is connected with the OUT pin of process chip U, its grounded collector；The GND pin of described process chip U connects
Ground；The VC pin of described process chip U is connected with outside 12V DC source.
Described signal bandwidth adjustment circuit by amplifier P5, amplifier P6, audion VT6, audion VT7, negative pole with put
The polar capacitor C18 that the positive pole of big device P5 is connected, positive pole is connected with second-order low-pass filter circuit, P pole after resistance R26 with
The diode D12 that the negative pole of amplifier P5 is connected, N pole is connected with the colelctor electrode of audion VT6, positive pole and audion VT6
Emitter stage the polar capacitor C19, P pole and the amplifier P6 that are connected, are connected with the positive pole of amplifier P6 after negative pole resistance R30
Negative pole be connected after ground connection, the diode D14 that is connected with the outfan of amplifier P6 after resistance R31 of N pole, positive pole with put
The outfan of big device P6 is connected, negative pole is connected with the IN pin of process chip U polar capacitor C22, negative pole and amplifier
The positive pole of P6 is connected, positive pole is connected with the base stage of audion VT6 after inductance L3 polar capacitor C20, one end and polarity
The adjustable resistance R28 that the positive pole of electric capacity C20 is connected, the other end is connected with the base stage of audion VT7, P pole and amplifier P5
Outfan be connected, diode D13 that the emitter stage of N pole audion VT7 is connected, and positive pole after resistance R27 with put
The polar capacitor C21 group that the outfan of big device P5 is connected, negative pole is connected with the colelctor electrode of audion VT7 after resistance R29
Become；The minus earth of described polar capacitor C19；The positive pole of described polar capacitor C20 is also connected with the negative pole of amplifier P5；Institute
The colelctor electrode stating audion VT7 is also connected with the outfan of amplifier P6.
Further, by amplifier P3, amplifier P4, audion VT5, positive pole is through resistance R19 for described differential amplifier circuit
Be connected with the negative pole of amplifier P3 afterwards, the polar capacitor C14 of minus earth, P pole is connected with the positive pole of amplifier P3, N pole
The diode D9 being connected with the outfan of amplifier P3 after resistance R18, positive pole positive pole with amplifier P3 after inductance L2
Be connected, polar capacitor C12 that negative pole is connected with the outfan of amplifier P3, positive pole is connected with the outfan of amplifier P3
Connect, polar capacitor C13 that negative pole is connected with the positive pole of amplifier P4, positive pole base stage phase with audion VT5 after resistance R21
Connect, the polar capacitor C16 that is connected with the outfan of amplifier P4 of negative pole, negative pole is connected with the colelctor electrode of audion VT5,
The polar capacitor C15 that positive pole is connected with the outfan of amplifier P4 after resistance R20, negative pole after resistance R23 with amplifier
The polar capacitor C17 that the negative pole of P4 is connected, positive pole is connected with the outfan of amplifier P4 after resistance R24, P pole and amplification
The diode D11 that the negative pole of device P4 is grounded after being connected, N pole is connected with the positive pole of polar capacitor C17 after resistance R25, with
And the diode that P pole is connected with the positive pole of amplifier P4 after adjustable resistance R22, N pole is connected with the negative pole of amplifier P4
D10 forms；The positive pole of described amplifier P3 is connected with the CLK pin of process chip U；The emitter stage of described audion VT5 with
The positive pole of amplifier P4 is connected；The P pole ground connection of described diode D10；The outfan of described amplifier P4 also with frequency error
Correcting circuit is connected.
Described second-order low-pass filter electricity routing amplifier P1, audion VT1, field effect transistor MOS, positive pole after resistance R4 with
The base stage of audion VT1 is connected, polar capacitor C3, negative pole and the amplification of the input as second-order low-pass filter circuit for the negative pole
The polar capacitor C2 that the positive pole of device P1 is connected, positive pole is connected with the colelctor electrode of audion VT1 after resistance R3, P pole and field
The diode D2 that the drain electrode of effect pipe MOS is connected, N pole is connected with the negative pole of polar capacitor C2, positive pole and field effect transistor MOS
Grid be connected, polar capacitor C1, N pole and field effect that negative pole is connected with the colelctor electrode of audion VT1 after resistance R2
The source electrode of pipe MOS is connected, P pole is connected with the VC pin of process chip U Zener diode D1, one end and Zener diode
The P pole of D1 is connected, the resistance R1 of the other end and ground connection, and P pole is connected with the colelctor electrode of audion VT1, N pole and audion
The diode D3 that the emitter stage of VT1 is connected, P pole is connected with the negative pole of amplifier P1, N pole after resistance R5 with amplifier P1
The diode D4 that is connected of outfan, positive pole is connected with the negative pole of amplifier P1 after resistance R6, negative pole and amplifier P1
The polar capacitor C4 that is connected of outfan, and be connected with the outfan of amplifier P1 after positive electrode resistance R7, minus earth
Polar capacitor C5 composition；The minus earth of described polar capacitor C2；The positive pole of described amplifier P1 is also with polar capacitor C3's
Positive pole is connected, its outfan is also connected with the emitter stage of audion VT1 and the positive pole of polar capacitor C18 respectively, its negative pole
Ground connection.
Described correction of frequency errors electricity routing amplifier P2, audion VT3, the CS of audion VT4, P pole and process chip U
The diode D6 that pin is connected, N pole is connected with the base stage of audion VT4, positive pole is connected with the G pin of process chip U,
The polar capacitor C10 that negative pole is connected with the emitter stage of audion VT4, P pole emitter stage with audion VT4 after resistance R15
Be connected, diode D8 that N pole is connected with the colelctor electrode of audion VT3, negative pole is connected with the emitter stage of audion VT4,
The colelctor electrode of the polar capacitor C11 that positive pole is connected with the colelctor electrode of audion VT3 after resistance R17, one end and audion VT3
The base stage of the adjustable resistance R16 that after being connected, ground connection, the other end are connected with the base stage of audion VT3, P pole and audion VT3
Be connected, diode D7 that N pole is connected with the outfan of amplifier P2 after resistance R14, with amplifier after positive electrode resistance R13
The polar capacitor C9 that the negative pole of P2 is connected, negative pole is connected with the outfan of amplifier P2, and positive pole is with amplifier P2's
The polar capacitor C8 composition that positive pole is connected, negative pole is connected with the outfan of amplifier P2 after resistance R12；Described audion
The grounded collector of VT4；The base stage of described audion VT3 is also connected with the negative pole of amplifier P2, its emitter stage and amplifier
The outfan of P4 is connected；The positive pole of described amplifier P2 is connected with the OUT pin of process chip U, the then conduct of its outfan
The outfan of correction of frequency errors circuit.
For the practical effect of the present invention, described process chip U then preferentially employs MB40978 integrated chip and comes in fact
Existing.
The present invention compared with prior art has advantages below and beneficial effect：
(1) low-frequency interference signal in signal being eliminated or suppressed of the present invention, and can be to anti-interference process after
The frequency of signal be amplified, make signal more steady；And the present invention can also be to the phase of the many cultivations ripple signal in data signal
Position and frequency error are corrected, thus improve the effect to signal processing for the present invention, effectively ensure that Data processing
The accuracy of the sewage data message that gains in depth of comprehension arrive, and ensure that sewerage network monitoring personnel can accurately understand the dirt in soil pipe
Water information.
(2) present invention can be adjusted to the frequency bandwidth of signal, and the low current signal in signal or electric charge can be believed
Number being amplified, making signal more stable, thus improve the accuracy to signal processing for the present invention.
(3) present invention has circuit symmetry and a degenerative feature, and can effectively to data signal static work
Point carries out stablizing moreover it is possible to be amplified to the difference mode signal of data signal, and the suppression common mode signal in data signal is carried out
Suppression；The present invention can also suppress to the null offset in data signal simultaneously, ensures that the present invention to signal processing
Accuracy.
(4) process chip U of the present invention then preferentially employs MB40978 integrated chip to realize, and this chip is electric with periphery
Road combines, and can effectively improve stability and the reliability of the present invention.
Brief description
Fig. 1 is the overall structure block diagram of the present invention.
Fig. 2 is the electrical block diagram of the differential amplifier circuit of the present invention.
Fig. 3 is the electrical block diagram of the signal bandwidth adjustment circuit of the present invention.
Specific embodiment
With reference to embodiment, the present invention is described in further detail, but embodiments of the present invention not limited to this.
As shown in figure 1, the present invention is mainly by process chip U, audion VT2, resistance R8, resistance R9, adjustable resistance R10,
Resistance R11, polar capacitor C6, polar capacitor C7, inductance L1, diode D5, signal bandwidth adjustment circuit, differential amplifier circuit,
Second-order low-pass filter circuit, and correction of frequency errors circuit composition.
During connection, the positive pole of polar capacitor C6 is connected with the IN pin of process chip U after resistance R8, and negative pole is through inductance
It is connected with the COMP pin of process chip U after L1.One end of resistance R11 is connected with the base stage of audion VT2, the other end with
The COMP pin of process chip U is connected.The N pole of diode D5 is connected with the base stage of audion VT2, and P pole is after resistance R9
It is connected with the B pin of process chip U.The positive pole of polar capacitor C7 is connected with the B pin of process chip U, and negative pole is through adjustable
It is connected with the base stage of audion VT2 after resistance R10.Second-order low-pass filter circuit is connected with the VC pin of process chip U.Letter
Number bandwidth adjustment circuit is serially connected between second-order low-pass filter circuit and the IN pin of process chip U.Correction of frequency errors circuit
It is connected with the CS pin of process chip U, G pin and OUT pin respectively.Differential amplifier circuit is serially connected in the CLK of process chip U
Between pin and correction of frequency errors circuit.
The emitter stage of described audion VT2 is connected with the OUT pin of process chip U, its grounded collector；Described process
The GND pin ground connection of chip U；The VC pin of described process chip U is connected with outside 12V DC source.
During enforcement, for the practical effect of the present invention, described process chip U then preferentially employs stable performance, and
And there is overtemperature protection, overcurrent protection and the accurate MB40978 integrated chip of process to realize.Meanwhile, described polar capacitor
C6, inductance L1, adjustable resistance R10, diode D5 and audion VT2 together form anti-emi filter, this anti-electromagnetism
Interference filter can be eliminated to the Electromagnetic Interference signal of process chip U periphery or be suppressed, and make process chip U compare letter
Will not be disturbed by external electromagnetic ripple signal when number being processed, can effectively be improved the standard to signal processing for process chip U
Really property.The input of described second-order low-pass filter circuit operationally then passes through the sewerage network monitoring dress of data wire and big data
The signal output part of the regional signal receive-transmit system in putting is connected；And the outfan of described correction of frequency errors circuit then leads to
Cross data wire to be connected with the big data processing center in the sewerage network monitoring device of big data.
Further, described second-order low-pass filter electricity routing amplifier P1, audion VT1, field effect transistor MOS, resistance R1,
Resistance R2, resistance R3, resistance R4, resistance R5, resistance R6, resistance R7, polar capacitor C1, polar capacitor C2, polar capacitor C3, pole
Property electric capacity C4, polar capacitor C5, Zener diode D1, diode D2, diode D3, and diode D4 composition.
During connection, the positive pole of polar capacitor C3 is connected with the base stage of audion VT1 after resistance R4, and negative pole is as second order
The input of low-pass filter circuit is simultaneously connected with regional signal receive-transmit system.The negative pole of polar capacitor C2 is with amplifier P1 just
Pole is connected, and positive pole is connected with the colelctor electrode of audion VT1 after resistance R3.The P pole of diode D2 and field effect transistor MOS
Drain electrode is connected, and N pole is connected with the negative pole of polar capacitor C2.
Wherein, the positive pole of polar capacitor C1 is connected with the grid of field effect transistor MOS, negative pole after resistance R2 with audion
The colelctor electrode of VT1 is connected.The N pole of Zener diode D1 is connected with the source electrode of field effect transistor MOS, P pole and process chip U
VC pin is connected.One end of resistance R1 is connected with the P pole of Zener diode D1, the other end and ground connection.The P pole of diode D3
It is connected with the colelctor electrode of audion VT1, N pole is connected with the emitter stage of audion VT1.
Meanwhile, the P pole of diode D4 is connected with the negative pole of amplifier P1, and N pole is defeated with amplifier P1 after resistance R5
Go out end to be connected.The positive pole of polar capacitor C4 is connected with the negative pole of amplifier P1 after resistance R6, and negative pole is with amplifier P1's
Outfan is connected.It is connected with the outfan of amplifier P1 after positive electrode resistance R7 of polar capacitor C5, minus earth.
The minus earth of described polar capacitor C2；The positive pole of described amplifier P1 is also connected with the positive pole of polar capacitor C3
Connect, its outfan is also connected with the emitter stage of audion VT1 and the positive pole of polar capacitor C18 respectively, its minus earth.
During operation, the common shape of the polar capacitor C3 of this second-order low-pass filter circuit, polar capacitor C2, resistance R3 and resistance R4
Double rank wave filter are become, this pair of rank wave filter is stable to signal strainability, and the low-frequency interference signal in signal can be had
The elimination of effect or suppression.Meanwhile, the amplifier P1 in second-order low-pass filter circuit, diode D4, polar capacitor C4, resistance R5 and
Resistance R6 defines signal amplifier, and this signal amplifier can be amplified to the frequency of the signal after anti-interference process, makes letter
Number more steady, thus effective mistake that this second-order low-pass filter circuit enables signal is entered filters and amplify, can effectively improve
The effect to signal processing for the present invention.
Further, described correction of frequency errors electricity routing amplifier P2, audion VT3, audion VT4, resistance
R12, resistance R13, resistance R14, resistance R15, adjustable resistance R16, resistance R17, polar capacitor C8, polar capacitor C9, polarity electricity
Hold C10, polar capacitor C11, diode D6, diode D7, and diode D8 composition.
During connection, the P pole of diode D6 is connected with the CS pin of process chip U, the base stage phase of N pole and audion VT4
Connect.The positive pole of polar capacitor C10 is connected with the G pin of process chip U, and negative pole is connected with the emitter stage of audion VT4.
The P pole of diode D8 is connected with the emitter stage of audion VT4 after resistance R15, and N pole is connected with the colelctor electrode of audion VT3
Connect.The negative pole of polar capacitor C11 is connected with the emitter stage of audion VT4, positive pole collection with audion VT3 after resistance R17
Electrode is connected.
Wherein, ground connection, the other end and audion after one end of adjustable resistance R16 is connected with the colelctor electrode of audion VT3
The base stage of VT3 is connected.The P pole of diode D7 is connected with the base stage of audion VT3, N pole after resistance R14 with amplifier P2
Outfan be connected.It is connected with the negative pole of amplifier P2 after positive electrode resistance R13 of polar capacitor C9, negative pole and amplifier P2
Outfan be connected.The positive pole of polar capacitor C8 is connected with the positive pole of amplifier P2, negative pole after resistance R12 with amplifier
The outfan of P2 is connected.
The grounded collector of described audion VT4；The base stage of described audion VT3 is also connected with the negative pole of amplifier P2
Connect, its emitter stage is connected with the outfan of amplifier P4；The OUT pin phase of the positive pole of described amplifier P2 and process chip U
Connect, its outfan then the outfan as correction of frequency errors circuit and with the sewerage network monitoring device of big data in big number
It is connected according to processing center.
During operation, the diode D6 of this correction of frequency errors circuit, diode D8, polar capacitor C10, polar capacitor C11,
Resistance R15, resistance R17 and audion VT3 define signal demodulator circuit, the data that this circuit can be exported to process chip U
The phase and frequency of the many cultivations ripple in signal is detected, the electric wave value of the phase and frequency of the many cultivations ripple detecting when it and benchmark
The electric wave value of the phase and frequency planting ripple differs and causes more, the amplifier P2 of this correction of frequency errors circuit, adjustable resistance R16,
The coordination circuits that polar capacitor C8, polar capacitor C9 and diode D7 are formed then are adjusted making to the phase and frequency planting ripple more
The phase and frequency that the sampling phase and frequency planting ripple plants ripple with benchmark more more is identical, makes process chip U outfan data signal
Can stablize and accurately be transferred to big data processing center, thus this correction of frequency errors circuit can effectively improve process chip
The stability of data signal of U output and accuracy.
As shown in Fig. 2 described differential amplifier circuit is by amplifier P3, amplifier P4, audion VT5, resistance R18, resistance
R19, resistance R20, resistance R21, adjustable resistance R22, resistance R23, resistance R24, resistance R25, polar capacitor C12, polar capacitor
C13, polar capacitor C14, polar capacitor C15, polar capacitor C16, polar capacitor C17, inductance L2, diode D9, diode
D10, and diode D11 composition.
During connection, the positive pole of polar capacitor C14 is connected with the negative pole of amplifier P3 after resistance R19, minus earth.Two
The P pole of pole pipe D9 is connected with the positive pole of amplifier P3, and N pole is connected with the outfan of amplifier P3 after resistance R18.Polarity
The positive pole of electric capacity C12 is connected with the positive pole of amplifier P3 after inductance L2, and negative pole is connected with the outfan of amplifier P3.
Wherein, the positive pole of polar capacitor C13 is connected with the outfan of amplifier P3, the positive pole phase of negative pole and amplifier P4
Connect.The positive pole of polar capacitor C16 is connected with the base stage of audion VT5 after resistance R21, the output of negative pole and amplifier P4
End is connected.The negative pole of polar capacitor C15 is connected with the colelctor electrode of audion VT5, positive pole after resistance R20 with amplifier P4
Outfan be connected.
Meanwhile, the negative pole of polar capacitor C17 is connected with the negative pole of amplifier P4 after resistance R23, and positive pole is through resistance R24
It is connected with the outfan of amplifier P4 afterwards.The P pole of diode D11 is grounded after being connected with the negative pole of amplifier P4, and N pole is through electricity
It is connected with the positive pole of polar capacitor C17 after resistance R25.The P pole of diode D10 after adjustable resistance R22 with amplifier P4 just
Pole is connected, and N pole is connected with the negative pole of amplifier P4.
The positive pole of described amplifier P3 is connected with the CLK pin of process chip U；The emitter stage of described audion VT5 with
The positive pole of amplifier P4 is connected；The P pole ground connection of described diode D10；The outfan of described amplifier P4 also with frequency error
Correcting circuit is connected.
During enforcement, amplifier P3 in differential amplifier circuit, polar capacitor C12, polar capacitor C13, electrode resistance R18, two
First discharge circuit of pole pipe D9 and inductance L2 formation is as the input stage of data signal, this discharge circuit and amplifier P4, pole
Property electric capacity C15, polar capacitor C16, resistance R20, resistance R21 formed the second discharge circuit.First discharge circuit and the second fortune
Resistance in electric discharge road keeps Striking symmetry.Therefore, this differential amplifier circuit has circuit symmetry and degenerative feature, and
Effectively the quiescent point of data signal can be carried out stablizing moreover it is possible to be amplified to the difference mode signal of data signal, and right
Suppression common mode signal in data signal is suppressed；The present invention can also press down to the null offset in data signal simultaneously
System.For the using effect of the present invention, in described differential amplifier circuit, the resistance of resistance is preferably：Resistance R18=resistance R19
(51K), resistance R20=resistance R21 (10K), resistance R23=resistance R25 (30K).
As shown in figure 3, described signal bandwidth adjustment circuit is by amplifier P5, amplifier P6, audion VT6, audion
VT7, resistance R26, resistance R27, adjustable resistance R28, resistance R29, resistance R30, resistance R31, polar capacitor C18, polar capacitor
C19, polar capacitor C20, polar capacitor C21, polar capacitor C22, inductance L3, diode D12, diode D13, and diode
D14 forms.
During connection, the negative pole of polar capacitor C18 is connected with the positive pole of amplifier P5, positive pole and second-order low-pass filter circuit
It is connected.The P pole of diode D12 is connected with the negative pole of amplifier P5 after resistance R26, the colelctor electrode of N pole and audion VT6
It is connected.The positive pole of polar capacitor C19 is connected with the emitter stage of audion VT6, after negative pole resistance R30 with amplifier P6 just
Pole is connected.The P pole of diode D14 is grounded after being connected with the negative pole of amplifier P6, N pole after resistance R31 with amplifier P6
Outfan be connected.
Wherein, the positive pole of polar capacitor C22 is connected with the outfan of amplifier P6, the IN pipe of negative pole and process chip U
Foot is connected.The negative pole of polar capacitor C20 is connected with the positive pole of amplifier P6, and positive pole is after inductance L3 with audion VT6's
Base stage is connected.One end of adjustable resistance R28 is connected with the positive pole of polar capacitor C20, the base stage of the other end and audion VT7
It is connected.
Meanwhile, the P pole of diode D13 is connected with the outfan of amplifier P5, and the emitter stage of N pole audion VT7 is connected
Connect.The positive pole of polar capacitor C21 is connected with the outfan of amplifier P5 after resistance R27, negative pole after resistance R29 with three poles
The colelctor electrode of pipe VT7 is connected.The minus earth of described polar capacitor C19；The positive pole of described polar capacitor C20 also with amplifier
The negative pole of P5 is connected；The colelctor electrode of described audion VT7 is also connected with the outfan of amplifier P6.
During operation, the present invention in order to be adjusted to the frequency bandwidth of signal, can to the low current signal in signal or
Charge signal is amplified, and makes signal more stable, therefore between the IN pin of second-order low-pass filter circuit and process chip U
It is provided with signal bandwidth adjustment circuit.The polar capacitor C18 of this signal bandwidth adjustment circuit, amplifier P5, inductance L3, resistance
R26, resistance R30, diode D12 and polar capacitor C19 define an amplifying circuit, the frequency of this amplifying circuit energy earth signal
It is amplified, makes the bandwidth of frequency wider, so that sampled signal and the frequency of input signal is consistent；This signal bandwidth adjustment electricity
The filtering adjustment circuit that the amplifier P6 on road, adjustable resistance R28 and polar capacitor C22 are formed, this filtering adjustment circuit is to signal
Low current signal or charge signal be adjusted, make current signal or charge signal more steady, and to by electric charge and electricity
Signal after stream adjustment is filtered, and effectively leaches the signal medium-high frequency interference signal after adjustment, makes signal cleaner, thus
This signal bandwidth adjustment circuit can effectively be adjusted to input signal, can effectively improve the standard to signal processing for the present invention
Really property.
As described above, just can be very good to realize the present invention.
Claims (6)
1. the blowdown net monitoring device high stability signal processing system based on big data, mainly by process chip U, audion
VT2, positive pole is connected with the IN pin of process chip U after resistance R8, negative pole is managed with the COMP of process chip U after inductance L1
The polar capacitor C6 that foot is connected, one end is connected with the base stage of audion VT2, the COMP pin of the other end and process chip U
The resistance R11 being connected, N pole is connected with the base stage of audion VT2, P pole B pin phase with process chip U after resistance R9
Connect diode D5, positive pole is connected with the B pin of process chip U, negative pole after adjustable resistance R10 with audion VT2's
The polar capacitor C7 that base stage is connected, the second-order low-pass filter circuit being connected with the VC pin of process chip U, it is serially connected in second order
Signal bandwidth adjustment circuit between the IN pin of low-pass filter circuit and process chip U, is managed with the CS of process chip U respectively
The correction of frequency errors circuit that foot, G pin are connected with OUT pin, and it is serially connected in CLK pin and the frequency of process chip U
Differential amplifier circuit composition between error correction circuit；The emitter stage of described audion VT2 and the OUT pin of process chip U
Be connected, its grounded collector；The GND pin ground connection of described process chip U；The VC pin of described process chip U and outside 12V
DC source is connected.
2. the blowdown net monitoring device high stability signal processing system based on big data according to claim 1, its
Be characterised by, described signal bandwidth adjustment circuit by amplifier P5, amplifier P6, audion VT6, audion VT7, negative pole with put
The polar capacitor C18 that the positive pole of big device P5 is connected, positive pole is connected with second-order low-pass filter circuit, P pole after resistance R26 with
The diode D12 that the negative pole of amplifier P5 is connected, N pole is connected with the colelctor electrode of audion VT6, positive pole and audion VT6
Emitter stage the polar capacitor C19, P pole and the amplifier P6 that are connected, are connected with the positive pole of amplifier P6 after negative pole resistance R30
Negative pole be connected after ground connection, the diode D14 that is connected with the outfan of amplifier P6 after resistance R31 of N pole, positive pole with put
The outfan of big device P6 is connected, negative pole is connected with the IN pin of process chip U polar capacitor C22, negative pole and amplifier
The positive pole of P6 is connected, positive pole is connected with the base stage of audion VT6 after inductance L3 polar capacitor C20, one end and polarity
The adjustable resistance R28 that the positive pole of electric capacity C20 is connected, the other end is connected with the base stage of audion VT7, P pole and amplifier P5
Outfan be connected, diode D13 that the emitter stage of N pole audion VT7 is connected, and positive pole after resistance R27 with put
The polar capacitor C21 group that the outfan of big device P5 is connected, negative pole is connected with the colelctor electrode of audion VT7 after resistance R29
Become；The minus earth of described polar capacitor C19；The positive pole of described polar capacitor C20 is also connected with the negative pole of amplifier P5；Institute
The colelctor electrode stating audion VT7 is also connected with the outfan of amplifier P6.
3. the blowdown net monitoring device high stability signal processing system based on big data according to claim 2, its
Be characterised by, described differential amplifier circuit by amplifier P3, amplifier P4, audion VT5, positive pole after resistance R19 with amplification
The negative pole of device P3 is connected, the polar capacitor C14 of minus earth, and P pole is connected with the positive pole of amplifier P3, N pole is through resistance R18
The diode D9 being connected with the outfan of amplifier P3 afterwards, positive pole is connected with the positive pole of amplifier P3 after inductance L2, bears
The polar capacitor C12 that pole is connected with the outfan of amplifier P3, positive pole is connected with the outfan of amplifier P3, negative pole with put
The polar capacitor C13 that the positive pole of big device P4 is connected, positive pole is connected with the base stage of audion VT5 after resistance R21, negative pole with
The polar capacitor C16 that the outfan of amplifier P4 is connected, negative pole is connected with the colelctor electrode of audion VT5, positive pole is through resistance
The polar capacitor C15 being connected with the outfan of amplifier P4 after R20, negative pole negative pole phase with amplifier P4 after resistance R23
The negative pole of the polar capacitor C17 that connection, positive pole are connected with the outfan of amplifier P4 after resistance R24, P pole and amplifier P4
The diode D11 that after being connected, ground connection, N pole are connected with the positive pole of polar capacitor C17 after resistance R25, and P pole is through adjustable
Be connected with the positive pole of amplifier P4 after resistance R22, diode D10 that N pole is connected with the negative pole of amplifier P4 composition；Described
The positive pole of amplifier P3 is connected with the CLK pin of process chip U；The emitter stage of described audion VT5 is with amplifier P4 just
Pole is connected；The P pole ground connection of described diode D10；The outfan of described amplifier P4 is also connected with correction of frequency errors circuit
Connect.
4. the blowdown net monitoring device high stability signal processing system based on big data according to claim 3, its
It is characterised by, described second-order low-pass filter electricity routing amplifier P1, audion VT1, field effect transistor MOS, positive pole is after resistance R4
Be connected with the base stage of audion VT1, the polar capacitor C3 of the input as second-order low-pass filter circuit for the negative pole, negative pole with put
The polar capacitor C2 that the positive pole of big device P1 is connected, positive pole is connected with the colelctor electrode of audion VT1 after resistance R3, P pole with
The drain electrode of field effect transistor MOS is connected, N pole is connected with the negative pole of polar capacitor C2 diode D2, positive pole and field effect transistor
The polar capacitor C1 that the grid of MOS is connected, negative pole is connected with the colelctor electrode of audion VT1 after resistance R2, N pole is imitated with field
Should pipe MOS source electrode be connected, Zener diode D1 that P pole is connected with the VC pin of process chip U, one end and voltage stabilizing two pole
The P pole of pipe D1 is connected, the resistance R1 of the other end and ground connection, and P pole is connected with the colelctor electrode of audion VT1, N pole and audion
The diode D3 that the emitter stage of VT1 is connected, P pole is connected with the negative pole of amplifier P1, N pole after resistance R5 with amplifier P1
The diode D4 that is connected of outfan, positive pole is connected with the negative pole of amplifier P1 after resistance R6, negative pole and amplifier P1
The polar capacitor C4 that is connected of outfan, and be connected with the outfan of amplifier P1 after positive electrode resistance R7, minus earth
Polar capacitor C5 composition；The minus earth of described polar capacitor C2；The positive pole of described amplifier P1 is also with polar capacitor C3's
Positive pole is connected, its outfan is also connected with the emitter stage of audion VT1 and the positive pole of polar capacitor C18 respectively, its negative pole
Ground connection.
5. the blowdown net monitoring device high stability signal processing system based on big data according to claim 4, its
It is characterised by, described correction of frequency errors electricity routing amplifier P2, audion VT3, audion VT4, P pole and process chip U
The diode D6 that CS pin is connected, N pole is connected with the base stage of audion VT4, positive pole is connected with the G pin of process chip U
Connect, polar capacitor C10 that negative pole is connected with the emitter stage of audion VT4, the transmitting with audion VT4 after resistance R15 of P pole
The diode D8 that pole is connected, N pole is connected with the colelctor electrode of audion VT3, negative pole is connected with the emitter stage of audion VT4
Connect, polar capacitor C11 that positive pole is connected with the colelctor electrode of audion VT3 after resistance R17, the collection of one end and audion VT3
The adjustable resistance R16 that electrode is grounded after being connected, the other end is connected with the base stage of audion VT3, P pole is with audion VT3's
The diode D7 that base stage is connected, N pole is connected with the outfan of amplifier P2 after resistance R14, after positive electrode resistance R13 with put
The polar capacitor C9 that the negative pole of big device P2 is connected, negative pole is connected with the outfan of amplifier P2, and positive pole and amplifier
The polar capacitor C8 composition that the positive pole of P2 is connected, negative pole is connected with the outfan of amplifier P2 after resistance R12；Described three
The grounded collector of pole pipe VT4；The base stage of described audion VT3 is also connected with the negative pole of amplifier P2, its emitter stage with put
The outfan of big device P4 is connected；The positive pole of described amplifier P2 is connected with the OUT pin of process chip U, its outfan then
Outfan as correction of frequency errors circuit.
6. the blowdown net monitoring device high stability signal processing system based on big data according to claim 5, its
It is characterised by, described process chip U is MB40978 integrated chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610749890.5A CN106385237A (en) | 2016-08-29 | 2016-08-29 | Highly-stable signal processing system for sewage discharging network monitoring device based on big data |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610749890.5A CN106385237A (en) | 2016-08-29 | 2016-08-29 | Highly-stable signal processing system for sewage discharging network monitoring device based on big data |
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| CN106385237A true CN106385237A (en) | 2017-02-08 |
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| Application Number | Title | Priority Date | Filing Date |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112939346A (en) * | 2021-02-02 | 2021-06-11 | 裕华生态环境股份有限公司 | Landscape type composite subsurface flow constructed wetland sewage treatment system |
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2016
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112939346A (en) * | 2021-02-02 | 2021-06-11 | 裕华生态环境股份有限公司 | Landscape type composite subsurface flow constructed wetland sewage treatment system |
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